/*--------------------------------------------------------------------------				
*
* FILE: 860QMC1h.c
*
* DESCRIPTION: 
*
* This example exercises QMC mode on an 860 with MH functionality.
* It sends and receives 8 frames of data using 8 BDs.  An interrupt is
* generated upon closing of the last RxBD.  The interrupt handler checks for
* errors in the BDs.  The ETH LED on the ADS board lights if no errors are
* detected;  otherwise the LED flashes.  The driver "terminates" in an
* infinite loop.
* 
* This version uses one logical channel (channel 0) on SCC2, and operates 
* in HDLC mode (32bit CRC). 
*
* For a high level explanation, please refer to the applications document
* for this example. This is included in the Zip file you received. If you 
* are interested in a ADS 860 development/evaluation system, please 
* contact your local sales representative.
*
* Note that this software does not run on the MC68360.
*
* This software is located in the Engineer's Toolbox of the Netcomm
* webpage:
*
* http://www.mot.com/netcomm
*              
*
* NOTES  <<<IMPORTANT:  PLEASE READ>>>:
*
*     1) Specifically Designed to run on 860 ADS board.
*
*     2) SPECIAL SETUP: 
*        This program requires that certain external connections be made on
*        the 860 ADS board in order to function.  This code is using a baud
*        rate generator and a timer to generate the clock and sync for the
*        serial interface.  Therefore you must connect the following signals:
*        -signals PA7, PA3, and PA1 (pins A9, A13, and A15 in connector P13)
*         must all be tied together
*        -signals PA0 and PC4 (pins A16 and B31 in connector P13) must be tied
*        together.
*
*     3) If this program is run under BDM (i.e. using mpc8bug, you must 
*        first clear the EXTIE bit in the Debug Enable Register (DER). 
*        Otherwise, the interrupt from the SCC will trap 
*        you back into the debugger.  This command 
*        for mpc8bug is "rms der.extie" followed by "0." at the next prompt.  
*        These commands are executed for you if you run the start script 
*        provided with this example by entering "ex start" after reset.  The 
*        script diables extie, and loads the program.  You then may set
*        breakpoints, look at memory, or just enter "go" as desired.
*
*     4) Be sure to look at the .map file for useful addresses to peek at.
*
*
* REFERENCES: 
*
*      1) MPC860 Users Manual
*      2) QMC Supplement to 360 and 860 UMs
*      3) Application note supplied with this software (located in the 860
*         tbale of the Engineer's Toolbox, at www.mot.com/netcomm 
*         
*
* HISTORY:
*	
* 13 FEB 98  ggh/ecg	    Initial version 
*-------------------------------------------------------------------------*/

#include <string.h>
#include <stdlib.h>        
#include "netcomm.h"       /* global defines */
#include "mpc860.h"        /* IMMR definitions and declarations */
#include "860QMC.h"        /* Local header file */
#include "masks860.h"      /* Global masks header file */


/***********************/
/* Global Declarations */
/***********************/

EPPC  *IMMR;      /* IMMR base pointer */

/*----------------------------*/
/* Base of buffer descriptors */
/*----------------------------*/

BDRINGS *RxTxBD;
    
/*----------------------------------------------------------*/
/* Set of Data Buffers for Transparent Receive and Transmit */
/* Data. The Rx buffer pools will take up the first 8       */
/* buffers and the Tx buffer pools will take up the last 8. */
/*----------------------------------------------------------*/

LB BufferPool[NUM_RXBDS+NUM_TXBDS];

/*---------------------------------------------------------*/
/* Status parameters of the receive and transmit processes */
/*---------------------------------------------------------*/

UHWORD RxGood;          /* Successful RX flag */
UBYTE  RxProcIndex;    /* keeps track of next BD to process */      

/*-----------------------------------------------------*/
/* Interrupt Handler Code to be moved to Address 0x500 */
/*-----------------------------------------------------*/


extern UWORD ExtIntTable[];

/***********************/
/* Function Prototypes */
/***********************/
 
void     Main(void);
void     SI_TSAinit(void);
void     SCCinit(void);
void     QMC_GlobalInit(void);                      
void     InterruptInit(UWORD *, UWORD[]);
void     InitBDs(void);
void     LoadTxBuffers(void);
void     QMC_ChannelInit(void);
void     ExtIntHandler(UWORD);
UHWORD   BDEmpty(UHWORD);
UHWORD   LastBD(UHWORD);
void     Ethled(UHWORD);
void     FlashEthled(void);
/*--------------------------------------------------------------------------
*
* FUNCTION NAME:  main 
*
* DESCRIPTION:
*
*  Main function for MPC860 QMC example code.
*
* EXTERNAL EFFECT: n/a
*                 
* PARAMETERS:  None
*
* RETURNS: None
*
*-------------------------------------------------------------------------*/

void Main()
{
   RxGood = TRUE;   /* initialize as good */
   RxProcIndex = 0; /* initialize */    

   /*------------------------*/
   /* Establish IMMR pointer */
   /*------------------------*/
   
   IMMR = (EPPC *)(GetIMMR() & 0xFFFF0000);  /* MPC8xx internal register
                                                map  */
   
   /*---------------------------------------------------------*/
   /* Initialize the Serial Interface, its Time Slot Assigner */
   /* and the necessary clocks for the interface.             */
   /*---------------------------------------------------------*/

   SI_TSAinit();

   /*----------------------------------------*/
   /* Perform general initialization of SCC2 */
   /*----------------------------------------*/

   SCCinit();

   /*--------------------------------------------------*/
   /* Initialize Global QMC parameters and the QMC TSA */
   /*--------------------------------------------------*/

   QMC_GlobalInit();

   /*--------------------------------------------------------------------*/
   /* Initialize interrupt-related parameters including placing External */
   /* Interrupt Handler Code to Address 0x500 in the vector table,       */
   /* and enabling interrupts in the SCC, CPIC, SIU, and PPC core.       */
   /*--------------------------------------------------------------------*/
   InterruptInit((UWORD *) EXT_INT_VECTOR, ExtIntTable);

   /*------------------------------------------------*/
   /* Load the Tx buffer pool with the test patterns */
   /*------------------------------------------------*/

   LoadTxBuffers();

   /*-------------------------------------------------------------------*/
   /* This function defines a number of buffers for an RX and TX buffer	*/
   /* pool, but does not attempt to manage memory.  It uses the first	*/
   /*  half of the BD pool for RX and the second half for TX.           */ 
   /*-------------------------------------------------------------------*/
   
      InitBDs(); /* Initialize RX and TX BDs */

   /*----------------------------------------*/
   /* Initialize Channel Specific parameters */
   /*----------------------------------------*/

   QMC_ChannelInit();

   /*--------------------------------------------*/
   /* Enable transmit and receive in SCC2's GSMR */
   /* (Step 23 of QMC initialization procedure   */
   /* from QMC Supplement, chapter 6)            */
   /*--------------------------------------------*/

   IMMR->scc_regs[SCC2_REG].scc_gsmr_l |= GSMR_L2_ENR|GSMR_L2_ENT;

   
	/*--------------------------------------------*/
	/* Use this loop to delay the core until CPM  */
	/* has finished transmitting and receiving.   */
    	/*                                            */
    	/* Note that the value 1000000 was chosen to  */
    	/* provide an arbitrarily sufficient amount   */
    	/* of time for reception to complete.  You    */
    	/* may need to alter this value if you change */
    	/* the system speed                           */
	/*--------------------------------------------*/

    UWORD count = 0;
    
       while (count < 1000000)

      {
		   count++;
      }	 
  
  
      /*-----------------------------------------------*/
      /* Spin here indefinitely if there was an error. */
      /*-----------------------------------------------*/

	if (RxGood == FALSE) 
 
       {
         while (1) 
      
            FlashEthled();	 /* spin here if error is flagged */
       } 	 



      /*-------------------------------------------------------*/
      /* Turn On Ethernet LED to indicate error-free reception */
      /*-------------------------------------------------------*/


      if (RxGood == TRUE)  
      { 
      	Ethled(ON);
      }
      
      while (1);  /*spin here after lighting LED*/


}  /* End Main */



/*---------------------------------------------------------------
* FUNCTION NAME: SI_TSAinit                                     
*                                                               
* DESCRIPTION:                                                  
*                                                               
*    This function initializes the Serial Interface, its Time   
*    Slot Assigner, and the necessary clocks and port pins for  
*    the interface.  Note that this function covers steps 1-7   
*    of the QMC Initialization Steps in the QMC Supplement.     
*    Steps 2 and 8 are not necessary for this example as we are 
*    not using PortB nor the shadow RAM.                        
*                                                               
* EXTERNAL EFFECTS: see above                                   
*                                                               
* PARAMETERS: none                                              
*                                                               
* RETURNS:  none                                                
*---------------------------------------------------------------*/

   
void SI_TSAinit()

{

   /*-------------------------------------------*/   
   /* Initialize the SI Mode Register (SIMODE). */
   /*-------------------------------------------*/
      
   IMMR->si_simode = 0x00000840;

   /*------------------------------------------------*/ 
   /* Initialize the SI Clock Route Register (SICR). */
   /*------------------------------------------------*/
      
   IMMR->si_sicr = 0x00004000;

   /*****************************/
   /* Configure Clocks and Pins */
   /*****************************/

	/*---------------------------------------------*/
	/*	Set brg3 to baud rate ~ 1.544 Mbps     */
	/*                                             */
	/* CD=$0F, EN=1, DIV16=0   25MHz/($F+1) = 1.56 */
	/*---------------------------------------------*/

   IMMR->brgc3 = 0x0001001E;

	/*-----------------------------*/
	/* Set up timer 4 for L1RSYNCA */
	/*-----------------------------*/

	IMMR->timer_tgcr &= 0x0FFF;  /* enable timer4, no cascade, frz disabled */
	IMMR->timer_tgcr |= 0x1000;  
	IMMR->timer_tmr4  = 0x002E;  /* no prescale, toggle out, TIN4 clock */
                                 /* FRR=1, no interrupts*/

	IMMR->timer_trr4  = 0x0060;  /* reset at 96 */

    /*----------------------------------------*/
    /* Configure PortA for TDMa functionality */
    /*----------------------------------------*/

    IMMR->pio_papar = 0x05C0;
	IMMR->pio_padir = 0x00CF0;

    /*----------------------------------------------*/
    /* Additional PortA configuration for clocking: */
    /* 14 set for input, 12 & 15 for output         */
    /*----------------------------------------------*/

    IMMR->pio_papar |= 0xD000;
    IMMR->pio_padir &= 0xBFFF;
    IMMR->pio_padir |= 0x9000;

    	/*--------------------------------*/
    	/* Configure Parallel I/O port C  */
	/*                                */
    	/* PC4 = L1RSYNCA, PC5 = L1TSYNCA */
	/*--------------------------------*/
   
    IMMR->pio_pcpar = 0x0C00;
    IMMR->pio_pcdir = 0;

    /*---------------------------------------------------------*/
    /* Program SI RAM to use SCC2 for all timeslots, Rx and Tx */
    /*---------------------------------------------------------*/

	IMMR->si_siram[0] = 0x00;
	IMMR->si_siram[1] = 0xbe;
	IMMR->si_siram[4] = 0x00;
    IMMR->si_siram[5] = 0x9f;
	IMMR->si_siram[0x100] = 0x00;
	IMMR->si_siram[0x101] = 0xbe;
	IMMR->si_siram[0x104] = 0x00;
    IMMR->si_siram[0x105] = 0x9f;

    /*--------------------------------------------*/
    /* Initialize SI Global Mode Register (SIGMR) */
    /*--------------------------------------------*/

    IMMR->si_sigmr=0x04;  /* enable TDMA */

} /* end SI_TSAinit */


/*------------------------------------------------------------------
* FUNCTION NAME: SCCinit                                           
*                                                                  
* DESCRIPTION:                                                     
*                                                                  
*    Performs general SCC mode initialization.  Note this function 
*    covers steps 9 and 10 in the QMC Initialization Steps in the  
*    QMC Supplement.                                               
*                                                                  
* EXTERNAL EFFECT: SCC2 placed in QMC mode                         
*                                                                  
* PARAMETERS: none                                                 
*                                                                  
* RETURNS: none                                                    
*------------------------------------------------------------------*/

void SCCinit()
{
 
    /*-----------------------------------------------------*/
    /* Initialize GSMR_H for normal operation:             */
    /*                                                     */
    /*	CDP, CTSP, CDS, CTSS bits set                      */		
    /*-----------------------------------------------------*/
		
    IMMR->scc_regs[SCC2_REG].scc_gsmr_h = 0x00000780;
    /*-----------------------------------------------------*/
    /* Initialize GSMR_L:  Place SCC in QMC mode           */               
    /*-----------------------------------------------------*/
																						
    IMMR->scc_regs[SCC2_REG].scc_gsmr_l = 0x0000000A;
   
} /* end SCCinit */


/*-------------------------------------------------------------
* FUNCTION NAME:  QMC_GlobalInit                              
*                                                             
* DESCRIPTION:                                                
*                                                             
*    This function initializes various registers in the QMC   
*    Global Parameters for SCC2.  It also initializes the     
*    QMC Time Slot Assignment table for SCC2 and related      
*    pointers.  Note that this function performs steps 11 and 
*    13-15.  Step 12 and other interrupt initialization       
*    related steps are found in InterruptInit.                
*                                                             
* EXTERNAL EFFECTS: see above                                 
*                                                             
* PARAMETERS: none                                            
*                                                             
* RETURNS: none                                               
*-------------------------------------------------------------*/

void QMC_GlobalInit()
{
    
    unsigned long *entry;

   /*----------------------------------------------*/
   /* Initialize registers in the QMC Global PRAM. */
   /*----------------------------------------------*/

   IMMR->PRAM[PAGE2].gqp.mcbase   = 0x40000;

   IMMR->PRAM[PAGE2].gqp.intbase  = 

   IMMR->PRAM[PAGE2].gqp.intptr   = (UWORD) &(IntCQ);

   /*IMMR->PRAM[PAGE2].gqp.mrblr    = BUFFER_SIZE;*/
   /*Note mrblr is a don't care in transparent QMC mode
     and must be set in the channel-specific PRAM*/

   IMMR->PRAM[PAGE2].gqp.grfthr   = 1;

   IMMR->PRAM[PAGE2].gqp.grfcnt   = 1;

   IMMR->PRAM[PAGE2].gqp.c_mask32 = 0xDEBB20E3;

   IMMR->PRAM[PAGE2].gqp.c_mask16 = 0xF0B8;

   IMMR->PRAM[PAGE2].gqp.qmcstate = 0x8000;

   /*------------------------------------------------------*/
   /* Initialize the QMC TSA for SCC2.                     */
   /* Note that this example uses common Rx and Tx tables. */
   /*------------------------------------------------------*/

   /* make logical channel 0 valid */
   IMMR->PRAM[PAGE2].gqp.tsatrx[0]=0xb03f;