/* * Linux driver for Disk-On-Chip Millennium Plus * * (c) 2002-2003 Greg Ungerer <gerg@snapgear.com> * (c) 2002-2003 SnapGear Inc * (c) 1999 Machine Vision Holdings, Inc. * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org> * * $Id: doc2001plus.c,v 1.1.1.1 2007/09/01 10:29:10 hansorblue Exp $ * * Released under GPL */#include <linux/kernel.h>#include <linux/module.h>#include <asm/errno.h>#include <asm/io.h>#include <asm/uaccess.h>#include <linux/miscdevice.h>#include <linux/pci.h>#include <linux/delay.h>#include <linux/slab.h>#include <linux/sched.h>#include <linux/init.h>#include <linux/types.h>#include <linux/bitops.h>#include <linux/mtd/mtd.h>#include <linux/mtd/nand.h>#include <linux/mtd/doc2000.h>/* #define ECC_DEBUG *//* I have no idea why some DoC chips can not use memcop_form|to_io(). * This may be due to the different revisions of the ASIC controller built-in or * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment * this:*/#undef USE_MEMCPYstatic int doc_read(struct mtd_info *mtd, loff_t from, size_t len,		size_t *retlen, u_char *buf);static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,		size_t *retlen, const u_char *buf);static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,			struct mtd_oob_ops *ops);static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,			 struct mtd_oob_ops *ops);static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);static struct mtd_info *docmilpluslist = NULL;/* Perform the required delay cycles by writing to the NOP register */static void DoC_Delay(void __iomem * docptr, int cycles){	int i;	for (i = 0; (i < cycles); i++)		WriteDOC(0, docptr, Mplus_NOP);}#define	CDSN_CTRL_FR_B_MASK	(CDSN_CTRL_FR_B0 | CDSN_CTRL_FR_B1)/* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */static int _DoC_WaitReady(void __iomem * docptr){	unsigned int c = 0xffff;	DEBUG(MTD_DEBUG_LEVEL3,	      "_DoC_WaitReady called for out-of-line wait\n");	/* Out-of-line routine to wait for chip response */	while (((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) && --c)		;	if (c == 0)		DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");	return (c == 0);}static inline int DoC_WaitReady(void __iomem * docptr){	/* This is inline, to optimise the common case, where it's ready instantly */	int ret = 0;	/* read form NOP register should be issued prior to the read from CDSNControl	   see Software Requirement 11.4 item 2. */	DoC_Delay(docptr, 4);	if ((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK)		/* Call the out-of-line routine to wait */		ret = _DoC_WaitReady(docptr);	return ret;}/* For some reason the Millennium Plus seems to occassionally put itself * into reset mode. For me this happens randomly, with no pattern that I * can detect. M-systems suggest always check this on any block level * operation and setting to normal mode if in reset mode. */static inline void DoC_CheckASIC(void __iomem * docptr){	/* Make sure the DoC is in normal mode */	if ((ReadDOC(docptr, Mplus_DOCControl) & DOC_MODE_NORMAL) == 0) {		WriteDOC((DOC_MODE_NORMAL | DOC_MODE_MDWREN), docptr, Mplus_DOCControl);		WriteDOC(~(DOC_MODE_NORMAL | DOC_MODE_MDWREN), docptr, Mplus_CtrlConfirm);	}}/* DoC_Command: Send a flash command to the flash chip through the Flash * command register. Need 2 Write Pipeline Terminates to complete send. */static void DoC_Command(void __iomem * docptr, unsigned char command,			       unsigned char xtraflags){	WriteDOC(command, docptr, Mplus_FlashCmd);	WriteDOC(command, docptr, Mplus_WritePipeTerm);	WriteDOC(command, docptr, Mplus_WritePipeTerm);}/* DoC_Address: Set the current address for the flash chip through the Flash * Address register. Need 2 Write Pipeline Terminates to complete send. */static inline void DoC_Address(struct DiskOnChip *doc, int numbytes,			       unsigned long ofs, unsigned char xtraflags1,			       unsigned char xtraflags2){	void __iomem * docptr = doc->virtadr;	/* Allow for possible Mill Plus internal flash interleaving */	ofs >>= doc->interleave;	switch (numbytes) {	case 1:		/* Send single byte, bits 0-7. */		WriteDOC(ofs & 0xff, docptr, Mplus_FlashAddress);		break;	case 2:		/* Send bits 9-16 followed by 17-23 */		WriteDOC((ofs >> 9)  & 0xff, docptr, Mplus_FlashAddress);		WriteDOC((ofs >> 17) & 0xff, docptr, Mplus_FlashAddress);		break;	case 3:		/* Send 0-7, 9-16, then 17-23 */		WriteDOC(ofs & 0xff, docptr, Mplus_FlashAddress);		WriteDOC((ofs >> 9)  & 0xff, docptr, Mplus_FlashAddress);		WriteDOC((ofs >> 17) & 0xff, docptr, Mplus_FlashAddress);		break;	default:		return;	}	WriteDOC(0x00, docptr, Mplus_WritePipeTerm);	WriteDOC(0x00, docptr, Mplus_WritePipeTerm);}/* DoC_SelectChip: Select a given flash chip within the current floor */static int DoC_SelectChip(void __iomem * docptr, int chip){	/* No choice for flash chip on Millennium Plus */	return 0;}/* DoC_SelectFloor: Select a given floor (bank of flash chips) */static int DoC_SelectFloor(void __iomem * docptr, int floor){	WriteDOC((floor & 0x3), docptr, Mplus_DeviceSelect);	return 0;}/* * Translate the given offset into the appropriate command and offset. * This does the mapping using the 16bit interleave layout defined by * M-Systems, and looks like this for a sector pair: *  +-----------+-------+-------+-------+--------------+---------+-----------+ *  | 0 --- 511 |512-517|518-519|520-521| 522 --- 1033 |1034-1039|1040 - 1055| *  +-----------+-------+-------+-------+--------------+---------+-----------+ *  | Data 0    | ECC 0 |Flags0 |Flags1 | Data 1       |ECC 1    | OOB 1 + 2 | *  +-----------+-------+-------+-------+--------------+---------+-----------+ *//* FIXME: This lives in INFTL not here. Other users of flash devices   may not want it */static unsigned int DoC_GetDataOffset(struct mtd_info *mtd, loff_t *from){	struct DiskOnChip *this = mtd->priv;	if (this->interleave) {		unsigned int ofs = *from & 0x3ff;		unsigned int cmd;		if (ofs < 512) {			cmd = NAND_CMD_READ0;			ofs &= 0x1ff;		} else if (ofs < 1014) {			cmd = NAND_CMD_READ1;			ofs = (ofs & 0x1ff) + 10;		} else {			cmd = NAND_CMD_READOOB;			ofs = ofs - 1014;		}		*from = (*from & ~0x3ff) | ofs;		return cmd;	} else {		/* No interleave */		if ((*from) & 0x100)			return NAND_CMD_READ1;		return NAND_CMD_READ0;	}}static unsigned int DoC_GetECCOffset(struct mtd_info *mtd, loff_t *from){	unsigned int ofs, cmd;	if (*from & 0x200) {		cmd = NAND_CMD_READOOB;		ofs = 10 + (*from & 0xf);	} else {		cmd = NAND_CMD_READ1;		ofs = (*from & 0xf);	}	*from = (*from & ~0x3ff) | ofs;	return cmd;}static unsigned int DoC_GetFlagsOffset(struct mtd_info *mtd, loff_t *from){	unsigned int ofs, cmd;	cmd = NAND_CMD_READ1;	ofs = (*from & 0x200) ? 8 : 6;	*from = (*from & ~0x3ff) | ofs;	return cmd;}static unsigned int DoC_GetHdrOffset(struct mtd_info *mtd, loff_t *from){	unsigned int ofs, cmd;	cmd = NAND_CMD_READOOB;	ofs = (*from & 0x200) ? 24 : 16;	*from = (*from & ~0x3ff) | ofs;	return cmd;}static inline void MemReadDOC(void __iomem * docptr, unsigned char *buf, int len){#ifndef USE_MEMCPY	int i;	for (i = 0; i < len; i++)		buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);#else	memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len);#endif}static inline void MemWriteDOC(void __iomem * docptr, unsigned char *buf, int len){#ifndef USE_MEMCPY	int i;	for (i = 0; i < len; i++)		WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);#else	memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);#endif}/* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip){	int mfr, id, i, j;	volatile char dummy;	void __iomem * docptr = doc->virtadr;	/* Page in the required floor/chip */	DoC_SelectFloor(docptr, floor);	DoC_SelectChip(docptr, chip);	/* Millennium Plus bus cycle sequence as per figure 2, section 2.4 */	WriteDOC((DOC_FLASH_CE | DOC_FLASH_WP), docptr, Mplus_FlashSelect);	/* Reset the chip, see Software Requirement 11.4 item 1. */	DoC_Command(docptr, NAND_CMD_RESET, 0);	DoC_WaitReady(docptr);	/* Read the NAND chip ID: 1. Send ReadID command */	DoC_Command(docptr, NAND_CMD_READID, 0);	/* Read the NAND chip ID: 2. Send address byte zero */	DoC_Address(doc, 1, 0x00, 0, 0x00);	WriteDOC(0, docptr, Mplus_FlashControl);	DoC_WaitReady(docptr);	/* Read the manufacturer and device id codes of the flash device through	   CDSN IO register see Software Requirement 11.4 item 5.*/	dummy = ReadDOC(docptr, Mplus_ReadPipeInit);	dummy = ReadDOC(docptr, Mplus_ReadPipeInit);	mfr = ReadDOC(docptr, Mil_CDSN_IO);	if (doc->interleave)		dummy = ReadDOC(docptr, Mil_CDSN_IO); /* 2 way interleave */	id  = ReadDOC(docptr, Mil_CDSN_IO);	if (doc->interleave)		dummy = ReadDOC(docptr, Mil_CDSN_IO); /* 2 way interleave */	dummy = ReadDOC(docptr, Mplus_LastDataRead);	dummy = ReadDOC(docptr, Mplus_LastDataRead);	/* Disable flash internally */	WriteDOC(0, docptr, Mplus_FlashSelect);	/* No response - return failure */	if (mfr == 0xff || mfr == 0)		return 0;	for (i = 0; nand_flash_ids[i].name != NULL; i++) {		if (id == nand_flash_ids[i].id) {			/* Try to identify manufacturer */			for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {				if (nand_manuf_ids[j].id == mfr)					break;			}			printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "			       "Chip ID: %2.2X (%s:%s)\n", mfr, id,			       nand_manuf_ids[j].name, nand_flash_ids[i].name);			doc->mfr = mfr;			doc->id = id;			doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;			doc->erasesize = nand_flash_ids[i].erasesize << doc->interleave;			break;		}	}	if (nand_flash_ids[i].name == NULL)		return 0;	return 1;}/* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */static void DoC_ScanChips(struct DiskOnChip *this){	int floor, chip;	int numchips[MAX_FLOORS_MPLUS];	int ret;	this->numchips = 0;	this->mfr = 0;	this->id = 0;	/* Work out the intended interleave setting */	this->interleave = 0;	if (this->ChipID == DOC_ChipID_DocMilPlus32)		this->interleave = 1;	/* Check the ASIC agrees */	if ( (this->interleave << 2) !=	     (ReadDOC(this->virtadr, Mplus_Configuration) & 4)) {		u_char conf = ReadDOC(this->virtadr, Mplus_Configuration);		printk(KERN_NOTICE "Setting DiskOnChip Millennium Plus interleave to %s\n",		       this->interleave?"on (16-bit)":"off (8-bit)");		conf ^= 4;		WriteDOC(conf, this->virtadr, Mplus_Configuration);	}	/* For each floor, find the number of valid chips it contains */