?? ep2c8
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## $Id: ep2c8 897 2007-12-29 13:02:32Z arniml $## This program is free software; you can redistribute it and/or# modify it under the terms of the GNU General Public License# as published by the Free Software Foundation; either version 2# of the License, or (at your option) any later version.## This program is distributed in the hope that it will be useful,# but WITHOUT ANY WARRANTY; without even the implied warranty of# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the# GNU General Public License for more details.## You should have received a copy of the GNU General Public License# along with this program; if not, write to the Free Software# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA# 02111-1307, USA.## Written by H Hartley Sweeten <hsweeten@visionengravers.com>## Note:# The signals defined in this file are generic for any EP2C8/EP2C8A.# Signalnames according to Altera's package tables are set in the# package specific scripts.## **Testing Differential Pin Pairs**# Refer to the note in the original bsd-files for issues related to# testing differential pin pairs!## Pins T144-1/Q208-1/F256-C3 (BSC198) and T144-2/Q208-2/F256-F4 (BSC197)# are dedicated output pins (ASDO and nCSO respectively) when the MSEL# pins are connected to set the device in Active Serial programming mode.# This configuration file assumes that that mode is not used. Therefore,# they are specified as I/O pins.## | Version (4 bits) | Part number (16 bits) | Manufacturer Id (11 bits) | LSB (1 bit) |# IDCODE: | 0000 | 0010 0000 1011 0010 | 000 0110 1110 | 1 |## Documentation:# [1] Altera Corporation, "Cyclone II Device Handbook", CII5V1-3.2# [2] Altera Corporation, "Pin Information for the Cyclone(r) II EP2C8 & EP2C8A Devices", Version 1.8# [3] Altera Corporation, "EP2C8F256.BSD", Revision 1.03, 11/10/2006# [4] Altera Corporation, "EP2C8Q208.BSD", Revision 1.03, 11/10/2006# [5] Altera Corporation, "EP2C8T144.BSD", Revision 1.03, 11/10/2006register BYPASS 1register BSR 597register IOCSR 5640register DEVICE_ID 32register USERCODE 32instruction length 10instruction BYPASS 1111111111 BYPASSinstruction IDCODE 0000000110 DEVICE_IDinstruction USERCODE 0000000111 USERCODEinstruction CLAMP 0000001010 BYPASSinstruction SAMPLE/PRELOAD 0000000101 BSRinstruction EXTEST 0000001111 BSRinstruction CONFIG_IO 0000001101 IOCSRinstruction HIGHZ 0000001011 BYPASS # Bank VREFB Group Pin Name Optional Function(s) Configuration Function T144 Q208 F256 # ---- ----------- -------- -------------------- ---------------------- ---- ---- ----signal BSC198 # B1 VREFB1N0 IO ASDO ASDO 1 1 C3signal BSC197 # B1 VREFB1N0 IO nCSO nCSO 2 2 F4signal BSC196 # B1 VREFB1N0 IO LVDS15p CRC_ERROR 3 3 C1signal BSC195 # B1 VREFB1N0 IO LVDS15n CLKUSR 4 4 C2signal BSC194 # B1 VREFB1N0 IO LVDS14p 5 D5signal BSC193 # B1 VREFB1N0 IO LVDS14n 6 E5 # B1 VREFB1N0 VCCIO1 5 7signal BSC192 # B1 VREFB1N0 IO LVDS13p 8 F5 # B1 VREFB1N0 GND 6 9signal BSC191 # B1 VREFB1N0 IO LVDS13n 10signal BSC190 # B1 VREFB1N0 IO LVDS12p 11 D3signal BSC189 # B1 VREFB1N0 IO LVDS12n 12 D4 # B1 VREFB1N0 VCCIO1signal BSC188 # B1 VREFB1N0 IO VREFB1N0 7 13 F3signal BSC187 # B1 VREFB1N0 IO LVDS11p D2signal BSC186 # B1 VREFB1N0 IO LVDS11n D1signal BSC185 # B1 VREFB1N0 IO LVDS10p E3signal BSC184 # B1 VREFB1N0 IO LVDS10n E4 # B1 VREFB1N0 GNDsignal BSC183 # B1 VREFB1N0 IO G4signal BSC182 # B1 VREFB1N0 IO LVDS9p J6signal BSC181 # B1 VREFB1N0 IO LVDS9n H6signal BSC180 # B1 VREFB1N0 IO LVDS8p 8 14 E1signal BSC179 # B1 VREFB1N0 IO LVDS8n 9 15 E2 # B1 VREFB1N0 VCCIO1signal TDO # B1 VREFB1N0 TDO TDO 10 16 G2signal TMS # B1 VREFB1N0 TMS TMS 11 17 G1signal TCK # B1 VREFB1N0 TCK TCK 12 18 F2signal TDI # B1 VREFB1N0 TDI TDI 13 19 F5signal BSC178 # B1 VREFB1N0 DATA0 DATA0 DATA0 14 20 F1signal BSC177 # B1 VREFB1N0 DCLK DCLK DCLK 15 21 H4signal BSC176 # B1 VREFB1N0 nCE nCE 16 22 G5signal BSC175 # B1 VREFB1N0 CLK0 LVDSCLK0p/input(3) 17 23 H2signal BSC174 # B1 VREFB1N0 CLK1 LVDSCLK0n/input(3) 18 24 H1 # B1 VREFB1N0 GND 19 25signal BSC173 # B1 VREFB1N0 nCONFIG nCONFIG 20 26 J5signal BSC172 # B1 VREFB1N1 CLK2 LVDSCLK1p/input(3) 21 27 J2signal BSC171 # B1 VREFB1N1 CLK3 LVDSCLK1n/input(3) 22 28 J1 # B1 VREFB1N1 VCCIO1 23 29signal BSC170 # B1 VREFB1N1 IO LVDS7p 24 30 K2signal BSC169 # B1 VREFB1N1 IO LVDS7n 25 31 K1signal BSC168 # B1 VREFB1N1 IO LVDS6p K4 # B1 VREFB1N1 VCCINT 26 32signal BSC167 # B1 VREFB1N1 IO LVDS6n 33 K5signal BSC166 # B1 VREFB1N1 IO 34signal BSC165 # B1 VREFB1N1 IO LVDS5p 35 L1 # B1 VREFB1N1 GND 27 36signal BSC164 # B1 VREFB1N1 IO LVDS5n L2 # B1 VREFB1N1 GNDsignal BSC163 # B1 VREFB1N1 IO VREFB1N1 28 37 J4 # B1 VREFB1N1 VCCIO1signal BSC162 # B1 VREFB1N1 IO LVDS4p M1signal BSC161 # B1 VREFB1N1 IO LVDS4n M2signal BSC160 # B1 VREFB1N1 IO LVDS3p M3 # B1 VREFB1N1 GND 38signal BSC159 # B1 VREFB1N1 IO LVDS3n 39 L3signal BSC158 # B1 VREFB1N1 IO LVDS2p 40 N1signal BSC157 # B1 VREFB1N1 IO LVDS2n 41 N2signal BSC156 # B1 VREFB1N1 IO LVDS1p P1signal BSC155 # B1 VREFB1N1 IO LVDS1n P2 # B1 VREFB1N1 VCCIO1 29 42signal BSC154 # B1 VREFB1N1 IO 43signal BSC153 # B1 VREFB1N1 IO LVDS0p 44 N3signal BSC152 # B1 VREFB1N1 IO LVDS0n 45 N4signal BSC151 # B1 VREFB1N1 IO 30 46 P3signal BSC150 # B1 VREFB1N1 IO PLL1_OUTp 31 47 L4signal BSC149 # B1 VREFB1N1 IO PLL1_OUTn 32 48 M4 # B1 VREFB1N1 GND 33 49 # B1 VREFB1N1 GND_PLL1 34 50 L5 # B1 VREFB1N1 VCCD_PLL1 35 51 L6 # B1 VREFB1N1 GND_PLL1 36 52 N5 # B4 VREFB4N1 VCCA_PLL1 37 53 M5 # B4 VREFB4N1 GNDA_PLL1 38 54 M6 # B4 VREFB4N1 GND 39 55signal BSC148 # B4 VREFB4N1 IO LVDS77n DEV_OE 40 56 R3signal BSC147 # B4 VREFB4N1 IO LVDS77p 41 57 T3signal BSC146 # B4 VREFB4N1 IO LVDS76p 42 58 P5signal BSC145 # B4 VREFB4N1 IO LVDS76n 43 59 P4signal BSC144 # B4 VREFB4N1 IO LVDS75p 44 60 T4signal BSC143 # B4 VREFB4N1 IO LVDS75n 45 61 R4 # B4 VREFB4N1 VCCIO4 46 62signal BSC142 # B4 VREFB4N1 IO LVDS74p 47 63 T5 # B4 VREFB4N1 GNDsignal BSC141 # B4 VREFB4N1 IO LVDS74n 48 64 R5signal BSC140 # B4 VREFB4N1 IO N7signal BSC139 # B4 VREFB4N1 IO LVDS73p K7signal BSC138 # B4 VREFB4N1 IO LVDS73n K6 # B4 VREFB4N1 VCCIO4 # B4 VREFB4N1 GNDsignal BSC137 # B4 VREFB4N1 IO LVDS72p T6 # B4 VREFB4N1 GND 49 65signal BSC136 # B4 VREFB4N1 IO LVDS72n R6signal BSC135 # B4 VREFB4N1 IO LVDS71p P6signal BSC134 # B4 VREFB4N1 IO LVDS71n N6 # B4 VREFB4N1 VCCINT 50 66signal BSC133 # B4 VREFB4N1 IO VREFB4N1 51 67 N8 # B4 VREFB4N1 VCCIO4 # B4 VREFB4N1 GNDsignal BSC132 # B4 VREFB4N1 IO LVDS70p 52 68 T7signal BSC131 # B4 VREFB4N1 IO LVDS70n 69 R7signal BSC130 # B4 VREFB4N1 IO LVDS69p L7signal BSC129 # B4 VREFB4N1 IO LVDS69n L8signal BSC128 # B4 VREFB4N1 IO LVDS68p 53 70 T8 # B4 VREFB4N1 VCCIO4 54 71signal BSC127 # B4 VREFB4N1 IO LVDS68n 55 72 R8 # B4 VREFB4N1 GND 56 73signal BSC126 # B4 VREFB4N1 IO LVDS67p 57 74 T9signal BSC125 # B4 VREFB4N1 IO LVDS67n 58 75 R9signal BSC124 # B4 VREFB4N0 IO LVDS66p 59 76 N9signal BSC123 # B4 VREFB4N0 IO LVDS66n 60 77 N10 # B4 VREFB4N1 GND 61 78signal BSC122 # B4 VREFB4N0 IO LVDS65p T11 # B4 VREFB4N1 VCCINT 62 79signal BSC121 # B4 VREFB4N0 IO LVDS65n R11 # B4 VREFB4N1 VCCIO4signal BSC120 # B4 VREFB4N0 IO 80 P11 # B4 VREFB4N0 GNDsignal BSC119 # B4 VREFB4N0 IO LVDS64p 81 L9signal BSC118 # B4 VREFB4N0 IO LVDS64n 82 L10 # B4 VREFB4N0 VCCIO4 83signal BSC117 # B4 VREFB4N0 IO LVDS63p 84 R10 # B4 VREFB4N0 GND 85signal BSC116 # B4 VREFB4N0 IO LVDS63n 86 T10signal BSC115 # B4 VREFB4N0 IO LVDS62p 87 K11signal BSC114 # B4 VREFB4N0 IO LVDS62n 88 K10signal BSC113 # B4 VREFB4N0 IO VREFB4N0 63 89 N11signal BSC112 # B4 VREFB4N0 IO LVDS61p 90 P12 # B4 VREFB4N0 VCCIO4 91signal BSC111 # B4 VREFB4N0 IO LVDS61n 92 P13 # B4 VREFB4N0 GND 93signal BSC110 # B4 VREFB4N0 IO LVDS60p 64 94 T12signal BSC109 # B4 VREFB4N0 IO LVDS60n 65 95 R12signal BSC108 # B4 VREFB4N0 IO 96signal BSC107 # B4 VREFB4N0 IO LVDS59p 97 T13 # B4 VREFB4N0 VCCIO4 66 98signal BSC106 # B4 VREFB4N0 IO LVDS59n 67 99 R13 # B4 VREFB4N0 GND 68 100signal BSC105 # B4 VREFB4N0 IO LVDS58p 69 101 T14signal BSC104 # B4 VREFB4N0 IO LVDS58n 70 102 R14signal BSC103 # B4 VREFB4N0 IO LVDS57p 71 103 M11signal BSC102 # B4 VREFB4N0 IO LVDS57n 72 104 L11signal BSC101 # B3 VREFB3N1 IO LVDS56n 73 105 N12signal BSC100 # B3 VREFB3N1 IO LVDS56p 74 106 M12signal BSC099 # B3 VREFB3N1 IO LVDS55n L12signal BSC098 # B3 VREFB3N1 IO LVDS55p K13signal BSC097 # B3 VREFB3N1 IO LVDS54n INIT_DONE 75 107 N13signal BSC096 # B3 VREFB3N1 IO LVDS54p nCEO 76 108 N14 # B3 VREFB3N1 VCCIO3 77 109signal BSC095 # B3 VREFB3N1 IO LVDS53n 110 P15 # B3 VREFB3N1 GND 78 111signal BSC094 # B3 VREFB3N1 IO LVDS53p 112 P16signal BSC093 # B3 VREFB3N1 IO LVDS52n 113 N15signal BSC092 # B3 VREFB3N1 IO LVDS52p 114 N16signal BSC091 # B3 VREFB3N1 IO P14signal BSC090 # B3 VREFB3N1 IO LVDS51n 115signal BSC089 # B3 VREFB3N1 IO LVDS51p 116signal BSC088 # B3 VREFB3N1 IO VREFB3N1 79 117 M14signal BSC087 # B3 VREFB3N1 IO LVDS50n M15 # B3 VREFB3N1 VCCIO3signal BSC086 # B3 VREFB3N1 IO LVDS50p M16 # B3 VREFB3N1 GNDsignal BSC085 # B3 VREFB3N1 IO 118 # B3 VREFB3N1 GND 80 119signal BSC084 # B3 VREFB3N1 IO L14signal BSC083 # B3 VREFB3N1 IO LVDS49n L15signal BSC082 # B3 VREFB3N1 IO LVDS49p L16 # B3 VREFB3N1 VCCINT 81 120signal BSC081 # B3 VREFB3N1 nSTATUS nSTATUS 82 121 M13 # B3 VREFB3N1 VCCIO3 122signal BSC080 # B3 VREFB3N1 CONF_DONE CONF_DONE 83 123 L13 # B3 VREFB3N1 GND 124signal BSC079 # B3 VREFB3N1 MSEL1 MSEL1 84 125 K12signal BSC078 # B3 VREFB3N1 MSEL0 MSEL0 85 126 J13signal BSC077 # B3 VREFB3N1 IO LVDS48n 86 127 K16signal BSC076 # B3 VREFB3N1 IO LVDS48p 87 128 K15signal BSC075 # B3 VREFB3N1 CLK7 LVDSCLK3n/input(3) 88 129 J16signal BSC074 # B3 VREFB3N1 CLK6 LVDSCLK3p/input(3) 89 130 J15signal BSC073 # B3 VREFB3N0 CLK5 LVDSCLK2n/input(3) 90 131 H15signal BSC072 # B3 VREFB3N0 CLK4 LVDSCLK2p/input(3) 91 132 H16signal BSC071 # B3 VREFB3N0 IO LVDS47n 92 133 H12signal BSC070 # B3 VREFB3N0 IO LVDS47p 93 134 J12signal BSC069 # B3 VREFB3N0 IO LVDS46n 94 135 G16 # B3 VREFB3N0 VCCIO3 95 136signal BSC068 # B3 VREFB3N0 IO LVDS46p 96 137 G15signal BSC067 # B3 VREFB3N0 IO LVDS46n 97 138 F15signal BSC066 # B3 VREFB3N0 IO LVDS45p 139 F16 # B3 VREFB3N0 GND 98 140signal BSC065 # B3 VREFB3N0 IO LVDS44n 141 J11signal BSC064 # B3 VREFB3N0 IO LVDS44p 142 H11signal BSC063 # B3 VREFB3N0 IO LVDS43n G12signal BSC062 # B3 VREFB3N0 IO LVDS43p G13signal BSC061 # B3 VREFB3N0 IO LVDS32n 143 E13signal BSC060 # B3 VREFB3N0 IO LVDS42p 144 F13signal BSC059 # B3 VREFB3N0 IO VREFB3N0 99 145 H13 # B3 VREFB3N0 VCCIO3signal BSC058 # B3 VREFB3N0 IO LVDS41n D15signal BSC057 # B3 VREFB3N0 IO LVDS41p D16signal BSC056 # B3 VREFB3N0 IO LVDS40n E15 # B3 VREFB3N0 GNDsignal BSC055 # B3 VREFB3N0 IO LVDS40p E16signal BSC054 # B3 VREFB3N0 IO F14signal BSC053 # B3 VREFB3N0 IO LVDS39n 100 146 C15signal BSC052 # B3 VREFB3N0 IO LVDS39p 101 147 C16 # B3 VREFB3N0 VCCIO3 102 148signal BSC051 # B3 VREFB3N0 IO LVDS38n 149 C14signal BSC050 # B3 VREFB3N0 IO LVDS38p 150 D13signal BSC049 # B3 VREFB3N0 IO PLL2_OUTp 103 151 E14signal BSC048 # B3 VREFB3N0 IO PLL2_OUTn 104 152 D14 # B3 VREFB3N0 GND 105 153 # B3 VREFB3N0 GND_PLL2 106 154 F12 # B3 VREFB3N0 VCCD_PLL2 107 155 F11 # B3 VREFB3N0 GND_PLL2 108 156 D12 # B2 VREFB2N0 VCCA_PLL2 109 157 E12 # B2 VREFB2N0 GNDA_PLL2 110 158 E11 # B2 VREFB2N0 GND 111 159signal BSC047 # B2 VREFB2N0 IO LVDS37n 112 160 B14signal BSC046 # B2 VREFB2N0 IO LVDS37p 113 161 A14signal BSC045 # B2 VREFB2N0 IO LVDS36n 114 162 C13signal BSC044 # B2 VREFB2N0 IO LVDS36p 115 163 C12signal BSC043 # B2 VREFB2N0 IO LVDS35n 164 B13signal BSC042 # B2 VREFB2N0 IO LVDS35p 165 A13 # B2 VREFB2N0 VCCIO2 116 166 # B2 VREFB2N0 GND 117 167signal BSC041 # B2 VREFB2N0 IO LVDS34n 118 168 B12signal BSC040 # B2 VREFB2N0 IO LVDS34p 119 169 A12signal BSC039 # B2 VREFB2N0 IO VREFB2N0 120 170 C11signal BSC038 # B2 VREFB2N0 IO LVDS33n 121 171 B11 # B2 VREFB2N0 VCCIO2 172signal BSC037 # B2 VREFB2N0 IO LVDS33p 122 173 A11 # B2 VREFB2N0 GND 174signal BSC036 # B2 VREFB2N0 IO LVDS32n G10signal BSC035 # B2 VREFB2N0 IO LVDS32p G11signal BSC034 # B2 VREFB2N0 IO LVDS31n 175 B10 # B2 VREFB2N0 VCCIO2signal BSC033 # B2 VREFB2N0 IO LVDS21p 176 A10 # B2 VREFB2N0 GNDsignal BSC032 # B2 VREFB2N0 IO LVDS30n F10signal BSC031 # B2 VREFB2N0 IO LVDS30p F9signal BSC030 # B2 VREFB2N0 IO D9 # B2 VREFB2N0 GND 123 177 # B2 VREFB2N0 VCCINT 124 178signal BSC029 # B2 VREFB2N0 IO LVDS29n 125 179 D11 # B2 VREFB2N0 VCCIO2signal BSC028 # B2 VREFB2N0 IO LVDS29p 126 180 D10 # B2 VREFB2N0 GNDsignal BSC027 # B2 VREFB2N0 IO LVDS28n 181 A9signal BSC026 # B2 VREFB2N0 IO LVDS28p 182 B9signal BSC025 # B2 VREFB2N1 IO LVDS27n A8signal BSC024 # B2 VREFB2N1 IO LVDS27p B8 # B2 VREFB2N1 VCCIO2 127 183signal BSC023 # B2 VREFB2N1 IO LVDS26n A7 # B2 VREFB2N1 GND 128 184signal BSC022 # B2 VREFB2N1 IO LVDS26p 129 185 B7 # B2 VREFB2N1 GND 130 186signal BSC021 # B2 VREFB2N1 IO LVDS25n 187 F7signal BSC020 # B2 VREFB2N1 IO LVDS25p 188 F8signal BSC019 # B2 VREFB2N1 IO LVDS24n 189 # B2 VREFB2N1 VCCINT 131 190signal BSC018 # B2 VREFB2N1 IO LVDS24p 191signal BSC017 # B2 VREFB2N1 IO VREFB2N1 132 192 D8signal BSC016 # B2 VREFB2N1 IO LVDS23n 133 193 B6 # B2 VREFB2N1 VCCIO2 194signal BSC015 # B2 VREFB2N1 IO LVDS23p 134 195 A6 # B2 VREFB2N1 GND 196signal BSC014 # B2 VREFB2N1 IO LVDS22n G6signal BSC013 # B2 VREFB2N1 IO LVDS22p G7signal BSC012 # B2 VREFB2N1 IO D7signal BSC011 # B2 VREFB2N1 IO LVDS21n 197 D6 # B2 VREFB2N1 VCCIO2signal BSC010 # B2 VREFB2N1 IO LVDS21p 198 C6 # B2 VREFB2N1 GNDsignal BSC009 # B2 VREFB2N1 IO LVDS20n C5signal BSC008 # B2 VREFB2N1 IO LVDS20p C4signal BSC007 # B2 VREFB2N1 IO LVDS19n 135 199 B5signal BSC006 # B2 VREFB2N1 IO LVDS19p 136 200 A5signal BSC005 # B2 VREFB2N1 IO LVDS18n 137 201 B4 # B2 VREFB2N1 VCCIO2 138 202signal BSC004 # B2 VREFB2N1 IO LVDS18p 139 203 A4 # B2 VREFB2N1 GND 140 204signal BSC003 # B2 VREFB2N1 IO LVDS17p 141 205 A3signal BSC002 # B2 VREFB2N1 IO LVDS17n DEV_CLRn 142 206 B3signal BSC001 # B2 VREFB2N1 IO LVDS16p 143 207 E6signal BSC000 # B2 VREFB2N1 IO LVDS16n 144 208 F6 # VCCINT G9 # VCCINT H7 # VCCINT H10 # VCCINT J7 # VCCINT J10 # VCCINT K8 # VCCIO1 B1 # VCCIO1 G3 # VCCIO1 K3 # VCCIO1 R1 # VCCIO4 M7 # VCCIO4 M10 # VCCIO4 P7 # VCCIO4 P10 # VCCIO4 T2 # VCCIO4 T15 # VCCIO3 B16 # VCCIO3 G14 # VCCIO3 K14 # VCCIO3 R16 # VCCIO2 A2 # VCCIO2 A15 # VCCIO2 C7 # VCCIO2 C10 # VCCIO2 E7 # VCCIO2 E10 # GND G8 # GND H8 # GND H9 # GND J8 # GND J9 # GND K9 # GND A1 # GND A16 # GND B2 # GND B15 # GND C8 # GND C9 # GND E8 # GND E9 # GND H3 # GND H14 # GND J3 # GND J14 # GND M8 # GND M9 # GND P8 # GND P9 # GND R2 # GND R15 # GND T1 # GND T16## BSC group 198# T144 - I/O pin 1 (dedicated output pin in AS mode)# Q208 - I/O pin 1 (dedicated output pin in AS mode)# F256 - I/O pin C3 (dedicated output pin in AS mode)#bit 596 O 1 BSC198 595 1 Zbit 595 C 1 *bit 594 I 1 BSC198## BSC group 197# T144 - I/O pin 2 (dedicated output pin in AS mode)# Q208 - I/O pin 2 (dedicated output pin in AS mode)# F256 - I/O pin F4 (dedicated output pin in AS mode)#bit 593 O 1 BSC197 592 1 Zbit 592 C 1 *bit 591 I 1 BSC197## BSC group 196# T144 - I/O pin 3# Q208 - I/O pin 3# F256 - I/O pin C1#bit 590 O 1 BSC196 589 1 Zbit 589 C 1 *bit 588 I 1 BSC196## BSC group 195# T144 - I/O pin 4# Q208 - I/O pin 4# F256 - I/O pin C2#bit 587 O 1 BSC195 586 1 Zbit 586 C 1 *bit 585 I 1 BSC195## BSC group 194 for# T144 - unused pad?? 快捷鍵說明
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