Wed Dec 31 12:29:47 1997  Jeffrey A Law  (law@cygnus.com)	* config/tc-mn10200.c (md_relax_table): Correct branch ranges.Mon Dec 22 13:06:05 1997  Joel Sherrill  <joel@oarcorp.com>        * configure.in (i386*-go32-rtems*): Fix to be the same as	i[3456]86-go32.	* configure: Rebuild.Mon Dec 22 12:54:07 1997  Ian Lance Taylor  <ian@cygnus.com>	* config/tc-mips.c (macro): The 4650 doesn't permit M_LDC1_AB,	M_SDC1_AB, M_L_DOB, M_L_DAB, M_S_DAB, or M_S_DOB.	(mips_ip): Always check for FP_D, not just for instructions that	are not part of the regular ISA.Thu Dec 18 16:49:28 1997  Richard Henderson  <rth@cygnus.com>	* config/tc-d10v.c (build_insn): Make `number' a long for 64-bit hosts.Thu Dec 18 16:42:57 1997  Richard Henderson  <rth@cygnus.com>	* config/tc-alpha.c (cpu_types): 21164pc/pca56 does not have CIX.Wed Dec 17 21:23:07 1997  Jeffrey A Law  (law@cygnus.com)	* expr.c (integer_constant 32bit bignum): Mask off bits outside	the range we care about.Wed Dec 17 15:29:03 1997  Michael Meissner  <meissner@cygnus.com>	* config/tc-d30v.c (md_shortopts): Add 'n' and 'N' options.	(exec_type_enum): Enumeration giving all of the exec types.	(warn_nops): New static variable to give nop warning level.	({cur,prev}_mul32_p): New static variable to keep track of whether	the current/previous instruction is a 32-bit multiply.	(Optimizing): Make static.	(NOP{2,_LEFT,_RIGHT}): Macros for word of nops and left/right	nops.	(d30v_insert_operand): Delete declaration of unused function.	(write_2_short): Make exec_type argument enum, not int.	(parallel_ok): Ditto.	(check_range): Delete unused variable(s).	(build_insn): Ditto.	(find_format): Ditto.	(md_apply_fix3): Ditto.	(md_show_usage): Document -n and -N.	(md_parse_option): Parse -n and -N.	(write_1_short): If -n, warn about adding a nop.  Use	NOP_{LEFT,RIGHT}.	(write_2_short): Use enumeration values instead of hard coded	integers.  Reset exec_type for default operations.  For explicit	parallel operations, call parallel_ok to make sure everything is	ok.  If writing out a parallel operation, and the previous	instruction was a 32-bit multiply, indicate current instruction	is.	(parallel_ok): Allow add/tx ... to be done in parallel with	another add/tx ... assuming the gpr registers don't overlap.	(md_assemble): Use exec type enumeration values, not hard coded	ints.  Check for loads or 16-bit multiplies following in the next	cycle after a 32-bit multiply.  Add nops if that is the case.	(do_assemble): Copy prev_mul32_p to cur_mul32_p, and set	cur_mul32_p if current instruction is a 32-bit multiply.	(find_format): Change spacing and layout.Tue Dec 16 16:55:45 1997  Fred Fish  <fnf@cygnus.com>	* config/tc-tic80.c (tic80_relax): New static variable.	(md_longopts): Add new OPTION_RELAX and OPTION_NO_RELAX options.	(md_parse_option): Handle new relax options.	(md_show_usage): Document new relax options.	(find_opcode): Don't use short forms of PC relative branches if	tic80_relax is set.Tue Dec 16 15:26:03 1997  Michael Meissner  <meissner@cygnus.com>	* config/tc-d30v.c (parallel_ok): Remove non-register bits from	used/set flag fields.  Make flag vars unsigned long.  Use	FLAG_A{0,1} for accumulators.  Allow any 2 insns to be done in	parallel if they use the same conditional flag with reversed	meaning.  Allow 2 add/sub insns that set the carry or overflow	flags but do not query them to be done in parallel.  Don't allow 2	word store operations to be done in parallel with ADDppp or	SUBppp.  Don't allow loads to be done in parallel with 16 bit	multiplies.Tue Dec 16 09:20:43 1997  Nick Clifton  <nickc@cygnus.com>	* config/tc-arm.c: Prevent use of interworking support for	non-COFF targets.Mon Dec 15 15:20:32 1997  Nick Clifton  <nickc@cygnus.com>	* doc/all.texi: Add M32R cpu.	* doc/as.texinfo: Add documentation of m32r processor.	* doc/c-m32r.texi: New file, documenting m32r specific features.  Mon Dec 15 10:32:28 1997  Jeffrey A Law  (law@cygnus.com)	* config/tc-mips.c (mips_ip): Correctly insert 'P' operands into	the instruction.Fri Dec 12 11:44:20 1997  Fred Fish  <fnf@cygnus.com>	* config/tc-tic80.c (build_insn): Handle instructions that have	long (32 bit) PC relative offsets.  Fix places that previously	misused R_MPPCR for 15 bit offsets to use the new R_MPPCR15W type.	(md_apply_fix): Add case to handle long PC relative offsets.Fri Dec 12 10:35:01 1997  Nick Clifton  <nickc@cygnus.com>	* doc/c-arm.texi (ARM Options): Document support for new ARM	processor names.	* config/tc-arm.c (md_parse_option): Add support for new ARM	processor names.Thu Dec 11 17:46:50 1997  Richard Henderson  <rth@cygnus.com>	* config/tc-m68k.c (m68k_ip): Don't overwrite opcode table data.	(insop, m68k_ip): Make `opcode' const so it doesn't happen again.Fri Dec  5 11:23:59 1997  Nick Clifton  <nickc@cygnus.com>	* config/tc-v850.c (md_assemble): Fix BFD_RELOC_32 against a	symbol + offset.	* config/tc-v850.h (ELF_TC_SPECIAL_SECTIONS): Use	SHT_V850_{S|T|Z}COMMON to mark special common sections.Tue Dec  2 17:05:13 1997  Nick Clifton  <nickc@cygnus.com>	* config/tc-v850.c: Brought up to date with the branch.Mon Dec  1 20:24:18 1997  J"orn Rennecke <amylaar@cygnus.co.uk>	* config/tc-sh.c (SWITCH_TABLE_CONS): Handle (fix)->fx_size == 1.	(SWITCH_TABLE): Handle BFD_RELOC_8.	(md_apply_fix): #ifndef BFD_ASSEMBLER code: Handle fixP->fx_size == 1.	(coff_reloc_map): Add BFD_RELOC_8_PCREL entry.	(sh_coff_reloc_mangle): SWITCH_TABLE case: Handle BFD_RELOC_8.Sat Nov 22 16:19:22 1997  Richard Henderson  <rth@cygnus.com>	* tc-alpha.c (range_signed_16, range_signed_32): Work around an	apparent bug in gcc's long long support crossing from x86.Sat Nov 22 14:26:09 1997  Nick Clifton  <nickc@cygnus.com>	* config/tc-arm.c: Brought up to date with latest changes on arm	branch. Sat Nov 22 15:50:09 1997  Klaus Kaempf  <kkaempf@progis.de>	* config-gas.com: Get version info from configure.in.	* makefile.vms: include depend.obj in OBJS.	* config/tc-alpha.c (s_alpha_section): Remove ".lcomm" handling.	* config/tc-alpha.c (alpha_basereg_clobbered): Remove variable and	all corresponding code.Thu Nov 20 15:06:08 1997  Richard Earnshaw <rearnsha@arm.com>	* config/tc-arm.h (TARGET_FORMAT for generic a.out targets): Allow	run-time endian selection.Wed Nov 19 17:44:42 1997  Richard Henderson  <rth@cygnus.com>        * tc-sh.c (parse_reg): Properly quote for fv4.Wed Nov 19 23:46:18 1997  Ian Lance Taylor  <ian@cygnus.com>	* symbols.c (resolve_symbol_value): Add missing breaks in case on	symbol value operator.Tue Nov 18 18:45:14 1997  J"orn Rennecke  <amylaar@cygnus.co.uk>	* config/tc-d10v.c (parallel_ok, find_opcode): 	Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG.Sun Nov 16 10:05:07 1997  Fred Fish  <fnf@cygnus.com>	* config/obj-coff.c (fixup_segment): Cast second arg of	md_apply_fix3 call to type "valueT *".Thu Nov 13 13:53:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>	* configure.in (emulations): Make FreeBSD an aout / i386bsd 	variant.	* configure: Re-generate.	Thu Nov 13 11:07:14 1997  Gavin Koch  <gavin@cygnus.com>	* config/tc-mips.c (macro_build): Use the membership field	for INSN_MACRO's.	(mips_ip): Same.Thu Nov 13 02:04:55 1997  J"orn Rennecke  <amylaar@cygnus.co.uk>	* config/tc-d10v.c (find_opcode): For OPCODE_FAKE, add check for	first argument if it's supposed to be a register.Tue Nov 11 19:25:05 1997  J"orn Rennecke  <amylaar@cygnus.co.uk>	* app.c (do_scrub_chars):  If d10v, re-insert a space before	a '#' when in state 10.Tue Nov 11 13:33:15 1997  Ian Lance Taylor  <ian@cygnus.com>	* config/tc-h8300.c: Include "subsegs.h".	(tc_reloc_mangle): Handle references to symbols which are not	being output, so that references to `.' work.Mon Nov 10 13:43:33 1997  Ian Lance Taylor  <ian@cygnus.com>	* config/tc-m68k.c (m68k_ip): Call add_fix when needed for '_'	case.	* macro.c (sub_actual): If we don't find a parameter for an &,	just substitute &.Fri Nov  7 21:29:32 1997  Ken Raeburn  <raeburn@cygnus.com>	* config/tc-mips.c (mips_ip): In default case, call as_bad	instead of fprintf, to get "assembler messages:" message output	before instead of after.Fri Nov  7 10:36:22 1997  Doug Evans  <devans@canuck.cygnus.com>	* frags.h: Handle multiple inclusion.Wed Nov  5 10:51:49 1997  Doug Evans  <devans@canuck.cygnus.com>	Based on a patch from Ian.Dall@dsto.defence.gov.au.	* as.h (struct frag, frag support): Moved from here.	* frags.h: To here.	(struct frag, member tc_frag_data): New member if TC_FRAG_TYPE	is defined.	(struct frag, member fr_cgen): Renamed from fr_targ.cgen.	* cgen.c (cgen_asm_finish_insn): Update.	* config/tc-m32r.c (md_estimate_size_before_relax): Update.	* config/tc-m32r.h (TC_FRAG_INIT): Renamed from md_init_frag.	(md_convert_frag): Ditto.	* config/tc-ns32k.h (TC_FRAG_TYPE): Define.	(frag_opcode_frag,frag_opcode_offset,frag_bsr): Update.	(TC_FRAG_INIT): Update.Tue Nov  4 16:35:57 1997  Ian Dall  <Ian.Dall@dsto.defence.gov.au>	* write.c (print_fixup): Use TC_FIX_DATA_PRINT (if defined) to	print out MD fields of fix.	* frags.c (frag_var, frag_variant): Use TC_FRAG_INIT macro (if 	defined) to initialize MD fields in frag.	* as.h (struct frag, ns32k support): Rename ns32k to fr_ns32k.	Delete pcrel_adjust.  Add fr_opcode_fragP, fr_opcode_offset.	* config/tc-ns32k.h: Add comments. Remove obsolete 	BFD_FAST_SECTION_FILL definition, change prototypes for 	fix_new_ns32k and fix_new_ns32k_exp to add new arguments 	opcode_frag and opcode_offset and remove pcrel_adjust.	(TC_FIX_TYPE): add opcode_fragP and opcode_offset fields.	(TC_FIX_DATA_PRINT): new macro to print out TC_FIX_TYPE.	(TC_FRAG_INIT): new macro to initialize machine dependent field in 	frags.	(frag_opcode_frag, frag_opcode_offset, frag_bsr): macros to access 	MD fields in frag structure.	(fix_im_disp, fix_bit_fixP, fix_opcode_frag, fix_opcode_offset, 	fix_bsr): macros to access MD fields in fix structure.	* config/tc-ns32k.c: Avoid overlength lines. Align comments.  Don't 	use struct opcode_location as these fields are now in the frag	structure.	(convert_iif): Call frag_more as it is needed instead 	of trying to allocate for the whole insn. Avoid call of frag_more 	with negative argument.	(md_pcrel_adjust, md_fix_pcrel_adjust, md_apply_fix,	md_estimate_size_before_relax, md_pcrel_from,	tc_aout_fix_to_chars): use accessor macros to get md fields in fix 	and frag structures.	(fix_new_ns32k, fix_new_ns32k_exp): add new arguments opcode_frag and	opcode_offset and remove pcrel_adjust.	(convert_iif, cons_fix_new_ns32k): call fix_new_ns32k, 	fix_new_ns32k_exp with changed arguments.Mon Nov  3 13:30:17 1997  Gavin Koch  <gavin@cygnus.com>	* tc-mips.c (md_begin): Reorganize setting of default values so	that mips_cpu depends on TARGET_CPU, and mips_opts.isa depends on	mips_cpu.	(md_parse_option): Remove all code that sets defaults; md_begin	handles all of this now.Sun Nov  2 14:46:09 1997  Ian Lance Taylor  <ian@cygnus.com>	* Makefile.am (STAGESTUFF): Change bin_PROGRAMS to	noinst_PROGRAMS.	(bootstrap, bootstrap2, bootstrap3): Likewise.	* Makefile.in: Rebuild.	* config/tc-ppc.c (ppc_fix_adjustable): Don't adjust relocs in the	TOC section to be against the csect.Fri Oct 31 18:19:55 1997  Ken Raeburn  <raeburn@cygnus.com>	* config/tc-mips.c (validate_mips_insn): New function, checks	match versus mask bits, and also verifies that all bits to be	output are actually specified somewhere.	(md_begin): Call it for 32-bit instructions, instead of doing	match/mask check here.  In case of failure, print a message, but	check the rest of the opcode table before exiting.Thu Oct 30 13:46:20 1997  Nick Clifton  <nickc@cygnus.com>	* config/tc-arm.c (md_apply_fix3): Fix thumb ADR pseudo op.  Patch	from Tony Thompson at ARM: athompso@arm.comThu Oct 30 11:11:26 1997  Michael Meissner  <meissner@cygnus.com>	* config/tc-d30v.c (build_insn): Allow odd registers for ld2w and	friends.Fri Oct 24 15:56:47 1997  Ian Lance Taylor  <ian@cygnus.com>	* config/tc-ppc.c (md_assemble): When handling @l, always sign	extend if the operand expects a signed value.	* config/tc-mips.h (LOCAL_LABELS_DOLLAR): Don't define; use	default which is to permit dollar labels.Fri Oct 24 11:19:22 1997  Jakub Jelinek  <jj@sunsite.mff.cuni.cz>	* config/tc-sparc.c (sparc_memory_model): New variable.	(md_longopts): Add -TSO/-PSO/-RMO options.	(md_parse_options): Handle them.	(sparc_elf_final_processing): For 64 ELF, set required	memory ordering in e_flags. Default to RMO and let the user	override it through command line.	* config/tc-sparc.h (elf_tc_final_processing): Add.Wed Oct 22 17:42:12 1997  Richard Henderson  <rth@cygnus.com>	* config/tc-sparc.c (v9a_asr_table): New variable.	(sparc_ip): Handle v9a asr's.	Patch from David Miller <davem@vger.rutgers.edu>.Wed Oct 22 17:22:59 1997  Richard Henderson  <rth@cygnus.com>	* config/tc-sparc.h (md_do_align): New macro.	* config/tc-sparc.c (sparc_handle_align): Handle rs_align_code.	Patch from Jakub Jelinek <jj@sunsite.mff.cuni.cz>.Wed Oct 22 12:51:18 1997  Ian Lance Taylor  <ian@cygnus.com>	* config/tc-sh.c (sh_small): New variable.	(OPTION_SMALL): Define.	(md_longopts): Add "small".	(md_parse_option): Handle OPTION_SMALL.	(md_show_usage): Mention -small.	* config/tc-sh.h (sh_small): Declare.	(SUB_SEGMENT_ALIGN): Handle sh_small.	* config/obj-coff.h (TARGET_FORMAT): Check sh_small in TC_SH	case.	* config/tc-mips.c (macro): Correct handling of constant in M_LI_D	case in little endian mode.