{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[6\] " "Warning: The bidir \"IOPORT\[6\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[7\] " "Warning: The bidir \"IOPORT\[7\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[8\] " "Warning: The bidir \"IOPORT\[8\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[9\] " "Warning: The bidir \"IOPORT\[9\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[10\] " "Warning: The bidir \"IOPORT\[10\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[11\] " "Warning: The bidir \"IOPORT\[11\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[12\] " "Warning: The bidir \"IOPORT\[12\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[13\] " "Warning: The bidir \"IOPORT\[13\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "IOPORT\[14\] " "Warning: The bidir \"IOPORT\[14\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 115 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[0\] " "Warning: The bidir \"DSP_DATA\[0\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[1\] " "Warning: The bidir \"DSP_DATA\[1\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[2\] " "Warning: The bidir \"DSP_DATA\[2\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[3\] " "Warning: The bidir \"DSP_DATA\[3\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[4\] " "Warning: The bidir \"DSP_DATA\[4\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[5\] " "Warning: The bidir \"DSP_DATA\[5\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[6\] " "Warning: The bidir \"DSP_DATA\[6\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "DSP_DATA\[7\] " "Warning: The bidir \"DSP_DATA\[7\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 69 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "GPIOB\[8\] " "Warning: The bidir \"GPIOB\[8\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "GPIOB\[9\] " "Warning: The bidir \"GPIOB\[9\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "GPIOB\[10\]~5 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus GPIOB\[10\]~5 that it feeds" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "GPIOB\[11\]~4 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus GPIOB\[11\]~4 that it feeds" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "GPIOB\[12\]~3 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus GPIOB\[12\]~3 that it feeds" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "GPIOB\[13\]~2 " "Warning: Inserted an always-enabled tri-state buffer between logic and the tri-state bus GPIOB\[13\]~2 that it feeds" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Inserted an always-enabled tri-state buffer between logic and the tri-state bus %1!s! that it feeds" 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "GPIOB\[15\] " "Warning: The bidir \"GPIOB\[15\]\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_DISABLED_TRI" "SPI_SIMO " "Warning: The bidir \"SPI_SIMO\" has no source; inserted an always disabled tri-state buffer." {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 76 -1 0 } }  } 0 0 "The bidir \"%1!s!\" has no source; inserted an always disabled tri-state buffer." 0 0 "" 0}
{ "Info" "IOPT_MLS_PRESET_POWER_UP" "" "Info: Registers with preset signals will power-up high" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 176 -1 0 } }  } 0 0 "Registers with preset signals will power-up high" 0 0 "" 0}
{ "Warning" "WOPT_MLS_ENABLED_OE" "" "Warning: TRI or OPNDRN buffers permanently enabled" { { "Warning" "WOPT_MLS_NODE_NAME" "GPIOB\[10\]~15 " "Warning: Node \"GPIOB\[10\]~15\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIOB\[11\]~16 " "Warning: Node \"GPIOB\[11\]~16\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIOB\[12\]~17 " "Warning: Node \"GPIOB\[12\]~17\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPIOB\[13\]~18 " "Warning: Node \"GPIOB\[13\]~18\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "GPB~0 " "Warning: Node \"GPB~0\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 142 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0} { "Warning" "WOPT_MLS_NODE_NAME" "CPLDSPI_SIMO~2 " "Warning: Node \"CPLDSPI_SIMO~2\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 84 -1 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "TRI or OPNDRN buffers permanently enabled" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "NMI GND " "Warning (13410): Pin \"NMI\" stuck at GND" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 66 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "INT2 GND " "Warning (13410): Pin \"INT2\" stuck at GND" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 68 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "DACSn GND " "Warning (13410): Pin \"DACSn\" stuck at GND" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 110 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "WEn " "Info: Promoted clock signal driven by pin \"WEn\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "" 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0 "" 0}
{ "Warning" "WMTM_TRI_TO_BIDIR_AND_OUTPUT_PIN" "CPLD_SCL GPIOB\[8\] " "Warning: Output pin \"CPLD_SCL\" driven by bidirectional pin \"GPIOB\[8\]\" not tri-stated" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 81 -1 0 } } { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 71 -1 0 } }  } 0 0 "Output pin \"%1!s!\" driven by bidirectional pin \"%2!s!\" not tri-stated" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "4 " "Warning: Design contains 4 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "DSPCLK_OUT " "Warning (15610): No output dependent on input pin \"DSPCLK_OUT\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 61 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "R_Wn " "Warning (15610): No output dependent on input pin \"R_Wn\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 62 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "READY " "Warning (15610): No output dependent on input pin \"READY\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 65 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "USB_FLAGA " "Warning (15610): No output dependent on input pin \"USB_FLAGA\"" {  } { { "L:/MYDSP2812/MYDSP2812.v" "" { Text "L:/MYDSP2812/MYDSP2812.v" 90 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "179 " "Info: Implemented 179 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "26 " "Info: Implemented 26 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "31 " "Info: Implemented 31 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_BIDIRS" "35 " "Info: Implemented 35 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_MCELLS" "74 " "Info: Implemented 74 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0 "" 0} { "Info" "ICUT_CUT_TM_SEXPS" "13 " "Info: Implemented 13 shareable expanders" {  } {  } 0 0 "Implemented %1!d! shareable expanders" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 65 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 65 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "142 " "Info: Allocated 142 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Apr 23 13:18:34 2008 " "Info: Processing ended: Wed Apr 23 13:18:34 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Info: Elapsed time: 00:00:05" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}