?? linmac.a51
字號:
NAME LinMAC
;###########################################################################
;# LinMac #
;# Medium Access Control Layer of the Lin bus #
;# Written for the LPC932 using the fractional baudrategenerator and #
;# the break detection. #
;# #
;# Used Recources: #
;# -10Byte Data #
;# -Registerbank 3 #
;# -Bit addressable RAM Byte 21H, 22H, 23H #
;# -UART with fractional Baudrategenerator #
;# -Timer0 #
;# -optional Timer1 or external Interrupt1 #
;# #
;# Dipl.-Ing. Lutz Pape #
;# Applications #
;# Microcontroller Business Line #
;# Philips Semiconductors Hamburg #
;# 04/05/2002 #
;# #
;# Revision History: #
;# Current Version: 1.90 #
;# V1.0 : Version for the LPC1 as presented on the Embedded Systems 2002 #
;# V1.90 : implementing new structure with protocol layers #
;###########################################################################
$INCLUDE (Register.inc) ; CPU Special Function Registers
$INCLUDE (LinMAC.inc) ; Modul includefile
$INCLUDE (LinMAC.cfg) ; Modul configuration
;############################################################################
;## Declarations and Definitions #
;############################################################################
;SEGMENT DEFINITIONS
sLinData SEGMENT DATA ; various Variables for the protocol
sLinMac SEGMENT CODE ; the code (ISRs and Initroutine)
EXTERN CODE LinMacEvent ; call-back function
; Initialisation routine
PUBLIC InitLinMac
; public data Bytes
PUBLIC LinFrameLength, LinID, LinData, LinError, LinState
; public State-Flags
PUBLIC LinBreak, LinSynced, LinIDreceived, LinRxData, LinTxData, LinDataRdy, LinFrameRdy, LinSleeps
;public Error-Flags
PUBLIC LinParityError, LinValidationError, LinChecksumError, LinWakeEvent
;Datasegment declaration
RSEG sLinData
;public bytes
LinFrameLength: DS 1
LinID: DS 1
LinData: DS 8
DSEG AT 18H ; the local Bytes for ISR are stored in Registerbank 3
;local bytes
_miscReg0: DS 1 ; R0
_miscReg1: DS 1 ; R1
_miscReg2: DS 1 ; R2
_LinLastSent: DS 1 ; R3
_SyncEdgeCount: DS 1 ; R4
_LastByteSent: DS 1 ; R5
_ByteLeft: DS 1 ; R6
_LinCRC: DS 1 ; R7
DSEG AT 21H
LinState: DS 1
LinError: DS 1
_Parity: DS 1
;State Flags
LinBreak BIT LinState.0 ; '1' when Break was detected
LinSynced BIT LinState.1 ; '1' when Syncseq was evaluated
LinIDreceived BIT LinState.2 ; '1' when LinID was received and checked
LinRxData BIT LinState.3 ; '1' when Data is coming in
LinTxData BIT LinState.4 ; '1' when Data is transmitting
LinDataRdy BIT LinState.5 ; '1' when all Data has been received
LinFrameRdy BIT LinState.6 ; '1' when CRC was received and checked
LinSleeps BIT LinState.7 ; '1' when the bus sleeps
;Error Flags
LinParityError BIT LinError.0 ; '1' when a Parityerror was detected
LinValidationError BIT LinError.1 ; '1' when a Validationerror was detected
LinChecksumError BIT LinError.2 ; '1' when a Checksumerror was detected
LinFrameError BIT LinError.3 ; '1' when a Frame Error was detected
LinProtocolError BIT LinError.4 ; '1' when an Error in the Protocolsequence was detected
UARTFramingError BIT LinError.5 ; '1' when the UART detected a Framing Error
LinWakeEvent BIT LinError.6 ; '1' when a Wakeup-Event occured in Sleepmode
;ParityFlags
CalcPar0 BIT _Parity.6
CalcPar1 BIT _Parity.7
;##################################################################################
;#Start of Program #
;##################################################################################
;# Interrupt Vectors #
;##################################################################################
;** UART Rx interrupt **
CSEG AT 23H
LJMP IntUARTRx
;** UART Tx interrupt **
CSEG AT 6BH
LJMP IntUARTTx
;** Timer1 Interrupt, only when Timer1 is used as Syncseq-Edge-Counter **
$IF (_HW_SYNC_COUNTER)
CSEG AT 1BH
LJMP IntTimer1
$ENDIF
;** external Int1 Interrupt, only when external Int1 is used as Syncseq-Edge-Counter **
$IF (_SW_SYNC_COUNTER)
CSEG AT 13H
LJMP IntExt1
$ENDIF
;####################################################################################
;# Program Code #
;####################################################################################
RSEG sLinMac
;#############################################################################
;# UART Rx-routine #
;#############################################################################
IntUARTRx:
PUSH PSW
PUSH ACC
CLR ESR
ORL PSW,#18H; ; use Registerbank 3
; first test, if the bus is in Sleepmode
JNB LinSleeps,_normalActivity
;***********************************************************************************
; test wakeup-frame
;***********************************************************************************
MOV A,SBUF
JZ _wakeevent ; '0' received
CLR C
RLC A
JNC _nowakeevent ; MSB was '0'-> can't be a wakeup-character
ANL A,#7FH ; clear MSB
JNZ _nowakeevent ; if, except MSB, any '1' in the char, it can't be the wakeup-char
_wakeevent:
SETB LinWakeEvent
;###############################################################
;# Return from Interrupt functions #
;#which can be called to return from the Interrupt routine. #
;#Course of the LJMPs this is 2-clock cycles slower than the #
;#'normal' procedure but saves several bytes of code. #
;#These functions are only valid for the ISR of UART Rx. #
;###############################################################
_Errorreturn: ;a return when an Error raised
MOV LinState,#0
_Eventreturn: ;a return with the LCALL to LinMacEvent
LCALL LinMacEvent
_nowakeevent:
_RxReti: ;a return without LCALL to LinMacEvent
ANL SSTAT,#0F1H ; reset the SSTAT register
POP ACC
POP PSW
CLR RI
SETB ESR
RETI
;*********************************************************************************
_normalActivity:
;*********************************************************************************
; test on Breakevent
MOV A,SSTAT
ANL A,#04H ; mask Break Bit
JZ _noBreak
;********************************************************************************
;Break detected
;********************************************************************************
MOV LinState,#1 ; set Breakflag
SETB P2.0 ; ** DEBUG **
;*****************************************************
;*prepare Timer and counter to evaluate sync sequence*
;*****************************************************
CLR TR0
$IF (_HW_SYNC_COUNTER)
MOV TL1,#0FFH ; next falling edge on T1 generates an interrupt
MOV TH1,#0FFH
SETB TR1 ; enable counter
SETB ET1 ; enable interrupt
MOV TL0,#0
MOV TH0,#0 ; clear Timer 0
$ENDIF
$IF (_SW_SYNC_COUNTER)
MOV R4,#5 ;preload number of edges to count (_SyncEdgeCount = R4 in Registerbank 3)
CLR IE1
SETB EX1 ;enable external Interrupt
MOV TL0,#0FDH; Offset of -3, because stopping the timer needs three instructioncycles
MOV TH0,#0FFH
$ENDIF
;Timer and/or external Int are prepared to evaluate the sync-field
SJMP _Eventreturn
_reti1:
;********************************************************************************
;no Break --> normal data-reception
;********************************************************************************
_noBreak:
JB FE,_UARTFramingError
JNB LinBreak,_ProtocolError ; Break has to be detected first
JNB LinSynced,_ProtocolError ; the controller has to be synced first
_testIDBit:
JB LinIDreceived,_testdatardy
AJMP _evaluate_ID
_testdatardy:
JNB LinDataRdy,_process_data
_testframerdy:
JNB LinFrameRdy,_process_CRC
;when the controller reaches this point,
;it expected less data bytes than sent, and
;accidentally the last data-byte was equal to
;the CRC, so that no CRC-Error raised.
;I now set the Framing-Error.
SETB LinFrameError ;Frame Error
SJMP _Errorreturn
_UARTFramingError:
SETB UARTFramingError
CLR FE
SJMP _Errorreturn
_ProtocolError:
SETB LinProtocolError
SJMP _Errorreturn
;********************************************************************************
;CRC reception and test
;********************************************************************************
_process_CRC:
MOV A,SBUF ; CRC in Accumulator
JNB LinTxData,_checkCRC ;test if the CRC was transmittet by this node itself (Flag LinTxData)
CJNE A,_LinLastSent,__validationError ;validation
SJMP _checkCRC
__validationError:
SETB LinValidationError
SJMP _Errorreturn
;*************************************************
_checkCRC:
ADD A,R7 ; _LinCRC
CJNE A,#0FFH,_CRCError ; sum must be 0xFF
;Lin Frame Ok
MOV LinState,#01100111B; set Lin status bits; reset LinTxData, LinRxdata, set Frameready, Datardy, Id, Break and Sync
AJMP _EventReturn
;*********************************************************
_CRCError: SETB LinChecksumError
AJMP _Errorreturn
;********************************************************************************
;Process the data reception
;********************************************************************************
_process_data:
JB LinTxData,_do_not_set_bit
SETB LinRxData
_do_not_set_bit:
MOV A,#LinData
ADD A,R6;_ByteLeft
MOV R1,A
MOV @R1,SBUF ;receive the data
;calculate CRC
_calcCRC:
MOV A,R7;_LinCRC
ADDC A,@R1
JNC _noadd
INC A
_noadd:
MOV R7,A ;save CRC ; _LinCRC
;test if this was the last byte
MOV A,R6;_ByteLeft
JNZ _next_is_data
SETB LinDataRdy
_next_is_data:
DEC R6;_ByteLeft
JNB LinTxData,__RxReti; again, test if this node has to transmit the Lin-data
;validate the last data
MOV A,@R1
CJNE A,_LinLastSent,__validationError;
JB LinDataRdy,_sendCRC
;send the next databyte
MOV A,#LinData
ADD A,R6;_ByteLeft
MOV R1,A
MOV SBUF,@R1
MOV _LinLastSent,@R1;
AJMP _RxReti
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