#include "e:\nucleus\nucleus_plus\io.h"
#include "e:\nucleus\nucleus_plus\nucleus.h"

#define UART0	0
#define UART1 	1 

#define ULCON0 		0x3ffd000	// UART0 Line Control Register
#define ULCON1		0x3ffe000	// UART1 Line Control Register
#define UCON0		0x3ffd004	// UART0 Control Register
#define UCON1		0x3ffe004	// UART1 Control Register
#define USTAT0		0x3ffd008	// UART0 Status Register
#define USTAT1		0x3ffe008	// UART1 Status Register
#define UTXBUF0  	0x3ffd00c	// UART0 Transmit Buffer Register
#define UTXBUF1       	0x3ffe00c	// UART1 Transmit Buffer Register
#define URXBUF0		0x3ffd010	// UART0 Receive Buffer Register
#define URXBUF1		0x3ffe010	// UART1 Receive Buffer Register
#define UBRDIV0		0x3ffd014	// UART0 BAUD Rate Divisor Register
#define UBRDIV1		0x3ffe014	// UART1 BAUD Rate Divisor Register
#define BRDCNT0		0x3ffd018	// UART0 Baud Rate Count Register
#define BRDCNT1		0x3ffe018	// UART1 Baud Rate Count Register
#define BRDCLK0		0x3ffd01c	// UART0 Baud Rate Clock Monitor
#define BRDCLK1		0x3ffe01c	// UART1 Baud Rate Clock Monotor

#define DATALEN		0x3
#define STOPBIT		(0x1<<2)	
#define PARITYMD	(0x7<<3)	// Parity  
#define SERCLK		(0x1<<6)	// Serial Clock Select
#define IREN			(0x1<<7)	// Infra Red mode enable

#define DATA_5_BIT		0x0			//data lenth 5bits
#define DATA_6_BIT		0x1			//6 bits
#define DATA_7_BIT		0x2			// 7bits
#define DATA_8_BIT		0x3			// 8bits

#define STOP_1_BIT		0x0			// 1 stop bit
#define STOP_2_BIT		0x4			// 2 stop bits

#define PARITY_NO		0x0			//No parity
#define PARITY_ODD		0x20		//ODD Parity
#define PARITY_EVEN		0x28		//Even Parity

#define SERCLK_IN		0x0			//Use internal clock
#define SERCLK_EX		0x40		//use external clock 

#define UART_NOM		0x0			// UART works in NOMAL mode 
#define UART_IR			0x80		// Uart used i IR made

#define URT_DIS_RX		0x0			//Disable UART receive 
#define URT_INT_RX		0x1			// Only Interrupt function can read the receive buffer
#define URT_GDMA0_RX	0x2			// Only GDMA0 can read Receive Buffer 
#define URT_GDMA1_RX	0x3			// Only GDMA1 can read receive buffer

#define REV_STAT_INT	0x4			// Enable Receive Status to generate a interrupt

#define URT_DIS_TX		0x0			//Disable TX
#define URT_INT_TX		0x8			//ONLY Interrupt can write TX buffer
#define URT_GDMA0_TX	0x10		//Only GDMA0 can write TX buffer
#define URT_GDMA1_TX	0x18		//ONLY GDMA1 ca write TX buffer

#define URT_DSR			0x20		//DSR assert

#define URT_SD_BRK		0x40		//Send Break

#define URT_LOOPBK		0x80		//LOOP back Mode

#define URT_OVRUN_ERR	0x1			//Over run error
#define URT_PARITY_ERR	0x2			//Parity Error
#define URT_FRAME_ERR	0x4			//Frame Error
#define URT_BREAK		0x8			//Break received
#define URT_DTR			0x10		//DTR
#define URT_RX_READY	0x20		//RX buffer contain a byte of data
#define URT_TX_EMPTY	0x40		//TX buffer empty
#define URT_TX_CMPLET	0x80		//TX complete

#define URT_TX_MASK	0x0f		
#define URT_RX_MASK	0x0f
 
#define URT_1200BPS		(1301<<4)
#define URT_2400BPS		(650<<4)
#define URT_4800BPS		(324<<4)
#define URT_9600BPS		(162<<4)
#define URT_19200BPS		(80<<4)
#define URT_38400BPS		(40<<4)
#define URT_56700BPS		(26<<4)
#define URT_115200BPS		(13<<4)
#define URT_230400BPS		(6<<4)
#define URT_460860BPS		(2<<4)
 
//#ifdef CLK66
//#define URT_1200BPS		(1735<<16+1)
//#define URT_2400BPS		(867<<16+1)
//#define URT_4800BPS		(433<<16)
//#define URT_9600BPS		(216<<16)
//#define URT_19200BPS		(108<<16)
//#define URT_38400BPS		(53<<16)
//#define URT_56700BPS		(35<<16)
//#define URT_115200BPS		(17<<16)
//#define URT_230400BPS		(8<<16)
//#define URT_460860BPS	(4<<16)
//#endif
typedef struct
	{
		unsigned char uartno;
		unsigned char DataLenth;
		unsigned char StopBit;
		unsigned char ParityMode;
		unsigned char ClkSel;
		unsigned char URTMode;
		unsigned long BAUDRate;	
	}URT_Struct;