?? mips_top.map.smsg
字號:
Warning (10268): Verilog HDL information at clock_gen.v(13): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at Ifetch32.v(29): Always Construct contains both blocking and non-blocking assignments
Warning (10236): Verilog HDL Implicit Net warning at Mips_Top.v(53): created implicit net for "rwds"
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