?? csl_resid.h
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/* ============================================================================
* Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005
*
* Use of this software is controlled by the terms and conditions found in the
* license agreement under which this software has been supplied.
* ===========================================================================
*/
/* ---- File: <csl_resId.h> ---- */
/* for the ARM-side of DM420 */
#ifndef _CSL_RESID_H_
#define _CSL_RESID_H_
/* ---- Total number of modues : CSL Abstraction ---- */
/* Module ID 0 is reserved. */
#define CSL_CHIP_NUM_MODULES (25)
#define CSL_PWM_ID (1)
#define CSL_UART_ID (2)
#define CSL_MMCSD_ID (3)
#define CSL_SPI_ID (4)
#define CSL_ATA_ID (5)
#define CSL_VLYNQ_ID (6)
#define CSL_MCBSP_ID (7)
#define CSL_I2C_ID (8)
#define CSL_GPIO_ID (9)
#define CSL_MS_ID (10)
#define CSL_INTC_ID (11)
#define CSL_EMIF_ID (12)
#define CSL_PLLC_ID (13)
#define CSL_DDR_ID (14)
#define CSL_EDMA_ID (15)
#define CSL_VENC_ID (16)
#define CSL_VPBE_ID (17)
#define CSL_OSD_ID (18)
#define CSL_CCDC_ID (19)
#define CSL_VFOC_ID (20)
#define CSL_HIST_ID (21)
#define CSL_H3A_ID (22)
#define CSL_RESZ_ID (23)
#define CSL_PREV_ID (24)
#define CSL_VPSS_ID (25)
/* ---- Total Number of Resource, one-to-one correspondence with H/W resource */
/* Resource ID - 0 is resvd. */
#define CSL_CHIP_NUM_RESOURCES (98)
#define CSL_PWM_0_UID (1)
#define CSL_PWM_1_UID (2)
#define CSL_PWM_2_UID (3)
#define CSL_UART_0_UID (4)
#define CSL_UART_1_UID (5)
#define CSL_UART_2_UID (6)
#define CSL_MMCSD_0_UID (7)
#define CSL_SPI_0_UID (8)
#define CSL_ATA_0_UID (9)
#define CSL_VLYNQ_0_UID (10)
#define CSL_MCBSP_0_UID (11)
#define CSL_I2C_0_UID (12)
#define CSL_GPIO_UID (13)
#define CSL_MS_0_UID (15)
#define CSL_INTC_UID (16)
#define CSL_EMIF_0_UID (17)
#define CSL_PLLC_0_UID (18)
#define CSL_PLLC_1_UID (19)
#define CSL_DDR_0_UID (20)
#define CSL_EDMA_CHA0_UID (21)
#define CSL_EDMA_CHA1_UID (22)
#define CSL_EDMA_CHA2_UID (23)
#define CSL_EDMA_CHA3_UID (24)
#define CSL_EDMA_CHA4_UID (25)
#define CSL_EDMA_CHA5_UID (26)
#define CSL_EDMA_CHA6_UID (27)
#define CSL_EDMA_CHA7_UID (28)
#define CSL_EDMA_CHA8_UID (29)
#define CSL_EDMA_CHA9_UID (30)
#define CSL_EDMA_CHA10_UID (31)
#define CSL_EDMA_CHA11_UID (32)
#define CSL_EDMA_CHA12_UID (33)
#define CSL_EDMA_CHA13_UID (34)
#define CSL_EDMA_CHA14_UID (35)
#define CSL_EDMA_CHA15_UID (36)
#define CSL_EDMA_CHA16_UID (37)
#define CSL_EDMA_CHA17_UID (38)
#define CSL_EDMA_CHA18_UID (39)
#define CSL_EDMA_CHA19_UID (40)
#define CSL_EDMA_CHA20_UID (41)
#define CSL_EDMA_CHA21_UID (42)
#define CSL_EDMA_CHA22_UID (43)
#define CSL_EDMA_CHA23_UID (44)
#define CSL_EDMA_CHA24_UID (45)
#define CSL_EDMA_CHA25_UID (46)
#define CSL_EDMA_CHA26_UID (47)
#define CSL_EDMA_CHA27_UID (48)
#define CSL_EDMA_CHA28_UID (49)
#define CSL_EDMA_CHA29_UID (50)
#define CSL_EDMA_CHA30_UID (51)
#define CSL_EDMA_CHA31_UID (52)
#define CSL_EDMA_CHA32_UID (53)
#define CSL_EDMA_CHA33_UID (54)
#define CSL_EDMA_CHA34_UID (55)
#define CSL_EDMA_CHA35_UID (56)
#define CSL_EDMA_CHA36_UID (57)
#define CSL_EDMA_CHA37_UID (58)
#define CSL_EDMA_CHA38_UID (59)
#define CSL_EDMA_CHA39_UID (60)
#define CSL_EDMA_CHA40_UID (61)
#define CSL_EDMA_CHA41_UID (62)
#define CSL_EDMA_CHA42_UID (63)
#define CSL_EDMA_CHA43_UID (64)
#define CSL_EDMA_CHA44_UID (65)
#define CSL_EDMA_CHA45_UID (66)
#define CSL_EDMA_CHA46_UID (67)
#define CSL_EDMA_CHA47_UID (68)
#define CSL_EDMA_CHA48_UID (69)
#define CSL_EDMA_CHA49_UID (70)
#define CSL_EDMA_CHA50_UID (71)
#define CSL_EDMA_CHA51_UID (72)
#define CSL_EDMA_CHA52_UID (73)
#define CSL_EDMA_CHA53_UID (74)
#define CSL_EDMA_CHA54_UID (75)
#define CSL_EDMA_CHA55_UID (76)
#define CSL_EDMA_CHA56_UID (77)
#define CSL_EDMA_CHA57_UID (78)
#define CSL_EDMA_CHA58_UID (79)
#define CSL_EDMA_CHA59_UID (80)
#define CSL_EDMA_CHA60_UID (81)
#define CSL_EDMA_CHA61_UID (82)
#define CSL_EDMA_CHA62_UID (83)
#define CSL_EDMA_CHA63_UID (84)
#define CSL_EDMA_QCHA0_UID (85)
#define CSL_EDMA_QCHA1_UID (86)
#define CSL_EDMA_QCHA2_UID (87)
#define CSL_EDMA_QCHA3_UID (88)
#define CSL_VENC_0_UID (89)
#define CSL_VPBE_0_UID (90)
#define CSL_OSD_0_UID (91)
#define CSL_CCDC_0_UID (92)
#define CSL_VFOC_0_UID (93)
#define CSL_H3A_0_UID (94)
#define CSL_HIST_0_UID (95)
#define CSL_RESZ_0_UID (96)
#define CSL_PREV_0_UID (97)
#define CSL_VPSS_0_UID (98)
/*---- XIO masks for peripheral instances ---- */
#define CSL_PWM_0_XIO (0x00000000)
#define CSL_PWM_1_XIO (0x00000000)
#define CSL_PWM_2_XIO (0x00000000)
#define CSL_UART_0_XIO (0x00000000)
#define CSL_UART_1_XIO (0x00000000)
#define CSL_UART_2_XIO (0x00000000)
#define CSL_MMCSD_0_XIO (0x00000000)
#define CSL_SPI_0_XIO (0x00000000)
#define CSL_ATA_0_XIO (0x00000000)
#define CSL_VLYNQ_0_XIO (0x00000000)
#define CSL_MCBSP_0_XIO (0x00000000)
#define CSL_I2C_0_XIO (0x00000000)
#define CSL_GPIO_XIO (0x00000000)
#define CSL_MS_0_XIO (0x00000000)
#define CSL_INTC_XIO (0x00000000)
#define CSL_EMIF_0_XIO (0x00000000)
#define CSL_PLLC_0_XIO (0x00000000)
#define CSL_PLLC_1_XIO (0x00000000)
#define CSL_DDR_0_XIO (0x00000000)
#define CSL_EDMA_CHA0_XIO (0x00000000)
#define CSL_EDMA_CHA1_XIO (0x00000000)
#define CSL_EDMA_CHA2_XIO (0x00000000)
#define CSL_EDMA_CHA3_XIO (0x00000000)
#define CSL_EDMA_CHA4_XIO (0x00000000)
#define CSL_EDMA_CHA5_XIO (0x00000000)
#define CSL_EDMA_CHA6_XIO (0x00000000)
#define CSL_EDMA_CHA7_XIO (0x00000000)
#define CSL_EDMA_CHA8_XIO (0x00000000)
#define CSL_EDMA_CHA9_XIO (0x00000000)
#define CSL_EDMA_CHA10_XIO (0x00000000)
#define CSL_EDMA_CHA11_XIO (0x00000000)
#define CSL_EDMA_CHA12_XIO (0x00000000)
#define CSL_EDMA_CHA13_XIO (0x00000000)
#define CSL_EDMA_CHA14_XIO (0x00000000)
#define CSL_EDMA_CHA15_XIO (0x00000000)
#define CSL_EDMA_CHA16_XIO (0x00000000)
#define CSL_EDMA_CHA17_XIO (0x00000000)
#define CSL_EDMA_CHA18_XIO (0x00000000)
#define CSL_EDMA_CHA19_XIO (0x00000000)
#define CSL_EDMA_CHA20_XIO (0x00000000)
#define CSL_EDMA_CHA21_XIO (0x00000000)
#define CSL_EDMA_CHA22_XIO (0x00000000)
#define CSL_EDMA_CHA23_XIO (0x00000000)
#define CSL_EDMA_CHA24_XIO (0x00000000)
#define CSL_EDMA_CHA25_XIO (0x00000000)
#define CSL_EDMA_CHA26_XIO (0x00000000)
#define CSL_EDMA_CHA27_XIO (0x00000000)
#define CSL_EDMA_CHA28_XIO (0x00000000)
#define CSL_EDMA_CHA29_XIO (0x00000000)
#define CSL_EDMA_CHA30_XIO (0x00000000)
#define CSL_EDMA_CHA31_XIO (0x00000000)
#define CSL_EDMA_CHA32_XIO (0x00000000)
#define CSL_EDMA_CHA33_XIO (0x00000000)
#define CSL_EDMA_CHA34_XIO (0x00000000)
#define CSL_EDMA_CHA35_XIO (0x00000000)
#define CSL_EDMA_CHA36_XIO (0x00000000)
#define CSL_EDMA_CHA37_XIO (0x00000000)
#define CSL_EDMA_CHA38_XIO (0x00000000)
#define CSL_EDMA_CHA39_XIO (0x00000000)
#define CSL_EDMA_CHA40_XIO (0x00000000)
#define CSL_EDMA_CHA41_XIO (0x00000000)
#define CSL_EDMA_CHA42_XIO (0x00000000)
#define CSL_EDMA_CHA43_XIO (0x00000000)
#define CSL_EDMA_CHA44_XIO (0x00000000)
#define CSL_EDMA_CHA45_XIO (0x00000000)
#define CSL_EDMA_CHA46_XIO (0x00000000)
#define CSL_EDMA_CHA47_XIO (0x00000000)
#define CSL_EDMA_CHA48_XIO (0x00000000)
#define CSL_EDMA_CHA49_XIO (0x00000000)
#define CSL_EDMA_CHA50_XIO (0x00000000)
#define CSL_EDMA_CHA51_XIO (0x00000000)
#define CSL_EDMA_CHA52_XIO (0x00000000)
#define CSL_EDMA_CHA53_XIO (0x00000000)
#define CSL_EDMA_CHA54_XIO (0x00000000)
#define CSL_EDMA_CHA55_XIO (0x00000000)
#define CSL_EDMA_CHA56_XIO (0x00000000)
#define CSL_EDMA_CHA57_XIO (0x00000000)
#define CSL_EDMA_CHA58_XIO (0x00000000)
#define CSL_EDMA_CHA59_XIO (0x00000000)
#define CSL_EDMA_CHA60_XIO (0x00000000)
#define CSL_EDMA_CHA61_XIO (0x00000000)
#define CSL_EDMA_CHA62_XIO (0x00000000)
#define CSL_EDMA_CHA63_XIO (0x00000000)
#define CSL_EDMA_QCHA0_XIO (0x00000000)
#define CSL_EDMA_QCHA1_XIO (0x00000000)
#define CSL_EDMA_QCHA2_XIO (0x00000000)
#define CSL_EDMA_QCHA3_XIO (0x00000000)
#define CSL_VENC_0_XIO (0x00000000)
#define CSL_VPBE_0_XIO (0x00000000)
#define CSL_OSD_0_XIO (0x00000000)
#define CSL_CCDC_0_XIO (0x00000000)
#define CSL_VFOC_0_XIO (0x00000000)
#define CSL_H3A_0_XIO (0x00000000)
#define CSL_HIST_0_XIO (0x00000000)
#define CSL_RESZ_0_XIO (0x00000000)
#define CSL_PREV_0_XIO (0x00000000)
#define CSL_VPSS_0_XIO (0x00000000)
#endif /* _CSL_RESOURCE_H_ */
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