?? cslr_psc_001.h
字號:
#define CSL_PSC_EPCPR_EPC17_MASK (0x00020000u)
#define CSL_PSC_EPCPR_EPC17_SHIFT (0x00000011u)
#define CSL_PSC_EPCPR_EPC17_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC16_MASK (0x00010000u)
#define CSL_PSC_EPCPR_EPC16_SHIFT (0x00000010u)
#define CSL_PSC_EPCPR_EPC16_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC15_MASK (0x00008000u)
#define CSL_PSC_EPCPR_EPC15_SHIFT (0x0000000Fu)
#define CSL_PSC_EPCPR_EPC15_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC14_MASK (0x00004000u)
#define CSL_PSC_EPCPR_EPC14_SHIFT (0x0000000Eu)
#define CSL_PSC_EPCPR_EPC14_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC13_MASK (0x00002000u)
#define CSL_PSC_EPCPR_EPC13_SHIFT (0x0000000Du)
#define CSL_PSC_EPCPR_EPC13_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC12_MASK (0x00001000u)
#define CSL_PSC_EPCPR_EPC12_SHIFT (0x0000000Cu)
#define CSL_PSC_EPCPR_EPC12_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC11_MASK (0x00000800u)
#define CSL_PSC_EPCPR_EPC11_SHIFT (0x0000000Bu)
#define CSL_PSC_EPCPR_EPC11_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC10_MASK (0x00000400u)
#define CSL_PSC_EPCPR_EPC10_SHIFT (0x0000000Au)
#define CSL_PSC_EPCPR_EPC10_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC9_MASK (0x00000200u)
#define CSL_PSC_EPCPR_EPC9_SHIFT (0x00000009u)
#define CSL_PSC_EPCPR_EPC9_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC8_MASK (0x00000100u)
#define CSL_PSC_EPCPR_EPC8_SHIFT (0x00000008u)
#define CSL_PSC_EPCPR_EPC8_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC7_MASK (0x00000080u)
#define CSL_PSC_EPCPR_EPC7_SHIFT (0x00000007u)
#define CSL_PSC_EPCPR_EPC7_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC6_MASK (0x00000040u)
#define CSL_PSC_EPCPR_EPC6_SHIFT (0x00000006u)
#define CSL_PSC_EPCPR_EPC6_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC5_MASK (0x00000020u)
#define CSL_PSC_EPCPR_EPC5_SHIFT (0x00000005u)
#define CSL_PSC_EPCPR_EPC5_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC4_MASK (0x00000010u)
#define CSL_PSC_EPCPR_EPC4_SHIFT (0x00000004u)
#define CSL_PSC_EPCPR_EPC4_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC3_MASK (0x00000008u)
#define CSL_PSC_EPCPR_EPC3_SHIFT (0x00000003u)
#define CSL_PSC_EPCPR_EPC3_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC2_MASK (0x00000004u)
#define CSL_PSC_EPCPR_EPC2_SHIFT (0x00000002u)
#define CSL_PSC_EPCPR_EPC2_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC1_MASK (0x00000002u)
#define CSL_PSC_EPCPR_EPC1_SHIFT (0x00000001u)
#define CSL_PSC_EPCPR_EPC1_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_EPC0_MASK (0x00000001u)
#define CSL_PSC_EPCPR_EPC0_SHIFT (0x00000000u)
#define CSL_PSC_EPCPR_EPC0_RESETVAL (0x00000000u)
#define CSL_PSC_EPCPR_RESETVAL (0x00000000u)
/* EPCR */
#define CSL_PSC_EPCR_EPC31_MASK (0x80000000u)
#define CSL_PSC_EPCR_EPC31_SHIFT (0x0000001Fu)
#define CSL_PSC_EPCR_EPC31_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC30_MASK (0x40000000u)
#define CSL_PSC_EPCR_EPC30_SHIFT (0x0000001Eu)
#define CSL_PSC_EPCR_EPC30_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC29_MASK (0x20000000u)
#define CSL_PSC_EPCR_EPC29_SHIFT (0x0000001Du)
#define CSL_PSC_EPCR_EPC29_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC28_MASK (0x10000000u)
#define CSL_PSC_EPCR_EPC28_SHIFT (0x0000001Cu)
#define CSL_PSC_EPCR_EPC28_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC27_MASK (0x08000000u)
#define CSL_PSC_EPCR_EPC27_SHIFT (0x0000001Bu)
#define CSL_PSC_EPCR_EPC27_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC26_MASK (0x04000000u)
#define CSL_PSC_EPCR_EPC26_SHIFT (0x0000001Au)
#define CSL_PSC_EPCR_EPC26_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC25_MASK (0x02000000u)
#define CSL_PSC_EPCR_EPC25_SHIFT (0x00000019u)
#define CSL_PSC_EPCR_EPC25_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC24_MASK (0x01000000u)
#define CSL_PSC_EPCR_EPC24_SHIFT (0x00000018u)
#define CSL_PSC_EPCR_EPC24_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC23_MASK (0x00800000u)
#define CSL_PSC_EPCR_EPC23_SHIFT (0x00000017u)
#define CSL_PSC_EPCR_EPC23_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC22_MASK (0x00400000u)
#define CSL_PSC_EPCR_EPC22_SHIFT (0x00000016u)
#define CSL_PSC_EPCR_EPC22_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC21_MASK (0x00200000u)
#define CSL_PSC_EPCR_EPC21_SHIFT (0x00000015u)
#define CSL_PSC_EPCR_EPC21_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC20_MASK (0x00100000u)
#define CSL_PSC_EPCR_EPC20_SHIFT (0x00000014u)
#define CSL_PSC_EPCR_EPC20_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC19_MASK (0x00080000u)
#define CSL_PSC_EPCR_EPC19_SHIFT (0x00000013u)
#define CSL_PSC_EPCR_EPC19_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC18_MASK (0x00040000u)
#define CSL_PSC_EPCR_EPC18_SHIFT (0x00000012u)
#define CSL_PSC_EPCR_EPC18_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC17_MASK (0x00020000u)
#define CSL_PSC_EPCR_EPC17_SHIFT (0x00000011u)
#define CSL_PSC_EPCR_EPC17_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC16_MASK (0x00010000u)
#define CSL_PSC_EPCR_EPC16_SHIFT (0x00000010u)
#define CSL_PSC_EPCR_EPC16_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC15_MASK (0x00008000u)
#define CSL_PSC_EPCR_EPC15_SHIFT (0x0000000Fu)
#define CSL_PSC_EPCR_EPC15_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC14_MASK (0x00004000u)
#define CSL_PSC_EPCR_EPC14_SHIFT (0x0000000Eu)
#define CSL_PSC_EPCR_EPC14_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC13_MASK (0x00002000u)
#define CSL_PSC_EPCR_EPC13_SHIFT (0x0000000Du)
#define CSL_PSC_EPCR_EPC13_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC12_MASK (0x00001000u)
#define CSL_PSC_EPCR_EPC12_SHIFT (0x0000000Cu)
#define CSL_PSC_EPCR_EPC12_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC11_MASK (0x00000800u)
#define CSL_PSC_EPCR_EPC11_SHIFT (0x0000000Bu)
#define CSL_PSC_EPCR_EPC11_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC10_MASK (0x00000400u)
#define CSL_PSC_EPCR_EPC10_SHIFT (0x0000000Au)
#define CSL_PSC_EPCR_EPC10_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC9_MASK (0x00000200u)
#define CSL_PSC_EPCR_EPC9_SHIFT (0x00000009u)
#define CSL_PSC_EPCR_EPC9_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC8_MASK (0x00000100u)
#define CSL_PSC_EPCR_EPC8_SHIFT (0x00000008u)
#define CSL_PSC_EPCR_EPC8_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC7_MASK (0x00000080u)
#define CSL_PSC_EPCR_EPC7_SHIFT (0x00000007u)
#define CSL_PSC_EPCR_EPC7_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC6_MASK (0x00000040u)
#define CSL_PSC_EPCR_EPC6_SHIFT (0x00000006u)
#define CSL_PSC_EPCR_EPC6_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC5_MASK (0x00000020u)
#define CSL_PSC_EPCR_EPC5_SHIFT (0x00000005u)
#define CSL_PSC_EPCR_EPC5_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC4_MASK (0x00000010u)
#define CSL_PSC_EPCR_EPC4_SHIFT (0x00000004u)
#define CSL_PSC_EPCR_EPC4_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC3_MASK (0x00000008u)
#define CSL_PSC_EPCR_EPC3_SHIFT (0x00000003u)
#define CSL_PSC_EPCR_EPC3_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC2_MASK (0x00000004u)
#define CSL_PSC_EPCR_EPC2_SHIFT (0x00000002u)
#define CSL_PSC_EPCR_EPC2_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC1_MASK (0x00000002u)
#define CSL_PSC_EPCR_EPC1_SHIFT (0x00000001u)
#define CSL_PSC_EPCR_EPC1_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_EPC0_MASK (0x00000001u)
#define CSL_PSC_EPCR_EPC0_SHIFT (0x00000000u)
#define CSL_PSC_EPCR_EPC0_RESETVAL (0x00000000u)
#define CSL_PSC_EPCR_RESETVAL (0x00000000u)
/* RAILSTAT */
#define CSL_PSC_RAILSTAT_RAILNUM_MASK (0x1F000000u)
#define CSL_PSC_RAILSTAT_RAILNUM_SHIFT (0x00000018u)
#define CSL_PSC_RAILSTAT_RAILNUM_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSTAT_RAILCNT_MASK (0x000000FFu)
#define CSL_PSC_RAILSTAT_RAILCNT_SHIFT (0x00000000u)
#define CSL_PSC_RAILSTAT_RAILCNT_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSTAT_RESETVAL (0x00000000u)
/* RAILCTL */
#define CSL_PSC_RAILCTL_RAILCTR1_MASK (0x0000FF00u)
#define CSL_PSC_RAILCTL_RAILCTR1_SHIFT (0x00000008u)
#define CSL_PSC_RAILCTL_RAILCTR1_RESETVAL (0x00000000u)
#define CSL_PSC_RAILCTL_RAILCTR0_MASK (0x000000FFu)
#define CSL_PSC_RAILCTL_RAILCTR0_SHIFT (0x00000000u)
#define CSL_PSC_RAILCTL_RAILCTR0_RESETVAL (0x00000000u)
#define CSL_PSC_RAILCTL_RESETVAL (0x00000000u)
/* RAILSEL */
#define CSL_PSC_RAILSEL_P31_MASK (0x80000000u)
#define CSL_PSC_RAILSEL_P31_SHIFT (0x0000001Fu)
#define CSL_PSC_RAILSEL_P31_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P30_MASK (0x40000000u)
#define CSL_PSC_RAILSEL_P30_SHIFT (0x0000001Eu)
#define CSL_PSC_RAILSEL_P30_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P29_MASK (0x20000000u)
#define CSL_PSC_RAILSEL_P29_SHIFT (0x0000001Du)
#define CSL_PSC_RAILSEL_P29_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P28_MASK (0x10000000u)
#define CSL_PSC_RAILSEL_P28_SHIFT (0x0000001Cu)
#define CSL_PSC_RAILSEL_P28_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P27_MASK (0x08000000u)
#define CSL_PSC_RAILSEL_P27_SHIFT (0x0000001Bu)
#define CSL_PSC_RAILSEL_P27_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P26_MASK (0x04000000u)
#define CSL_PSC_RAILSEL_P26_SHIFT (0x0000001Au)
#define CSL_PSC_RAILSEL_P26_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P25_MASK (0x02000000u)
#define CSL_PSC_RAILSEL_P25_SHIFT (0x00000019u)
#define CSL_PSC_RAILSEL_P25_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P24_MASK (0x01000000u)
#define CSL_PSC_RAILSEL_P24_SHIFT (0x00000018u)
#define CSL_PSC_RAILSEL_P24_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P23_MASK (0x00800000u)
#define CSL_PSC_RAILSEL_P23_SHIFT (0x00000017u)
#define CSL_PSC_RAILSEL_P23_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P22_MASK (0x00400000u)
#define CSL_PSC_RAILSEL_P22_SHIFT (0x00000016u)
#define CSL_PSC_RAILSEL_P22_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P21_MASK (0x00200000u)
#define CSL_PSC_RAILSEL_P21_SHIFT (0x00000015u)
#define CSL_PSC_RAILSEL_P21_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P20_MASK (0x00100000u)
#define CSL_PSC_RAILSEL_P20_SHIFT (0x00000014u)
#define CSL_PSC_RAILSEL_P20_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P19_MASK (0x00080000u)
#define CSL_PSC_RAILSEL_P19_SHIFT (0x00000013u)
#define CSL_PSC_RAILSEL_P19_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P18_MASK (0x00040000u)
#define CSL_PSC_RAILSEL_P18_SHIFT (0x00000012u)
#define CSL_PSC_RAILSEL_P18_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P17_MASK (0x00020000u)
#define CSL_PSC_RAILSEL_P17_SHIFT (0x00000011u)
#define CSL_PSC_RAILSEL_P17_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P16_MASK (0x00010000u)
#define CSL_PSC_RAILSEL_P16_SHIFT (0x00000010u)
#define CSL_PSC_RAILSEL_P16_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P15_MASK (0x00008000u)
#define CSL_PSC_RAILSEL_P15_SHIFT (0x0000000Fu)
#define CSL_PSC_RAILSEL_P15_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P14_MASK (0x00004000u)
#define CSL_PSC_RAILSEL_P14_SHIFT (0x0000000Eu)
#define CSL_PSC_RAILSEL_P14_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P13_MASK (0x00002000u)
#define CSL_PSC_RAILSEL_P13_SHIFT (0x0000000Du)
#define CSL_PSC_RAILSEL_P13_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P12_MASK (0x00001000u)
#define CSL_PSC_RAILSEL_P12_SHIFT (0x0000000Cu)
#define CSL_PSC_RAILSEL_P12_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P11_MASK (0x00000800u)
#define CSL_PSC_RAILSEL_P11_SHIFT (0x0000000Bu)
#define CSL_PSC_RAILSEL_P11_RESETVAL (0x00000000u)
#define CSL_PSC_RAILSEL_P10_MASK (0x00000400u)
#define CSL_PSC_RAILSEL_P10_SHIFT (0x0000000Au)
#define CSL_PSC_RAILSEL_P10_RESETVAL (0x00000000u)
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