?? csl_vlynqaux.h
字號:
return;}/** ============================================================================ * @n@b CSL_vlynqInt3PolSet * * @b Description * @n Set the Interrupt polarity. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intPol3 Interrupt polarity to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt polarity is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt3PolSet (hVlynq, intPol3); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt3PolSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntPolType intPol3){ /** INTVEC0s' Interrupt-3 polarity */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTPOL3,intPol3); return;}/** ============================================================================ * @n@b CSL_vlynqInt3IntvecSet * * @b Description * @n Set the Interrupt vector. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intVector3 Interrupt vector to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt vector is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt3IntvecSet (hVlynq, intVector3); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt3IntvecSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntVector intVector3){ /** INTVEC0's Interrupt-3 interrupt vector */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTVEC3, intVector3); return;}/** ============================================================================ * @n@b CSL_vlynqInt2TypeSet * * @b Description * @n Set the Interrupt type. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intType2 Interrupt type to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt type is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt2TypeSet (hVlynq, intType2 ); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt2TypeSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntType intType2){ /** INTVEC0s' Interrupt-2 type */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTTYPE2, intType2); return;}/** ============================================================================ * @n@b CSL_vlynqInt2PolSet * * @b Description * @n Set the Interrupt polarity. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intPol2 Interrupt polarity to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt polarity is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt2PolSet (hVlynq, intPol2); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt2PolSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntPolType intPol2){ /** INTVEC0s' Interrupt-2 polarity */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTPOL2,intPol2); return;}/** ============================================================================ * @n@b CSL_vlynqInt2IntvecSet * * @b Description * @n Set the Interrupt vector. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intVector2 Interrupt vector to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt vector is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt2IntvecSet (hVlynq, intVector2); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt2IntvecSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntVector intVector2){ /** INTVEC0's Interrupt-2 interrupt vector */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTVEC2, intVector2); return;}/** ============================================================================ * @n@b CSL_vlynqInt1TypeSet * * @b Description * @n Set the Interrupt type. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intType1 Interrupt type to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt type is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt1TypeSet (hVlynq, intType1 ); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt1TypeSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntType intType1){ /** INTVEC0s' Interrupt-1 type */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTTYPE1, intType1); return;}/** ============================================================================ * @n@b CSL_vlynqInt1PolSet * * @b Description * @n Set the Interrupt polarity. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intPol1 Interrupt polarity to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt polarity is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt1PolSet (hVlynq, intPol1); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt1PolSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntPolType intPol1){ /** INTVEC0s' Interrupt-1 polarity */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTPOL1,intPol1); return;}/** ============================================================================ * @n@b CSL_vlynqInt1IntvecSet * * @b Description * @n Set the Interrupt vector. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intVector1 Interrupt vector to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt vector is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt1IntvecSet (hVlynq, intVector1); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt1IntvecSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntVector intVector1){ /** INTVEC0's Interrupt-1 interrupt vector */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTVEC1, intVector1); return;}/** ============================================================================ * @n@b CSL_vlynqInt0TypeSet * * @b Description * @n Set the Interrupt type. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intType0 Interrupt type to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt type is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt0TypeSet (hVlynq, intType0 ); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt0TypeSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntType intType0){ /** INTVEC0s' Interrupt-0 type */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTYPE0, intType0); return;}/** ============================================================================ * @n@b CSL_vlynqInt0PolSet * * @b Description * @n Set the Interrupt polarity. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intPol0 Interrupt polarity to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt polarity is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt0PolSet (hVlynq, intPol0); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt0PolSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntPolType intPol0){ /** INTVEC0s' Interrupt-0 polarity */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTPOL0,intPol0); return;}/** ============================================================================ * @n@b CSL_vlynqInt0IntvecSet * * @b Description * @n Set the Interrupt vector. * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intVector0 Interrupt vector to be set. @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The Interrupt vector is set to the value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqInt0IntvecSet (hVlynq, intVector0); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqInt0IntvecSet ( CSL_VlynqHandle hVlynq, CSL_VlynqIntVector intVector0){ /** INTVEC0's Interrupt-0 interrupt vector */ CSL_FINS(hVlynq->regs->INTVEC0, VLYNQ_INTVEC0_INTVEC0, intVector0); return;}/** ============================================================================ * @n@b CSL_vlynqIntvec1Enable * * @b Description * @n Enables the INTVEC1 (7-4) interrupt(s). * * @b Arguments * @verbatim hVlynq Handle to the VLYNQ instance intEnable value for Enables the INTVEC1 (7-4) interrupt(s). @endverbatim * * <b> Return Value </b> * None * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n the INTVEC1 (7-4) interrupt(s) Enables value passed. * * @b Modifies * @n VLYNQ Interrupt Vector 3-0 Register. * * @b Example * @verbatim CSL_VlynqHandle hVlynq; ... CSL_vlynqIntvec1Enable (hVlynq, 0x01); ... @endverbatim * =========================================================================== */CSL_IDEF_INLINEvoid CSL_vlynqIntvec1Enable ( CSL_VlynqHandle hVlynq, Uint32 intEnable){ /** Enable INTVEC1 (7-4) interrupt(s) */?? 快捷鍵說明
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