?? csl_tmrgethwsetup.c
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/* ============================================================================ * Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005 * * Use of this software is controlled by the terms and conditions found in the * license agreement under which this software has been supplied. * =========================================================================== *//** @file csl_tmrGetHwSetup.c * * @brief File for functional layer of CSL API @a CSL_tmrGetHwSetup() * * Description * - The @a CSL_tmrGetHwSetup() function definition & it's associated * functions * * Path: \\(CSLPATH)\\ipmodules\\timer\\src *//* ============================================================================= * Revision History * =============== * 1-Sept-2004 HMM File Created. * ============================================================================= */#include <csl_tmr.h>/** ============================================================================ * @n@b CSL_tmrGetHwSetup * * @b Description * @n Gets the current setup of TMR. * * @b Arguments * @verbatim hTmr Handle to the TMR instance setup Pointer to setup structure which contains the setup information of TMR. @endverbatim * * <b> Return Value </b> CSL_Status * @li CSL_SOK - Setup info load successful. * @li CSL_ESYS_BADHANDLE - Invalid handle * @li CSL_ESYS_INVPARAMS - Invalid parameter * * <b> Pre Condition </b> * @n None * * <b> Post Condition </b> * @n The registers of the specified TMR instance will be setup. * * @b Modifies * @n Hardware registers of the specified TMR instance. * * @b Example * @verbatim CSL_TmrHandle hTmr; CSL_TmrHwSetup setup; CSL_Status status; status = CSL_tmrGetHwSetup (hTmr, &setup); @endverbatim * ============================================================================ */#pragma CODE_SECTION (CSL_tmrGetHwSetup, ".text:csl_section:tmr");CSL_Status CSL_tmrGetHwSetup ( CSL_TmrHandle hTmr, CSL_TmrHwSetup *hwSetup){ if (hTmr == NULL) { return CSL_ESYS_BADHANDLE; } if (hwSetup == NULL) { return CSL_ESYS_INVPARAMS; } /* Get GPINT_GPEN configuration */ hwSetup->tmrGpInt34Eni = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT34_ENI); hwSetup->tmrGpInt34Eno = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT34_ENO); hwSetup->tmrGpInt34Invi = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT34_INVI); hwSetup->tmrGpInt34Invo = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT34_INVO); hwSetup->tmrGpInt12Eni = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT12_ENI); hwSetup->tmrGpInt12Eno = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT12_ENO); hwSetup->tmrGpInt12Invi = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT12_INVI); hwSetup->tmrGpInt12Invo = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPINT12_INVO); hwSetup->tmrGpIoEni34 = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPIO_ENI34); hwSetup->tmrGpIoEno34 = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPIO_ENO34); hwSetup->tmrGpIoEni12 = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPIO_ENI12); hwSetup->tmrGpIoEno12 = (Bool) CSL_FEXT(hTmr->regs->GPINT_GPEN, \ TMR_GPINT_GPEN_GPIO_ENO12); /* Get the GPTDAT_GPDIR configuration */ hwSetup->tmrGpDirDiro34 = (Bool) CSL_FEXT(hTmr->regs->GPTDAT_GPDIR, \ TMR_GPTDAT_GPDIR_GPIO_DIRO34); hwSetup->tmrGpDirDiri34 = (Bool) CSL_FEXT(hTmr->regs->GPTDAT_GPDIR, \ TMR_GPTDAT_GPDIR_GPIO_DIRI34); hwSetup->tmrGpDirDiro12 = (Bool) CSL_FEXT(hTmr->regs->GPTDAT_GPDIR, \ TMR_GPTDAT_GPDIR_GPIO_DIRO12); hwSetup->tmrGpDirDiri12 = (Bool) CSL_FEXT(hTmr->regs->GPTDAT_GPDIR, \ TMR_GPTDAT_GPDIR_GPIO_DIRI12); /* Get the Period register's values */ hwSetup->tmrTimerPeriod12 = hTmr->regs->PRD12; hwSetup->tmrTimerPeriod34 = hTmr->regs->PRD34; /* Get the counter register's values*/ hwSetup->tmrTimerCounter12 = hTmr->regs->TIM12; hwSetup->tmrTimerCounter34 = hTmr->regs->TIM34; /* Get the TCR34 register configurations */ hwSetup->tmrIpGate34 = (CSL_TmrIpGate) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_TIEN34); hwSetup->tmrClksrc34 = (CSL_TmrClksrc) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_CLKSRC34); hwSetup->tmrPulseWidth34 = (CSL_TmrPulseWidth) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_PWID34); hwSetup->tmrClockPulse34 = (CSL_TmrClockPulse) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_CP34); hwSetup->tmrInvInp34 = (CSL_TmrInvInp) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_INVINP34); hwSetup->tmrInvOutp34 = (CSL_TmrInvOutp) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_INVOUTP34); /* Get the TCR12 register configurations */ hwSetup->tmrIpGate12 = (CSL_TmrIpGate) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_TIEN12); hwSetup->tmrClksrc12 = (CSL_TmrClksrc) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_CLKSRC12); hwSetup->tmrPulseWidth12 = (CSL_TmrPulseWidth) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_PWID12); hwSetup->tmrClockPulse12 = (CSL_TmrClockPulse) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_CP12); hwSetup->tmrInvInp12 = (CSL_TmrInvInp) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_INVINP12); hwSetup->tmrInvOutp12 = (CSL_TmrInvOutp) CSL_FEXT(hTmr->regs->TCR, TMR_TCR_INVOUTP12); /* Get the TGCR register configurations */ hwSetup->tmrPreScalarCounter34 = (Uint8) CSL_FEXT(hTmr->regs->TCR, \ TMR_TGCR_PSC34); /* Get the operation mode */ hwSetup->tmrTimerMode = (CSL_TmrMode) CSL_FEXT(hTmr->regs->TCR, \ TMR_TGCR_TIMMODE); return CSL_SOK;}
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