?? rdio.lst
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65 =1 P0 Bit Registers
66 =1 ------------------------------------------------*/
67 =1 sbit P0_0 = 0x80;
68 =1 sbit P0_1 = 0x81;
C51 COMPILER V7.20 RDIO 12/08/2004 10:59:27 PAGE 10
69 =1 sbit P0_2 = 0x82;
70 =1 sbit P0_3 = 0x83;
71 =1 sbit P0_4 = 0x84;
72 =1 sbit P0_5 = 0x85;
73 =1 sbit P0_6 = 0x86;
74 =1 sbit P0_7 = 0x87;
75 =1
76 =1 /*------------------------------------------------
77 =1 PCON Bit Values
78 =1 ------------------------------------------------*/
79 =1 #define IDL_ 0x01
80 =1
81 =1 #define STOP_ 0x02
82 =1 #define PD_ 0x02 /* Alternate definition */
83 =1
84 =1 #define GF0_ 0x04
85 =1 #define GF1_ 0x08
86 =1
87 =1 #define SMOD_ 0x80
88 =1
89 =1 /*------------------------------------------------
90 =1 TCON Bit Registers
91 =1 ------------------------------------------------*/
92 =1 sbit IT0 = 0x88;
93 =1 sbit IE0 = 0x89;
94 =1 sbit IT1 = 0x8A;
95 =1 sbit IE1 = 0x8B;
96 =1 sbit TR0 = 0x8C;
97 =1 sbit TF0 = 0x8D;
98 =1 sbit TR1 = 0x8E;
99 =1 sbit TF1 = 0x8F;
100 =1
101 =1 /*------------------------------------------------
102 =1 T2CON Bit Registers
103 =1 ------------------------------------------------*/
104 =1 sbit TF2 = 0xCF;
105 =1 sbit EXF2 = 0xCE;
106 =1 sbit RCLK = 0xCD;
107 =1 sbit TCLK = 0xCC;
108 =1 sbit EXEN2 = 0xCB;
109 =1 sbit TR2 = 0xCA;
110 =1 sbit C_T2 = 0xC9;
111 =1 sbit CP_RL2= 0xC8;
112 =1
113 =1 /*------------------------------------------------
114 =1 TMOD Bit Values
115 =1 ------------------------------------------------*/
116 =1 #define T0_M0_ 0x01
117 =1 #define T0_M1_ 0x02
118 =1 #define T0_CT_ 0x04
119 =1 #define T0_GATE_ 0x08
120 =1 #define T1_M0_ 0x10
121 =1 #define T1_M1_ 0x20
122 =1 #define T1_CT_ 0x40
123 =1 #define T1_GATE_ 0x80
124 =1
125 =1 #define T1_MASK_ 0xF0
126 =1 #define T0_MASK_ 0x0F
127 =1
128 =1 /*------------------------------------------------
129 =1 P1 Bit Registers
130 =1 ------------------------------------------------*/
C51 COMPILER V7.20 RDIO 12/08/2004 10:59:27 PAGE 11
131 =1 sbit P1_0 = 0x90;
132 =1 sbit P1_1 = 0x91;
133 =1 sbit P1_2 = 0x92;
134 =1 sbit P1_3 = 0x93;
135 =1 sbit P1_4 = 0x94;
136 =1 sbit P1_5 = 0x95;
137 =1 sbit P1_6 = 0x96;
138 =1 sbit P1_7 = 0x97;
139 =1
140 =1 /*------------------------------------------------
141 =1 SCON Bit Registers
142 =1 ------------------------------------------------*/
143 =1 sbit RI = 0x98;
144 =1 sbit TI = 0x99;
145 =1 sbit RB8 = 0x9A;
146 =1 sbit TB8 = 0x9B;
147 =1 sbit REN = 0x9C;
148 =1 sbit SM2 = 0x9D;
149 =1 sbit SM1 = 0x9E;
150 =1 sbit SM0 = 0x9F;
151 =1
152 =1 /*------------------------------------------------
153 =1 P2 Bit Registers
154 =1 ------------------------------------------------*/
155 =1 sbit P2_0 = 0xA0;
156 =1 sbit P2_1 = 0xA1;
157 =1 sbit P2_2 = 0xA2;
158 =1 sbit P2_3 = 0xA3;
159 =1 sbit P2_4 = 0xA4;
160 =1 sbit P2_5 = 0xA5;
161 =1 sbit P2_6 = 0xA6;
162 =1 sbit P2_7 = 0xA7;
163 =1
164 =1 /*------------------------------------------------
165 =1 IE Bit Registers
166 =1 ------------------------------------------------*/
167 =1 sbit EX0 = 0xA8; /* 1=Enable External interrupt 0 */
168 =1 sbit ET0 = 0xA9; /* 1=Enable Timer 0 interrupt */
169 =1 sbit EX1 = 0xAA; /* 1=Enable External interrupt 1 */
170 =1 sbit ET1 = 0xAB; /* 1=Enable Timer 1 interrupt */
171 =1 sbit ES = 0xAC; /* 1=Enable Serial port interrupt */
172 =1 sbit ET2 = 0xAD; /* 1=Enable Timer 2 interrupt */
173 =1 sbit EC = 0XAE; /* 1=Enable PCA interrupt */
174 =1 sbit EA = 0xAF; /* 0=Disable all interrupts */
175 =1
176 =1 /*------------------------------------------------
177 =1 P3 Bit Registers (Mnemonics & Ports)
178 =1 ------------------------------------------------*/
179 =1 sbit P3_0 = 0xB0;
180 =1 sbit P3_1 = 0xB1;
181 =1 sbit P3_2 = 0xB2;
182 =1 sbit P3_3 = 0xB3;
183 =1 sbit P3_4 = 0xB4;
184 =1 sbit P3_5 = 0xB5;
185 =1 sbit P3_6 = 0xB6;
186 =1 sbit P3_7 = 0xB7;
187 =1
188 =1 sbit RXD = 0xB0; /* Serial data input */
189 =1 sbit TXD = 0xB1; /* Serial data output */
190 =1 sbit INT0 = 0xB2; /* External interrupt 0 */
191 =1 sbit INT1 = 0xB3; /* External interrupt 1 */
192 =1 sbit T0 = 0xB4; /* Timer 0 external input */
C51 COMPILER V7.20 RDIO 12/08/2004 10:59:27 PAGE 12
193 =1 sbit T1 = 0xB5; /* Timer 1 external input */
194 =1 sbit WR = 0xB6; /* External data memory write strobe */
195 =1 sbit RD = 0xB7; /* External data memory read strobe */
196 =1
197 =1 /*------------------------------------------------
198 =1 IP Bit Registers
199 =1 ------------------------------------------------*/
200 =1 sbit PX0 = 0xB8;
201 =1 sbit PT0 = 0xB9;
202 =1 sbit PX1 = 0xBA;
203 =1 sbit PT1 = 0xBB;
204 =1 sbit PS = 0xBC;
205 =1 sbit PT2 = 0xBD;
206 =1
207 =1 /*------------------------------------------------
208 =1 PSW Bit Registers
209 =1 ------------------------------------------------*/
210 =1 sbit P = 0xD0;
211 =1 sbit FL = 0xD1;
212 =1 sbit OV = 0xD2;
213 =1 sbit RS0 = 0xD3;
214 =1 sbit RS1 = 0xD4;
215 =1 sbit F0 = 0xD5;
216 =1 sbit AC = 0xD6;
217 =1 sbit CY = 0xD7;
218 =1
219 =1 /*------------------------------------------------
220 =1 Interrupt Vectors:
221 =1 Interrupt Address = (Number * 8) + 3
222 =1 ------------------------------------------------*/
223 =1 #define IE0_VECTOR 0 /* 0x03 External Interrupt 0 */
224 =1 #define TF0_VECTOR 1 /* 0x0B Timer 0 */
225 =1 #define IE1_VECTOR 2 /* 0x13 External Interrupt 1 */
226 =1 #define TF1_VECTOR 3 /* 0x1B Timer 1 */
227 =1 #define SIO_VECTOR 4 /* 0x23 Serial port */
228 =1
229 =1 /*------------------------------------------------
230 =1 ------------------------------------------------*/
231 =1
17
18 ///////////////////////////////////////////////////////////////////////////////
19 // Module Definitions
20 ///////////////////////////////////////////////////////////////////////////////
21 #define GetRegPage(adr) (0x80 | (adr>>3))
22
23 unsigned char xdata ini _at_ 0x7f00; // move base address to 0x7f00
24 unsigned char xdata *GpBase = &ini; // redirect pointer to base address
25
26 ///////////////////////////////////////////////////////////////////////////////
27 // Open Reader Communication
28 ///////////////////////////////////////////////////////////////////////////////
29 char OpenIO(void)
30 {
31 1 GpBase = &ini;
32 1 P2_7 = 0; // Enable the CS for RC500
33 1 return 0x00;
34 1 }
35
36 ///////////////////////////////////////////////////////////////////////////////
37 // Close Reader Communication
38 ///////////////////////////////////////////////////////////////////////////////
39 void CloseIO(void)
C51 COMPILER V7.20 RDIO 12/08/2004 10:59:27 PAGE 13
40 {
41 1 GpBase = 0xff00;
42 1 P2_7 = 1; // disable the CS for RC500
43 1 }
44
45 ///////////////////////////////////////////////////////////////////////////////
46 // G E N E R I C W R I T E
47 ///////////////////////////////////////////////////////////////////////////////
48 void WriteIO(unsigned char Address, unsigned char value)
49 {
50 1 WriteRawIO(Address,value); // write value at the specified
51 1 // address
52 1 }
53
54 ///////////////////////////////////////////////////////////////////////////////
55 // G E N E R I C R E A D
56 ///////////////////////////////////////////////////////////////////////////////
57 unsigned char ReadIO(unsigned char Address)
58 {
59 1 static unsigned char c;
60 1 c = ReadRawIO(Address); // read value at the specified
61 1 // address
62 1 return c;
63 1 }
64
65 #ifndef SEC_NO_MICORE
66 ///////////////////////////////////////////////////////////////////////////////
67 // W R I T E S E V E R A L M E M O R Y L O C A T I O N S
68 ///////////////////////////////////////////////////////////////////////////////
69 void WriteIOBlock(unsigned char *Addr_Data, unsigned short len)
70 {
71 1 static unsigned short cnt;
72 1
73 1 for (cnt = 0; cnt < len; cnt++)
74 1 {
75 2 // write value at the specified address
76 2 WriteRawIO(Addr_Data[cnt*2],Addr_Data[cnt * 2 + 1]);
77 2 }
78 1 }
79
80 ///////////////////////////////////////////////////////////////////////////////
81 // R E A D S E V E R A L M E M O R Y L O C A T I O N S
82 ///////////////////////////////////////////////////////////////////////////////
83 void ReadIOBlock(unsigned char* Addr_Data, unsigned short len)
84 {
85 1 static unsigned short cnt;
86 1
87 1 for (cnt = 0; cnt < len; cnt)
88 1 {
89 2 Addr_Data[cnt*2 + 1] = ReadRawIO(Addr_Data[cnt*2]);// read value at the
90 2 // specified address
91 2 }
92 1 }
93 #endif
C51 COMPILER V7.20 RDIO 12/08/2004 10:59:27 PAGE 14
ASSEMBLY LISTING OF GENERATED OBJECT CODE
; FUNCTION OpenIO (BEGIN)
; SOURCE LINE # 29
; SOURCE LINE # 30
; SOURCE LINE # 31
0000 900000 R MOV DPTR,#GpBase
0003 747F MOV A,#HIGH ini
0005 F0 MOVX @DPTR,A
0006 A3 INC DPTR
0007 7400 MOV A,#LOW ini
0009 F0 MOVX @DPTR,A
; SOURCE LINE # 32
000A C2A7 CLR P2_7
; SOURCE LINE # 33
000C 7F00 MOV R7,#00H
; SOURCE LINE # 34
000E ?C0001:
000E 22 RET
; FUNCTION OpenIO (END)
; FUNCTION CloseIO (BEGIN)
; SOURCE LINE # 39
; SOURCE LINE # 40
; SOURCE LINE # 41
0000 900000 R MOV DPTR,#GpBase
0003 74FF MOV A,#0FFH
0005 F0 MOVX @DPTR,A
0006 A3 INC DPTR
0007 E4 CLR A
0008 F0 MOVX @DPTR,A
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