#ifndef _SDRAM_H
#define _SDRAM_H

#include <stdio.h>
#include <string.h>
#include "AT91SAM7SE512.h"


#define AT91C_SDRAM_BASE      ((unsigned char*)  0x20000000) // SDRAM Base Address
#define SDRAM_MAXSIZE         ((unsigned int)  0xFFFFFF) // SDRAM maxsize

#define AT91C_SDRC_TWR_2      ((unsigned int) 0x02 <<  7) // (SDRC) Number of Write Recovery Time Cycles
#define AT91C_SDRC_TRC_4      ((unsigned int) 0x04 << 11) // (SDRC) Number of RAS Cycle Time Cycles
#define AT91C_SDRC_TRP_2      ((unsigned int) 0x02 << 15) // (SDRC) Number of RAS Precharge Time Cycles
#define AT91C_SDRC_TRCD_2     ((unsigned int) 0x02 << 19) // (SDRC) Number of RAS to CAS Delay Cycles
#define AT91C_SDRC_TRAS_3     ((unsigned int) 0x03<< 23) // (SDRC) Number of RAS Active Time Cycles
#define AT91C_SDRC_TXSR_4     ((unsigned int) 0x04<< 27) // (SDRC) Number of Command Recovery Time Cycles

/*
#define AT91C_SDRC_TWR_2      ((unsigned int) 0x0F <<  7) // (SDRC) Number of Write Recovery Time Cycles
#define AT91C_SDRC_TRC_4      ((unsigned int) 0x0F << 11) // (SDRC) Number of RAS Cycle Time Cycles
#define AT91C_SDRC_TRP_2      ((unsigned int) 0x0F << 15) // (SDRC) Number of RAS Precharge Time Cycles
#define AT91C_SDRC_TRCD_2     ((unsigned int) 0x0F << 19) // (SDRC) Number of RAS to CAS Delay Cycles
#define AT91C_SDRC_TRAS_3     ((unsigned int) 0x0F<< 23) // (SDRC) Number of RAS Active Time Cycles
#define AT91C_SDRC_TXSR_4     ((unsigned int) 0x0F<< 27) // (SDRC) Number of Command Recovery Time Cycles
*/

#define AT91C_SDRC_TR_TIME    ((unsigned int) 800) // (SDRC) Number of Command Recovery Time Cycles

#define PIOB_B_ADDRESS        ((unsigned int) 0x7FFD)
#define PIOC_A_DATA           ((unsigned int) 0xFFFF)
#define PA23_B_NWR1           ((unsigned int) (1<<23))
#define PA24_B_SDA10          ((unsigned int) (1<<24))
#define PA25_B_SDCKE          ((unsigned int) (1<<25))
#define PA26_B_SDCS           ((unsigned int) (1<<26))
#define PA27_B_SDWE           ((unsigned int) (1<<27))
#define PA28_B_CAS            ((unsigned int) (1<<28))
#define PA29_B_RAS            ((unsigned int) (1<<29))
#define PA16_B_BA0            ((unsigned int) (1<<16))
#define PA17_B_BA1            ((unsigned int) (1<<17))

//SDRAMC_MR
#define SDRAMC_DWB            ((unsigned int) 1<<4)
#define SDRAMC_MODE           ((unsigned int) 0x00)

//SDRAMC_TR
#define SDRAMC_COUNT          ((unsigned int) 180)

void AT91F_InitSdram (void);
void AT91F_EBI_SDRAM_CfgPIO(void);
void delay(unsigned int dly );
void AT91F_SDRAM_Write(unsigned int Addr ,unsigned char Data);
unsigned char AT91F_SDRAM_Read(unsigned int Addr);

#endif  // _PROJECT_H