__text_start:
__start:
      72 EFCF      LDI	R28,0xFF
      73 E2D1      LDI	R29,0x21
      74 BFCD      OUT	0x3D,R28
      75 BFDE      OUT	0x3E,R29
      76 51CE      SUBI	R28,0x1E
      77 40D0      SBCI	R29,0
      78 EA0A      LDI	R16,0xAA
      79 8308      STD	Y+0,R16
      7A 2400      CLR	R0
      7B E0E0      LDI	R30,0
      7C E0F2      LDI	R31,2
      7D E012      LDI	R17,2
      7E 30E2      CPI	R30,2
      7F 07F1      CPC	R31,R17
      80 F011      BEQ	0x0083
      81 9201      ST	R0,Z+
      82 CFFB      RJMP	0x007E
      83 8300      STD	Z+0,R16
      84 EEE4      LDI	R30,0xE4
      85 E0F0      LDI	R31,0
      86 E0A0      LDI	R26,0
      87 E0B2      LDI	R27,2
      88 E010      LDI	R17,0
      89 E000      LDI	R16,0
      8A BF0B      OUT	0x3B,R16
      8B 3EE4      CPI	R30,0xE4
      8C 07F1      CPC	R31,R17
      8D F021      BEQ	0x0092
      8E 95C8      LPM
      8F 9631      ADIW	R30,1
      90 920D      ST	R0,X+
      91 CFF9      RJMP	0x008B
      92 940E 00A9 CALL	_main
_exit:
      94 CFFF      RJMP	_exit
_delay:
  x                    --> R20
  y                    --> R22
  a                    --> R16
      95 940E 0102 CALL	push_xgsetF000
FILE: D:\挑戰(zhàn)杯（保留）\programs\liushuideng\liushuideng.c
(0001) #include<iom16v.h>
(0002) #include<macros.h>
(0003) 
(0004) int i;
(0005) 
(0006) void delay(int a)
(0007) {
(0008)    int x,y;
(0009)    for(x=0;x<a;x++)
      97 2744      CLR	R20
      98 2755      CLR	R21
      99 C00A      RJMP	0x00A4
(0010)       for(y=0;y<1141;y++);
      9A 2766      CLR	R22
      9B 2777      CLR	R23
      9C 5F6F      SUBI	R22,0xFF
      9D 4F7F      SBCI	R23,0xFF
      9E 3765      CPI	R22,0x75
      9F E0E4      LDI	R30,4
      A0 077E      CPC	R23,R30
      A1 F3D4      BLT	0x009C
      A2 5F4F      SUBI	R20,0xFF
      A3 4F5F      SBCI	R21,0xFF
      A4 1740      CP	R20,R16
      A5 0751      CPC	R21,R17
      A6 F39C      BLT	0x009A
      A7 940C 0107 JMP	pop_xgsetF000
(0011) }
(0012) 
(0013) main()
(0014) {
(0015)    DDRA=0xff;
_main:
      A9 EF8F      LDI	R24,0xFF
      AA BB8A      OUT	0x1A,R24
(0016)    PORTA=0xfe;
      AB EF8E      LDI	R24,0xFE
      AC BB8B      OUT	0x1B,R24
      AD C052      RJMP	0x0100
(0017)    while(1)
(0018)    {
(0019)    for(i=0;i<8;i++)
      AE 2422      CLR	R2
      AF 2433      CLR	R3
      B0 9230 0201 STS	i+1,R3
      B2 9220 0200 STS	i,R2
(0020)      {
(0021) 	  PORTA|=0xff;
      B4 B38B      IN	R24,0x1B
      B5 6F8F      ORI	R24,0xFF
      B6 BB8B      OUT	0x1B,R24
(0022) 	  PORTA&=~BIT(i);
      B7 9120 0200 LDS	R18,i
      B9 9130 0201 LDS	R19,i+1
      BB E001      LDI	R16,1
      BC E010      LDI	R17,0
      BD 940E 010C CALL	lsl16
      BF 0118      MOVW	R2,R16
      C0 9420      COM	R2
      C1 9430      COM	R3
      C2 B24B      IN	R4,0x1B
      C3 2455      CLR	R5
      C4 2042      AND	R4,R2
      C5 2053      AND	R5,R3
      C6 BA4B      OUT	0x1B,R4
(0023) 	  delay(50);
      C7 E302      LDI	R16,0x32
      C8 E010      LDI	R17,0
      C9 DFCB      RCALL	_delay
      CA 9180 0200 LDS	R24,i
      CC 9190 0201 LDS	R25,i+1
      CE 9601      ADIW	R24,1
      CF 9390 0201 STS	i+1,R25
      D1 9380 0200 STS	i,R24
      D3 3088      CPI	R24,0x8
      D4 E0E0      LDI	R30,0
      D5 079E      CPC	R25,R30
      D6 F2EC      BLT	0x00B4
(0024) 	 }
(0025)    for(i=6;i>=1;i--)
      D7 E086      LDI	R24,6
      D8 E090      LDI	R25,0
      D9 9390 0201 STS	i+1,R25
      DB 9380 0200 STS	i,R24
(0026)      {
(0027)       PORTA|=0xff;
      DD B38B      IN	R24,0x1B
      DE 6F8F      ORI	R24,0xFF
      DF BB8B      OUT	0x1B,R24
(0028) 	  PORTA&=~BIT(i);
      E0 9120 0200 LDS	R18,i
      E2 9130 0201 LDS	R19,i+1
      E4 E001      LDI	R16,1
      E5 E010      LDI	R17,0
      E6 940E 010C CALL	lsl16
      E8 0118      MOVW	R2,R16
      E9 9420      COM	R2
      EA 9430      COM	R3
      EB B24B      IN	R4,0x1B
      EC 2455      CLR	R5
      ED 2042      AND	R4,R2
      EE 2053      AND	R5,R3
      EF BA4B      OUT	0x1B,R4
(0029) 	  delay(50);
FILE: <library>
      F0 E302      LDI	R16,0x32
      F1 E010      LDI	R17,0
      F2 DFA2      RCALL	_delay
      F3 9180 0200 LDS	R24,i
      F5 9190 0201 LDS	R25,i+1
      F7 9701      SBIW	R24,1
      F8 9390 0201 STS	i+1,R25
      FA 9380 0200 STS	i,R24
      FC 3081      CPI	R24,1
      FD E0E0      LDI	R30,0
      FE 079E      CPC	R25,R30
      FF F6EC      BGE	0x00DD
     100 CFAD      RJMP	0x00AE
     101 9508      RET
push_xgsetF000:
     102 937A      ST	R23,-Y
     103 936A      ST	R22,-Y
     104 935A      ST	R21,-Y
     105 934A      ST	R20,-Y
     106 9508      RET
pop_xgsetF000:
     107 9149      LD	R20,Y+
     108 9159      LD	R21,Y+
     109 9169      LD	R22,Y+
     10A 9179      LD	R23,Y+
     10B 9508      RET
lsl16:
     10C 2322      TST	R18
     10D F021      BEQ	0x0112
     10E 0F00      LSL	R16
     10F 1F11      ROL	R17
     110 952A      DEC	R18
     111 CFFA      RJMP	lsl16
     112 9508      RET