if(!(Fifostatus & SX2_EP4EF))
					{   
						RecievedDataLongth = FifoLength;
						for(i = 0;i<FifoLength;i++)
						{
							epdatar[i] = SX2_Fifo_ReadSingle(ENDPOINT4);
						}
												
						SX2_Fifo_Write(ENDPOINT8,&epdatar[0],FifoLength);
											
						/*小于整數據包的數據提交SX2發送給主機*/
						if(RecievedDataLongth<(FifoLength-1))
						{
							Write_SX2reg(SX2_INPKTEND, 0x08);	
						}
						Write_SX2reg(SX2_EP0BC, 0);		//ADDED 2005,2,3
					}
					
				
				}/* End of reading FIFO24*/
									
				/* FIFO68 read */
				if(Read_SX2reg(SX2_EP68FLAGS, &FifoStatus68))
				{
					/* Do nothing. */		
				}
				
					
			} // End of reading FIFO status.
			
			/* Interrupt sx2Setup service. */
			if(sx2Setup)
			{
				sx2Setup = False;
				/* Analyse OUT type. */
				if(SetupBuff[0] ==VR_TYPE_OUT)
				{
					/* Analyse command type. */
					switch(SetupBuff[1])
					{	
						/* System reset. */
						case VR_RESET:
							/* Write "0" to count register, the operation is over. */
							Write_SX2reg(SX2_EP0BC, 0);
							break;
						/* Read */
						case VR_BULK_READ:
							/* Write "0" to count register, the operation is over. */
							Write_SX2reg(SX2_EP0BC, 0);
							break;
						/* Write */	
						case VR_BULK_WRITE:
							/* Clear endpoint 6 and endpoint 8. */
							switch (SetupBuff[2])
							{
								case ENDPOINT6:
									/*寫入節點6*/
									for(i = 0;i<0x100;i++)
									{
										epdataw1[i] = i*2;	
									}
									for(i = 0;i<0x50;i=i+2)
									{
										epdataw[i/2] = epdataw1[i]+(epdataw1[i+1]<<8);
									}
									/*如果發送小于整數據包的數據時，設置RecievedDataLongth*/
									RecievedDataLongth = 0x3f;
									/*讀當前FIFO的狀態，是否已滿*/
									//regValue = sysreg_read(sysstat0);
									
									FifoWriteCnt = 0;
									SX2_Fifo_Write(ENDPOINT6,&epdataw[0],FifoLength);

									SetupBuff[1] = 0;
									/*寫0到EP0的計數寄存器，結束本次控制握手*/
									Write_SX2reg(SX2_EP0BC, 0);
									break;
								case  ENDPOINT8:
									/*ENDPOINT 8 */
									for(i = 0;i<0x100;i++)
									{
										epdataw1[i] = i*2+1;
									}
									for(i = 0;i<0x50;i=i+2)
									{
										epdataw[i/2] = epdataw1[i]+(epdataw1[i+1]<<8);
									}
									i = 0;
									/* When less than data package,set RecievedDataLongth*/
									RecievedDataLongth = 0x1f;
									/* Read FIFO status, full or not. */
									//StateAdd = DEC6713_STAT_REG;
								//	RegValue = DEC6713_cpld_rget(StateAdd);
									//add
									FifoWriteCnt = 0;
									//Write_SX2reg(SX2_INPKTEND,0x40);
									SX2_Fifo_Write(ENDPOINT8,&epdataw[0],FifoLength);
									
									SetupBuff[1] = 0;
									/* Write "0" to count register, the operation is over. */
									Write_SX2reg(SX2_EP0BC, 0);
									break;
								default:
									/* Write "0" to count register, the operation is over. */
									Write_SX2reg(SX2_EP0BC, 0);
									break;	
							}
							Write_SX2reg(SX2_EP0BC, 0);		//ADDED 2005,5,12	
							break;
						case VR_LED_OPTION:
							switch(SetupBuff[2])
							{
								case LED_ON:
									/*點亮LED*/
									GPIO_pinWrite(hGpio,GPIO_PIN13,0);
									
									/*寫0到EP0的計數寄存器，結束本次控制握手*/
									Write_SX2reg(SX2_EP0BC, 0);
									break;
								case LED_OFF:
									/*關掉LED*/
									 GPIO_pinWrite(hGpio,GPIO_PIN13,1);
									
									/*寫0到EP0的計數寄存器，結束本次控制握手*/
									Write_SX2reg(SX2_EP0BC, 0);
									break;
								case LED_BLINK:
									/*使D8閃爍*/
									for(i=0;i<50;i++)
									{
									GPIO_pinWrite(hGpio,GPIO_PIN13,0);
									DEC6713_wait(0xFFFFF);			
									GPIO_pinWrite(hGpio,GPIO_PIN13,1);
									DEC6713_wait(0xFFFFF);
									}
									/*寫0到EP0的計數寄存器，結束本次控制握手*/
									Write_SX2reg(SX2_EP0BC, 0);
									break;
								default:
									/*寫0到EP0的計數寄存器，結束本次控制握手*/
									Write_SX2reg(SX2_EP0BC, 0);
									break;
							}
							break;
						/* CODEC test */
						case VR_CODEC_CIRCLE:
							codec_runing = True;
							CODEC_config();		// open Codec
							hMcasp = DEC6713_AIC23_OpenCodec();
							/* Write "0" to count register, the operation is over. */
							Write_SX2reg(SX2_EP0BC, 0);
							break;
							
						case VR_CODEC_HALT:
							codec_runing = False;
							CODEC_close();		// Close Codec
							DEC6713_AIC23_CloseCodec(hMcasp);
							Write_SX2reg(SX2_INPKTEND, SX2_CLEARALL);
							
							/* Write "0" to count register, the operation is over. */
							Write_SX2reg(SX2_EP0BC, 0);
							break;
							
						/* Read Endpoint0 */	
						case VR_ENDPOINT0READ:
							/* Get the length of EP0. */
							if (SetupBuff[6] > 0 || SetupBuff[7] > 0)
							{	
								/* Wait for EP0 ready flag. */
								while(!sx2EP0Buf);
								/* Clear EP0 ready flag. */
								sx2EP0Buf = False;
								/* Read length of data phase. */
								Read_SX2reg(SX2_EP0BC, &endpoint0count);
								/* Read data of data phase. */
								for(i = 0; i<endpoint0count;i++)
								{
									Read_SX2reg(SX2_EP0BUF,&endpoint0data[i]);
								}
							}
							break;
						
						case VR_REGWRITE:
							/* write the actual value to the register */
							Write_SX2reg(SetupBuff[4], SetupBuff[2]);
							/* Write "0" to count register, the operation is over. */
							Write_SX2reg(SX2_EP0BC, 0);
							break;

						default:
							/* Any nonsupport request. */
							/* Write nonzero data to SX2_SETUP to stall the request. */
							Write_SX2reg(SX2_SETUP, 0xff);
							break;	
					}/* Analyse the command type. */

				}
				
				else
				{
					/* Analyse INPUT type. */
					if(SetupBuff[0] == VR_TYPE_IN)
					{
						/* Analyse command type. */
						switch(SetupBuff[1])
						{
							
							/* USB work at full speed or high speed. */
							case VR_USB_VERION:
								if(hshostlink ==True)
								{
									DataToEndpoint0 = 0x55;
								}
								else
								{
									DataToEndpoint0 = 0x54;
								}
								Write_SX2reg(SX2_EP0BUF, DataToEndpoint0);
								/* Write data length to be written. */
								Write_SX2reg(SX2_EP0BC, 1);
								break;
							
							/* SX2REGRD request */
							case VR_REGREAD:
								/* Read the requested register. */									
								Read_SX2reg(SetupBuff[4], &RegValue);
								break;
							
							case VR_ENDPOINT0WRITE:
								/* Data phase or not. */
								if (SetupBuff[6] > 0 || SetupBuff[7] > 0)
								{
									/* Wait for EP0 ready flag. */
									while(!sx2EP0Buf);
									/* Clear EP0 ready flag. */
									sx2EP0Buf = False;
									/* Write the data to the EP0 data buffer */
									Write_SX2reg(SX2_EP0BUF, RegValue);

								   /* Write the byte count so the SX2 sends one byte; */
								   /* ignore requests for more than one byte  */
									Write_SX2reg(SX2_EP0BC, 1);
								}
								else
								{
									/* No data. */
									Write_SX2reg(SX2_EP0BC, 0);
								}
								break;
							
							default:
								/* unsupported request */
								/* write any non-zero value to the setup register
						   		to stall the request. */
								Write_SX2reg(SX2_SETUP, 0xff);
							break;
						}
					}
					else
					{
						/* Any nonsupport request. */
						/* Write nonzero data to SX2_SETUP to stall the request. */
						Write_SX2reg(SX2_SETUP, 0xff);
					}			
				}// The end of analysing input type.
			}// The end of closing  setup interrupt
			
		}// The end of looping main program.
	}// The end of Enumerating loop
}


/********************************************************************************\
\*	End of USB.Test   */