?? usbhw.c
字號:
} while ((cnt & PKT_RDY) == 0);
cnt &= PKT_LNGTH_MASK;
for (n = 0; n < (cnt + 3) / 4; n++) {
*((__packed DWORD *)pData) = RX_DATA;
pData += 4;
}
USB_CTRL = 0;
if (((EP_MSK_ISO >> EPNum) & 1) == 0) { /* Non-Isochronous Endpoint */
WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
WrCmd(CMD_CLR_BUF);
}
return (cnt);
}
/*
* Write USB Endpoint Data
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* pData: Pointer to Data Buffer
* cnt: Number of bytes to write
* Return Value: Number of bytes written
*/
DWORD USB_WriteEP (DWORD EPNum, BYTE *pData, DWORD cnt) {
DWORD n;
USB_CTRL = ((EPNum & 0x0F) << 2) | CTRL_WR_EN;
TX_PLENGTH = cnt;
for (n = 0; n < (cnt + 3) / 4; n++) {
TX_DATA = *((__packed DWORD *)pData);
pData += 4;
}
USB_CTRL = 0;
WrCmd(CMD_SEL_EP(EPAdr(EPNum)));
WrCmd(CMD_VALID_BUF);
return (cnt);
}
#if USB_DMA
/* DMA Descriptor Memory Layout */
const DWORD DDAdr[2] = { DD_NISO_ADR, DD_ISO_ADR };
const DWORD DDSz [2] = { 16, 20 };
/*
* Setup USB DMA Transfer for selected Endpoint
* Parameters: EPNum: Endpoint Number
* pDD: Pointer to DMA Descriptor
* Return Value: TRUE - Success, FALSE - Error
*/
BOOL USB_DMA_Setup(DWORD EPNum, USB_DMA_DESCRIPTOR *pDD) {
DWORD num, ptr, nxt, iso, n;
iso = pDD->Cfg.Type.IsoEP; /* Iso or Non-Iso Descriptor */
num = EPAdr(EPNum); /* Endpoint's Physical Address */
ptr = 0; /* Current Descriptor */
nxt = udca[num]; /* Initial Descriptor */
while (nxt) { /* Go through Descriptor List */
ptr = nxt; /* Current Descriptor */
if (!pDD->Cfg.Type.Link) { /* Check for Linked Descriptors */
n = (ptr - DDAdr[iso]) / DDSz[iso]; /* Descriptor Index */
DDMemMap[iso] &= ~(1 << n); /* Unmark Memory Usage */
}
nxt = *((DWORD *)ptr); /* Next Descriptor */
}
for (n = 0; n < 32; n++) { /* Search for available Memory */
if ((DDMemMap[iso] & (1 << n)) == 0) {
break; /* Memory found */
}
}
if (n == 32) return (FALSE); /* Memory not available */
DDMemMap[iso] |= 1 << n; /* Mark Memory Usage */
nxt = DDAdr[iso] + n * DDSz[iso]; /* Next Descriptor */
if (ptr && pDD->Cfg.Type.Link) {
*((DWORD *)(ptr + 0)) = nxt; /* Link in new Descriptor */
*((DWORD *)(ptr + 4)) |= 0x00000004; /* Next DD is Valid */
} else {
udca[num] = nxt; /* Save new Descriptor */
UDCA[num] = nxt; /* Update UDCA in USB */
}
/* Fill in DMA Descriptor */
*(((DWORD *)nxt)++) = 0; /* Next DD Pointer */
*(((DWORD *)nxt)++) = pDD->Cfg.Type.ATLE |
(pDD->Cfg.Type.IsoEP << 4) |
(pDD->MaxSize << 5) |
(pDD->BufLen << 16);
*(((DWORD *)nxt)++) = pDD->BufAdr;
*(((DWORD *)nxt)++) = pDD->Cfg.Type.LenPos << 8;
if (iso) {
*((DWORD *)nxt) = pDD->InfoAdr;
}
return (TRUE); /* Success */
}
/*
* Enable USB DMA Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_DMA_Enable (DWORD EPNum) {
EP_DMA_EN = 1 << EPAdr(EPNum);
}
/*
* Disable USB DMA Endpoint
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: None
*/
void USB_DMA_Disable (DWORD EPNum) {
EP_DMA_DIS = 1 << EPAdr(EPNum);
}
/*
* Get USB DMA Endpoint Status
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: DMA Status
*/
DWORD USB_DMA_Status (DWORD EPNum) {
DWORD ptr, val;
ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */
if (ptr == 0) return (USB_DMA_INVALID);
val = *((DWORD *)(ptr + 3*4)); /* Status Information */
switch ((val >> 1) & 0x0F) {
case 0x00: /* Not serviced */
return (USB_DMA_IDLE);
case 0x01: /* Being serviced */
return (USB_DMA_BUSY);
case 0x02: /* Normal Completition */
return (USB_DMA_DONE);
case 0x03: /* Data Under Run */
return (USB_DMA_UNDER_RUN);
case 0x08: /* Data Over Run */
return (USB_DMA_OVER_RUN);
case 0x09: /* System Error */
return (USB_DMA_ERROR);
}
return (USB_DMA_UNKNOWN);
}
/*
* Get USB DMA Endpoint Current Buffer Address
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: DMA Address (or -1 when DMA is Invalid)
*/
DWORD USB_DMA_BufAdr (DWORD EPNum) {
DWORD ptr, val;
ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */
if (ptr == 0) return ((DWORD)(-1)); /* DMA Invalid */
val = *((DWORD *)(ptr + 2*4)); /* Buffer Address */
return (val); /* Current Address */
}
/*
* Get USB DMA Endpoint Current Buffer Count
* Number of transfered Bytes or Iso Packets
* Parameters: EPNum: Endpoint Number
* EPNum.0..3: Address
* EPNum.7: Dir
* Return Value: DMA Count (or -1 when DMA is Invalid)
*/
DWORD USB_DMA_BufCnt (DWORD EPNum) {
DWORD ptr, val;
ptr = UDCA[EPAdr(EPNum)]; /* Current Descriptor */
if (ptr == 0) return ((DWORD)(-1)); /* DMA Invalid */
val = *((DWORD *)(ptr + 3*4)); /* Status Information */
return (val >> 16); /* Current Count */
}
#endif /* USB_DMA */
/*
* Get USB Last Frame Number
* Parameters: None
* Return Value: Frame Number
*/
DWORD USB_GetFrame (void) {
DWORD val;
WrCmd(CMD_RD_FRAME);
val = RdCmdDat(DAT_RD_FRAME);
val = val | (RdCmdDat(DAT_RD_FRAME) << 8);
return (val);
}
/*
* USB Interrupt Service Routine
*/
void USB_ISR (void) __irq {
DWORD disr, val, n, m;
disr = DEV_INT_STAT; /* Device Interrupt Status */
/* Device Status Interrupt (Reset, Connect change, Suspend/Resume) */
if (disr & DEV_STAT_INT) {
WrCmd(CMD_GET_DEV_STAT);
val = RdCmdDat(DAT_GET_DEV_STAT); /* Device Status */
if (val & DEV_RST) { /* Reset */
USB_Reset();
#if USB_RESET_EVENT
USB_Reset_Event();
#endif
goto isr_end;
}
if (val & DEV_CON_CH) { /* Connect change */
#if USB_POWER_EVENT
USB_Power_Event(val & DEV_CON);
#endif
goto isr_end;
}
if (val & DEV_SUS_CH) { /* Suspend/Resume */
if (val & DEV_SUS) { /* Suspend */
USB_Suspend();
#if USB_SUSPEND_EVENT
USB_Suspend_Event();
#endif
} else { /* Resume */
USB_Resume();
#if USB_RESUME_EVENT
USB_Resume_Event();
#endif
}
goto isr_end;
}
}
#if USB_SOF_EVENT
/* Start of Frame Interrupt */
if (disr & FRAME_INT) {
USB_SOF_Event();
}
#endif
#if USB_ERROR_EVENT
/* Error Interrupt */
if (disr & ERR_INT) {
WrCmd(CMD_RD_ERR_STAT);
val = RdCmdDat(DAT_RD_ERR_STAT);
USB_Error_Event(val);
}
#endif
/* Endpoint's Slow Interrupt */
if (disr & EP_SLOW_INT) {
while (EP_INT_STAT) { /* Endpoint Interrupt Status */
for (n = 0; n < USB_EP_NUM; n++) { /* Check All Endpoints */
if (EP_INT_STAT & (1 << n)) {
m = n >> 1;
EP_INT_CLR = 1 << n;
while ((DEV_INT_STAT & CDFULL_INT) == 0);
val = CMD_DATA;
if ((n & 1) == 0) { /* OUT Endpoint */
if (n == 0) { /* Control OUT Endpoint */
if (val & EP_SEL_STP) { /* Setup Packet */
if (USB_P_EP[0]) {
USB_P_EP[0](USB_EVT_SETUP);
continue;
}
}
}
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_OUT);
}
} else { /* IN Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_IN);
}
}
}
}
}
}
#if USB_DMA
if (DMA_INT_STAT & 0x00000001) { /* End of Transfer Interrupt */
val = EOT_INT_STAT;
for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */
if (val & (1 << n)) {
m = n >> 1;
if ((n & 1) == 0) { /* OUT Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_OUT_DMA_EOT);
}
} else { /* IN Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_IN_DMA_EOT);
}
}
}
}
EOT_INT_CLR = val;
}
if (DMA_INT_STAT & 0x00000002) { /* New DD Request Interrupt */
val = NDD_REQ_INT_STAT;
for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */
if (val & (1 << n)) {
m = n >> 1;
if ((n & 1) == 0) { /* OUT Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_OUT_DMA_NDR);
}
} else { /* IN Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_IN_DMA_NDR);
}
}
}
}
NDD_REQ_INT_CLR = val;
}
if (DMA_INT_STAT & 0x00000004) { /* System Error Interrupt */
val = SYS_ERR_INT_STAT;
for (n = 2; n < USB_EP_NUM; n++) { /* Check All Endpoints */
if (val & (1 << n)) {
m = n >> 1;
if ((n & 1) == 0) { /* OUT Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_OUT_DMA_ERR);
}
} else { /* IN Endpoint */
if (USB_P_EP[m]) {
USB_P_EP[m](USB_EVT_IN_DMA_ERR);
}
}
}
}
SYS_ERR_INT_CLR = val;
}
#endif /* USB_DMA */
isr_end:
DEV_INT_CLR = disr;
VICVectAddr = 0; /* Acknowledge Interrupt */
}
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