/************************************************** * * ldrsw.c * * CVS ID:   $Id: ldrsw.c,v 1.16 2007/09/26 15:04:54 dellorto Exp $ * Author:   Fabio Dell'Orto [FD] - STM * Date:     $Date: 2007/09/26 15:04:54 $ * Revision: $Revision: 1.16 $ *  * Description: *  *   * *************************************************** *  * COPYRIGHT (C) ST Microelectronics  2005 *            All Rights Reserved * *************************************************** * * STM CVS Log: * * $Log: ldrsw.c,v $ * Revision 1.16  2007/09/26 15:04:54  dellorto * fixed timings for Shinwa CDC02 * * Revision 1.15  2007/08/14 15:27:56  dellorto * multiple mechanisms * * Revision 1.13  2006/12/19 17:05:08  dellorto * fixed switches initialization * * Revision 1.12  2006/12/04 14:50:28  dellorto * loader improved, according to new timing specification * * Revision 1.11  2006/10/26 10:23:37  dellorto * improved alignements with Shinwa transition timings * improved protection against illegal switchings * improved handling of mechanisms with altered chuck switch * * Revision 1.10  2006/09/18 09:55:23  belardi * Corrected CVS keyword usage * * Revision 1.9  2006/09/18 09:24:22  belardi * Added Log CVS keyword into file header * * ***************************************************/#include "gendef.h"#include "hwreg.h"#include "osal.h"#include "utility.h"#include "loader.h"#if (HAVE_CD_MECHA == 1)/* Check switch states */typedef enum{  CS_S_STABLE,  CS_S_DEBOUNCING} t_cs_switch_state;static uint8 ldr_sw1_val;static uint8 ldr_sw2_val;static uint8 ldr_sw4_val;static uint8 ldr_stable_sw1_val;static uint8 ldr_stable_sw2_val;static uint8 ldr_stable_sw4_val;static t_cs_switch_state ldr_cs_sw1_state;static t_cs_switch_state ldr_cs_sw2_state;static t_cs_switch_state ldr_cs_sw4_state;static t_bool ldr_sw_enable = FALSE;void loader_switch_init(void){  ldr_cs_sw1_state = CS_S_STABLE;  ldr_cs_sw2_state = CS_S_STABLE;  ldr_cs_sw4_state = CS_S_STABLE;  ldr_sw1_val = SW_INVALID_VAL;  ldr_sw2_val = SW_INVALID_VAL;  ldr_sw4_val = SW_INVALID_VAL;  ldr_stable_sw1_val = SW_INVALID_VAL;  ldr_stable_sw2_val = SW_INVALID_VAL;  ldr_stable_sw4_val = SW_INVALID_VAL;  ldr_sw_enable = TRUE;}#define LDR_SET_SW_OUT_EVENT(x)   do { event_out[LOADER_SW_EVENT].event = (x); } while(0)/******************************************************************************//* Function:  check_switch_status                                             *//*                                                                            *//*! \brief    check single switch status, removing bouncing *  \param    void *  \return   void *  \remarks *//******************************************************************************/void check_switch_status(uint8 current_sw_val,                         uint8 *ldr_sw_val,                         t_cs_switch_state *ldr_cs_sw_state,                         uint8 *ldr_stable_sw_val,                         OSAL_TIMEOUT_ID_t loader_sw_db_timer_index,                         uint8 db_time){  if (current_sw_val != *ldr_sw_val)  {    *ldr_sw_val = current_sw_val;    *ldr_cs_sw_state = CS_S_DEBOUNCING;    start_timer(loader_sw_db_timer_index, db_time);  }  else if ((CS_S_DEBOUNCING == *ldr_cs_sw_state)        && (!timer_in_progress(loader_sw_db_timer_index)))  {    *ldr_cs_sw_state = CS_S_STABLE;    *ldr_stable_sw_val = current_sw_val;  }#if 0    /* equivalent expanded code */  if (CS_S_STABLE == *ldr_cs_sw_state)  {    if (current_sw_val != *ldr_sw_val)    {      *ldr_sw_val = current_sw_val;      *ldr_cs_sw_state = CS_S_DEBOUNCING;      start_timer(loader_sw_db_timer_index, db_time);    }  }  else /* ((CS_S_DEBOUNCING == *ldr_cs_sw_state) */  {    if (current_sw_val != *ldr_sw_val)    {      *ldr_sw_val = current_sw_val;      start_timer(loader_sw_db_timer_index, db_time);    }    else if(!timer_in_progress(loader_sw_db_timer_index))    {      *ldr_cs_sw_state = CS_S_STABLE;      *ldr_stable_sw_val = current_sw_val;    }  }#endif}/******************************************************************************//* Function:  remap_switch_code                                               *//*                                                                            *//*! \brief    remaps switch codes according to Tanashin TN-2007 documentation *  \param    void *  \return   void *  \remarks *//******************************************************************************/uint8 remap_switch_code(uint8 input_code){  uint8 output_code;  if (IS_TANASHIN_MECHANISM(mechanism_model))  {    output_code = input_code + 1;    if (output_code == 0x08)    {      output_code = 0x04;    }    else if (output_code == 0x04)    {      output_code = 0x08;    }  }  else  {    output_code = input_code;  }    return output_code;}/******************************************************************************//* Function:  loader_check_switch_isr                                         *//*                                                                            *//*! \brief    combines status of switches in a unique code, *            generating events when code changes *  \param    void *  \return   void *  \remarks *//******************************************************************************/void loader_check_switch_isr(void){  uint8 current_sw1_val, current_sw2_val, current_sw4_val;  uint8 previous_ldr_stable_switch_val, new_ldr_stable_switch_val;  OSAL_TIME_t sw4_deb_time;        if (TRUE == ldr_sw_enable)  {    if (IS_TANASHIN_MECHANISM(mechanism_model))    {      if (IS_TANASHIN_MECHANISM_TN2001(mechanism_model))      {        current_sw1_val = SW_INSERT_M45;      }      else   // (IS_TANASHIN_MECHANISM_TN2007(mechanism_model))      {        current_sw1_val = SW_INSERT_M67;      }      current_sw2_val = SW_EJECT_M4567;      current_sw4_val = SW_STOP_M4567;      sw4_deb_time = T4ms;    }    else    {      current_sw1_val = SW_INSERT_M01;      current_sw2_val = SW_EJECT_M01;      current_sw4_val = SW_STOP_M01;      if (mechanism_model == M0_SHINWA_CDC02)      {        sw4_deb_time = T6ms;      }      else   // (mechanism_model == M1_SHINWA_CLC01)      {        sw4_deb_time = T10ms;      }    }    previous_ldr_stable_switch_val = remap_switch_code(ldr_stable_sw1_val | ldr_stable_sw2_val | ldr_stable_sw4_val);    check_switch_status(current_sw1_val, &ldr_sw1_val, &ldr_cs_sw1_state, &ldr_stable_sw1_val, LOADER_SW1_DB_TIMER, T10ms);    check_switch_status(current_sw2_val, &ldr_sw2_val, &ldr_cs_sw2_state, &ldr_stable_sw2_val, LOADER_SW2_DB_TIMER, T10ms);    check_switch_status(current_sw4_val, &ldr_sw4_val, &ldr_cs_sw4_state, &ldr_stable_sw4_val, LOADER_SW4_DB_TIMER, sw4_deb_time);    new_ldr_stable_switch_val = remap_switch_code(ldr_stable_sw1_val | ldr_stable_sw2_val | ldr_stable_sw4_val);    if (new_ldr_stable_switch_val != previous_ldr_stable_switch_val)    {      LDR_SET_SW_OUT_EVENT(SW_EVENT | new_ldr_stable_switch_val);      DEBUG_LOADER_SWITCH(("LOADER_SWITCH:", 1, 1, new_ldr_stable_switch_val));    }    event_disable_scheduling();    event_out_shedule(LOADER_SW_EVENT);    event_enable_scheduling();  }  }#endif //HAVE_CD_MECHA