?? usbdev.c
字號(hào):
/*------------------------------------------------------------------------------
*
* Filename: usbd_h.cpp
*
* Contents:
*
* Notes:
* 29.Nov.2005 By Hyunsun.Ahn 1st Made
* 27.Dec.2006 modified By gyu hwan cha
*
* Contributors : Hyunsun.ahn
*
* Copyright (c) 2005 SAMSUNG Electronics.
*
*------------------------------------------------------------------------------
*/
#include "system.h"
#include "usbdev.h"
#include "2450addr.h"
//#define DBG_USBD20
//#define STALL_CHECK
#ifndef __NANDBL
#ifdef DBG_USBD20
#define Dbg printf
#define DbgUsb(x) Dbg x
#else
#define DbgUsb(x) 0;
#endif
extern U32 downloadAddress;
extern download_run;
extern volatile U8 dma_done;
extern tempDownloadAddress;
U32 loop_count;
#define USBDEV_BASE 0x49800000
#define Outp32(addr, data) (*(volatile U32 *)(addr) = (data))
#define Outp16(addr, data) (*(volatile U16 *)(addr) = (data))
#define Outp8(addr, data) (*(volatile U8 *)(addr) = (data))
#define Inp32(addr, data) (data = (*(volatile U32 *)(addr)))
#define Inp16(addr, data) (data = (*(volatile U16 *)(addr)))
#define Inp8(addr, data) (data = (*(volatile U16 *)(addr)))
#define Input32(addr) (*(volatile U32 *)(addr))
#define USBD20_REGS U32
#define INDEX_REG (USBDEV_BASE+0x00) // Index register
#define EP_INT_REG (USBDEV_BASE+0x04) // EP Interrupt pending and clear
#define EP_INT_EN_REG (USBDEV_BASE+0x08) // EP Interrupt enable
#define FUNC_ADDR_REG (USBDEV_BASE+0x0c) // Function address
#define FRAME_NUg_REG (USBDEV_BASE+0x10) // Frame number
#define EP_DIR_REG (USBDEV_BASE+0x14) // Endpoint direction
#define TEST_REG (USBDEV_BASE+0x18) // Test register
#define SYS_STATUS_REG (USBDEV_BASE+0x1c) // System status
#define SYS_CON_REG (USBDEV_BASE+0x20) // System control
#define EP0_STATUS_REG (USBDEV_BASE+0x24) // Endpoint 0 status
#define EP0_CON_REG (USBDEV_BASE+0x28) // Endpoint 0 control
#define EP_STATUS_REG (USBDEV_BASE+0x2c) // Endpoints status
#define EP_CON_REG (USBDEV_BASE+0x30) // Endpoints control
#define BYTE_READ_CNT_REG (USBDEV_BASE+0x34) // read count
#define BYTE_WRITE_CNT_REG (USBDEV_BASE+0x38) // write count
#define MAX_PKT_REG (USBDEV_BASE+0x3c) // Max packet size
#define DMA_CON_REG (USBDEV_BASE+0x40) // DMA control
#define DMA_CNT_REG (USBDEV_BASE+0x44) // DMA count
#define DMA_FIFO_CNT_REG (USBDEV_BASE+0x48) // DMA FIFO count
#define DMA_TOTAL_CNT1_REG (USBDEV_BASE+0x4c) // DMA Total count1
#define DMA_TOTAL_CNT2_REG (USBDEV_BASE+0x50) // DMA Total count2
#define DMA_IF_CON_REG (USBDEV_BASE+0x84) // DMA interface Control
#define DMA_MEg_BASE_ADDR (USBDEV_BASE+0x88) // Mem Base Addr
#define DMA_MEg_CURRENT_ADDR (USBDEV_BASE+0x8c) // Mem current Addr
#define EP0_FIFO (USBDEV_BASE+0x60) // Endpoint 0 FIFO
#define EP1_FIFO (USBDEV_BASE+0x64) // Endpoint 1 FIFO
#define EP2_FIFO (USBDEV_BASE+0x68) // Endpoint 2 FIFO
#define EP3_FIFO (USBDEV_BASE+0x6c) // Endpoint 3 FIFO
#define EP4_FIFO (USBDEV_BASE+0x70) // Endpoint 4 FIFO
#define FCON (USBDEV_BASE+0x100) // Burst Fifo Control
// Descriptor Types
#define DESC_TYPE unsigned char
#define DEVICE_TYPE 0x1
#define CONFIGURATION_TYPE 2
#define STRING_TYPE 3
#define INTERFACE_TYPE 4
#define ENDPOINT_TYPE 5
// configuration descriptor: bmAttributes
#define DESC_CONF unsigned char
#define CONF_ATTR_DEFAULT 0x80 // Spec 1.0 it was BUSPOWERED bit.
#define CONF_ATTR_REMOTE_WAKEUP 0x20
#define CONF_ATTR_SELFPOWERED 0x40
// endpoint descriptor
#define DESC_ENDPT unsigned char
#define EP_ADDR_IN 0x80
#define EP_ADDR_OUT 0x00
#define EP_ATTR_CONTROL 0x0
#define EP_ATTR_ISOCHRONOUS 0x1
#define EP_ATTR_BULK 0x2
#define EP_ATTR_INTERRUPT 0x3
#define EP_INDEX unsigned char
#define EP0 0
#define EP1 1
#define EP2 2
#define EP3 3
#define EP4 4
typedef struct __USB_DEVICE_DESCRIPTOR
{
U8 bLength;
U8 bDescriptorType;
U8 bcdUSBL;
U8 bcdUSBH;
U8 bDeviceClass;
U8 bDeviceSubClass;
U8 bDeviceProtocol;
U8 bMaxPacketSize0;
U8 idVendorL;
U8 idVendorH;
U8 idProductL;
U8 idProductH;
U8 bcdDeviceL;
U8 bcdDeviceH;
U8 iManufacturer;
U8 iProduct;
U8 iSerialNumber;
U8 bNumConfigurations;
}USB_DEVICE_DESCRIPTOR;
typedef struct __USB_CONFIGURATION_DESCRIPTOR
{
U8 bLength;
U8 bDescriptorType;
U8 wTotalLengthL;
U8 wTotalLengthH;
U8 bNumInterfaces;
U8 bConfigurationValue;
U8 iConfiguration;
U8 bmAttributes;
U8 maxPower;
}USB_CONFIGURATION_DESCRIPTOR;
typedef struct __USB_INTERFACE_DESCRIPTOR
{
U8 bLength;
U8 bDescriptorType;
U8 bInterfaceNumber;
U8 bAlternateSetting;
U8 bNumEndpoints;
U8 bInterfaceClass;
U8 bInterfaceSubClass;
U8 bInterfaceProtocol;
U8 iInterface;
}USB_INTERFACE_DESCRIPTOR;
typedef struct __USB_ENDPOINT_DESCRIPTOR
{
U8 bLength;
U8 bDescriptorType;
U8 bEndpointAddress;
U8 bmAttributes;
U8 wMaxPacketSizeL;
U8 wMaxPacketSizeH;
U8 bInterval;
}USB_ENDPOINT_DESCRIPTOR;
typedef struct __USB_CONFIGURATION_SET
{
U8 ConfigurationValue;
}USB_CONFIGURATION_SET;
typedef struct __USB_GET_STATUS
{
U8 Device;
U8 Interface;
U8 Endpoint0;
U8 Endpoint1;
U8 Endpoint3;
}USB_GET_STATUS;
USB_GET_STATUS oStatusGet;
typedef struct __USB_INTERFACE_GET
{
U8 AlternateSetting;
}USB_INTERFACE_GET;
USB_INTERFACE_GET oInterfaceGet;
typedef struct __USB_DESCRIPTORS
{
USB_CONFIGURATION_DESCRIPTOR oDescConfig;
USB_INTERFACE_DESCRIPTOR oDescInterface;
USB_ENDPOINT_DESCRIPTOR oDescEndpt1;
USB_ENDPOINT_DESCRIPTOR oDescEndpt3;
USB_ENDPOINT_DESCRIPTOR oDescEndpt2;
USB_ENDPOINT_DESCRIPTOR oDescEndpt4;
}USB_DESCRIPTORS;
typedef struct __DEVICE_REQUEST
{
U8 bmRequestType; // Device Request offset 0
U8 bRequest; // Device Request offset 1
U8 wValue_L; // Device Request offset 2
U8 wValue_H; // Device Request offset 3
U8 wIndex_L; // Device Request offset 4
U8 wIndex_H; // Device Request offset 5
U8 wLength_L; // Device Request offset 6
U8 wLength_H; // Device Request offset 7
}DEVICE_REQUEST;
// EP0 CSR register Bits
#define EP0_SENT_STALL (0x01<<4)
#define EP0_DATA_END (0x01<<3)
#define EP0_SETUP_END (0x03<<2)
#define EP0_TX_SUCCESS (0x01<<1)
#define EP0_RX_SUCCESS (0x01<<0)
// Defines for Endpoint CSR Register Bits
#define DMA_TOTAL_COUNT_ZERO (0x1<<9)
#define SHORT_PKT_RECEIVED (0x1<<8)
#define EP_FIFO_FLUSH (0x1<<6)
#define EP_SENT_STALL (0x1<<5)
#define EP_TX_SUCCESS (0x1<<1)
#define EP_RX_SUCCESS (0x1<<0)
#define EP0_STATE_INIT (0)
#define EP0_STATE_GD_DEV_0_0 (11)
//#define EP0_STATE_GD_DEV_0_1 (14)
#define EP0_STATE_GD_DEV_1 (12)
#define EP0_STATE_GD_DEV_2 (13)
#define EP0_STATE_GD_CFG_0 (21)
#define EP0_STATE_GD_CFG_1 (22)
#define EP0_STATE_GD_CFG_2 (23)
#define EP0_STATE_GD_CFG_3 (24)
#define EP0_STATE_GD_CFG_4 (25)
#define EP0_STATE_GD_CFG_ONLY_0 (41)
#define EP0_STATE_GD_CFG_ONLY_1 (42)
#define EP0_STATE_GD_IF_ONLY_0 (44)
#define EP0_STATE_GD_IF_ONLY_1 (45)
#define EP0_STATE_GD_EP0_ONLY_0 (46)
#define EP0_STATE_GD_EP1_ONLY_0 (47)
#define EP0_STATE_GD_EP2_ONLY_0 (48)
#define EP0_STATE_GD_EP3_ONLY_0 (49)
#define EP0_STATE_GD_STR_I0 (30)
#define EP0_STATE_GD_STR_I1 (31)
#define EP0_STATE_GD_STR_I2 (32)
#define EP0_STATE_GD_DEV_QUALIFIER (33)
#define EP0_STATE_GD_DEV_QUALIFIER_1 (55)
#define EP0_INTERFACE_GET (34)
#define EP0_GET_STATUS0 (35)
#define EP0_GET_STATUS1 (36)
#define EP0_GET_STATUS2 (37)
#define EP0_GET_STATUS3 (38)
#define EP0_GET_STATUS4 (39)
#define EP0_STATE_GD_DEV_OTHER_SPEED (40)
#define EP0_STATE_GD_DEV_OTHER_SPEED_1 (56)
// SPEC1.1
// Standard bmRequestType (Type)
#define STANDARD_TYPE 0x00
#define CLASS_TYPE 0x20
#define VENDOR_TYPE 0x40
#define RESERVED_TYPE 0x60
// Standard bmRequestType (Recipient)
#define DEVICE_RECIPIENT 0
#define INTERFACE_RECIPIENT 1
#define ENDPOINT_RECIPIENT 2
#define OTHER_RECIPIENT 3
// Standard bRequest codes
#define STANDARD_GET_STATUS 0
#define STANDARD_CLEAR_FEATURE 1
#define STANDARD_RESERVED_1 2
#define STANDARD_SET_FEATURE 3
#define STANDARD_RESERVED_2 4
#define STANDARD_SET_ADDRESS 5
#define STANDARD_GET_DESCRIPTOR 6
#define STANDARD_SET_DESCRIPTOR 7
#define STANDARD_GET_CONFIGURATION 8
#define STANDARD_SET_CONFIGURATION 9
#define STANDARD_GET_INTERFACE 10
#define STANDARD_SET_INTERFACE 11
#define STANDARD_SYNCH_FRAME 12
// Descriptor types
#define DEVICE_DESCRIPTOR 1
#define CONFIGURATION_DESCRIPTOR 2
#define STRING_DESCRIPTOR 3
#define INTERFACE_DESCRIPTOR 4
#define ENDPOINT_DESCRIPTOR 5
#define DEVICE_QUALIFIER 6
#define OTHER_SPEED_CONFIGURATION 7
// string descriptor
#define LANGID_US_L (0x09)
#define LANGID_US_H (0x04)
// USB Endpoints states
#define EP0_STATE_IDLE (0)
#define EP0_STATE_TRANSFER (1)
#define EP0_STATE_RECEIVER (2)
#define BULK_OUT_STATUS_NOSTALL (0x0000)
#define BULK_OUT_STATUS_STALL (0x0001)
#define DEVICE_STATUS_DEFAULT (0x0000)
#define DEVICE_STATUS_SELFPOWERED (0x0001)
#define DEVICE_STATUS_REMOTEWAKEUP (0x0002)
#define DEVICE_DESC_SIZE 18
#define STRING_DESC0_SIZE 4
#define STRING_DESC1_SIZE 22
#define STRING_DESC2_SIZE 44
#define CONFIG_DESC_TOTAL_SIZE 32
#define CONFIG_DESC_SIZE 9
#define INTERFACE_DESC_SIZE 9
#define ENDPOINT_DESC_SIZE 7
#define DEVICE_QUALIFIER_SIZE 10
#define OTHER_SPEED_CONFIGURATION_SIZE 9
// INT_REG status value
#define INT_ERR (0xff80)
#define INT_REG_ERROR (0xff1<<6)
#define INT_REG_VBUS (0x1<<8)
#define INT_REG_VBUS_CLEAR (0x1<<6)
#define INT_REG_HSP (0x1<<4)
#define INT_REG_SDE (0x1<<3)
#define INT_REG_RESET (0x1)
#define INT_REG_RESUME (0x1<<2)
#define INT_REG_SUSPEND (0x1<<1)
#define INT_REG_EP4 (0x1<<4)
#define INT_REG_EP3 (0x1<<3)
#define INT_REG_EP2 (0x1<<2)
#define INT_REG_EP1 (0x1<<1)
#define INT_REG_EP0 (0x1)
#define INT_DTB_MISMATCH (0x1FF<<7)
// USB Dma Operation
#define DMA_AUTO_RX_DISABLE (0x1<<5)
#define DMA_FLY_ENABLE (0x1<<4)
#define DMA_FLY_DISABLE (0x0<<4)
#define DMA_DEMEND_ENABLE (0x1<<3)
#define DMA_DEMEND_DISABLE (0x0<<3)
#define DMA_TX_START (0x1<<2)
#define DMA_TX_STOP (0x0<<2)
#define DMA_RX_START (0x1<<1)
#define DMA_RX_STOP (0x0<<1)
#define USB_DMA_MODE (0x1<<0)
#define USB_INT_MODE (0x0<<0)
#define MAX_BURST_INCR16 (0x3<<0)
#define MAX_BURST_INCR8 (0x2<<0)
#define MAX_BURST_INCR4 (0x1<<0)
#define DMA_ENABLE (0x1<<8)
#define DMA_DISABLE (0x0<<8)
// Feature Selectors
#define EP_STALL 0
#define DEVICE_REMOTE_WAKEUP 1
#define TEST_MODE 2
/* Test Mode Selector*/
#define TEST_J 1
#define TEST_K 2
#define TEST_SE0_NAK 3
#define TEST_PACKET 4
#define TEST_FORCE_ENABLE 5
#define TR_RSVD 0x4F20
#define TR_VBUS 0x8000
#define TR_EUERR 0x2000
#define TR_PERR 0x1000
#define TR_SPDSEL 0x00C0
#define TR_TMD 0x0010
#define TR_TPS 0x0008
#define TR_TKS 0x0004
#define TR_TJS 0x0002
#define TR_TSNS 0x0001
/*********************************************************************
DEVICE QUALIFIER
**********************************************************************/
volatile const U8 aDeviceQualifierDescriptor[] =
{
0x0a, // 0 desc size
0x06, // 1 desc type (DEVICE)
0x00, // 2 USB release
0x02, // 3 => 2.00
0x00, // 4 class
0x00, // 5 subclass
0x00, // 6 protocol
64, // 7 max pack size
0x01, // 8 number of other-speed configuration
0x00, // 9 reserved
};
volatile const U8 aDeviceQualifierDescriptor_1[] =
{
0x04, // 0 desc size
0x06, // 1 desc type (DEVICE)
0x00, // 2 USB release
0x02, // 3 => 2.00
0x00, // 4 class
0x00, // 5 subclass
0x00, // 6 protocol
64, // 7 max pack size
0x01, // 8 number of other-speed configuration
0x00, // 9 reserved
};
volatile const U8 aOtherSpeedConfiguration[] =
{
0x09, // 0 desc size
0x07, // 1 desc type (other speed)
0x20, // 2 Total length of data returned
0x00, // 3
0x01, // 4 Number of interfaces supported by this speed configuration
0x01, // 5 value to use to select configuration
0x00, // 6 index of string desc
CONF_ATTR_DEFAULT|CONF_ATTR_SELFPOWERED,//|CONF_ATTR_REMOTE_WAKEUP, // 7 same as configuration desc
0x25, // 8 same as configuration desc
};
volatile const U8 aOtherSpeedConfiguration_1[] =
{
0x09, 0x07 ,0x20 ,0x00 ,0x01 ,0x01 ,0x00 ,0x80 ,0x19
,0x09 ,0x04 ,0x00 ,0x00 ,0x02 ,0xff ,0x00 ,0x00 ,0x00
,0x07 ,0x05 ,0x82 ,0x02 ,0x40 ,0x00 ,0x00
,0x07 ,0x05 ,0x04 ,0x02 ,0x40 ,0x00 ,0x00
};
volatile const U8 aOtherSpeedConfiguration_2[] =
{
0x09, 0x07 ,0x20 ,0x00 ,0x01 ,0x01 ,0x00 ,0x80 ,0x19
,0x09 ,0x04 ,0x00 ,0x00 ,0x02 ,0xff ,0x00 ,0x00 ,0x00
,0x07 ,0x05 ,0x82 ,0x02 ,0x00 ,0x02 ,0x00
,0x07 ,0x05 ,0x04 ,0x02 ,0x00 ,0x02 ,0x00
};
U8 aDescStr0[]=
{
4, STRING_DESCRIPTOR, LANGID_US_L, LANGID_US_H
};
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