<?xml version="1.0" encoding="ISO-8859-1"?><?xml-stylesheet href="/usr/local/vamdoc-1.0.2-kluwer/config/model.xsl" type="text/xsl"?><!DOCTYPE model SYSTEM "/usr/local/vamdoc-1.0.2-kluwer/config/model.dtd"><model>  <symbol>../symbol/bench.png</symbol>  <comments>    <title>Charge pump test bench</title>    <model_name>BENCH(TEST_DPLL)</model_name>    <library>N/A</library>    <structure>N/A</structure>    <description>The test-bench shows how a digital PLL is built up from<br></br>a phase-frequency detector, a charge pump, an integrator<br></br>and a VCO.<br></br></description>    <link_source><A HREF="../src/bench.vhd">See source code</A></link_source>    <dependency>      <library>IEEE_proposed</library>      <design_unit>ELECTRICAL_SYSTEMS</design_unit>    </dependency>    <dependency>      <library>IEEE</library>      <design_unit>MATH_REAL</design_unit>    </dependency>    <dependency>      <library>WORK</library>      <design_unit>VCO(ANALOG)</design_unit>    </dependency>    <dependency>      <library>WORK</library>      <design_unit>CP(SIMPLE)</design_unit>    </dependency>    <dependency>      <library>WORK</library>      <design_unit>PFD(A1)</design_unit>    </dependency>  </comments>  <interface>  </interface></model>