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<title>
Documentation of VHDL-AMS models
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<table width="802" cellspacing="2" cellpadding="8" border="0">
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<td class="Title" width="802" colspan="2">Analog-to-digital converter
</td>
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<td class="SectionHeader" width="100">
Model Name
</td><td class="SectionText" width="700">
<model_name>A2D(BHV_RF)</model_name>
</td>
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<td class="SectionHeader" width="100">
Symbol
</td><td class="SectionText" width="700"><img alt="No Symbol" src="../symbol/a2d.png">
</td>
</tr>
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<td class="SectionHeader" width="100">
Generics
</td><td class="SectionText" width="700">
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<tr>
<td class="TableHeader">
Name
</td><td class="TableHeader">
Type
</td><td class="TableHeader">
Default
</td><td class="TableHeader">
Unit
</td><td class="TableHeader">
Min
</td><td class="TableHeader">
Description
</td>
</tr>
<tr>
<td class="TableText">PMAX_DBM
</td><td class="TableText">REAL
</td><td class="TableText">-100.0
</td><td class="TableText">dBm
</td><td class="TableText">
</td><td class="TableText"> maximum power amplitude
</td>
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<td class="TableText">RIN
</td><td class="TableText">REAL
</td><td class="TableText">50.0
</td><td class="TableText">Ohm
</td><td class="TableText"> >0.0
</td><td class="TableText"> input resistance
</td>
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</table>
</td>
</tr>
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<td class="SectionHeader" width="100">
Ports
</td><td class="SectionText" width="700">
<table cellspacing="2" cellpadding="4" border="0">
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<td class="TableHeader">
Interface
</td><td class="TableHeader">
Name
</td><td class="TableHeader">
Type/Nature
</td><td class="TableHeader">
Mode
</td><td class="TableHeader">
Description
</td>
</tr>
<tr>
<td class="TableText">terminal
</td><td class="TableText">A
</td><td class="TableText">ELECTRICAL
</td><td class="TableText">
</td><td class="TableText"> analog input
</td>
</tr>
<tr>
<td class="TableText">terminal
</td><td class="TableText">GND
</td><td class="TableText">ELECTRICAL
</td><td class="TableText">
</td><td class="TableText"> analog ground
</td>
</tr>
<tr>
<td class="TableText">signal
</td><td class="TableText">D
</td><td class="TableText">BIT_VECTOR
</td><td class="TableText">out
</td><td class="TableText"> digital output
</td>
</tr>
<tr>
<td class="TableText">signal
</td><td class="TableText">CLK
</td><td class="TableText">BIT
</td><td class="TableText">in
</td><td class="TableText"> clock input
</td>
</tr>
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</td>
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<td class="SectionHeader" width="100">
Description
</td><td class="SectionText" width="700">
<description>This model describes an analog to digital converter. The conversion<br>is done by successive approximation in a digital process at every<br>rising clock edge.<br>
</description>
</td>
</tr>
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<td class="SectionHeader" width="100">
Dependencies
</td><td class="SectionText" width="700">
<table cellspacing="2" cellpadding="4" border="0">
<tr>
<td class="TableHeader">
Logical Library
</td><td class="TableHeader">
Design Unit/Design Entity
</td>
</tr>
<tr>
<td class="TableText">IEEE_proposed
</td><td class="TableText">ELECTRICAL_SYSTEMS
</td>
</tr>
<tr>
<td class="TableText">IEEE
</td><td class="TableText">MATH_REAL
</td>
</tr>
</table>
</td>
</tr>
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<td class="SectionHeader" width="100">
Source
</td><td class="SectionText" width="700">
<link_source>
<A HREF="../src/a2d.vhd">See source code</A>
</link_source>
</td>
</tr>
<tr>
<td class="SectionHeader" width="100">
Example
</td><td class="SectionText" width="700"><A HREF="../tb/doc/bench.html">See test-bench</A></td>
</tr>
</table>
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