?? ioat90usb1287.h
字號(hào):
/* PINB - Port B Input Pins */
#define PINB0 0 // Port B Input Pins bit 0
#define PINB1 1 // Port B Input Pins bit 1
#define PINB2 2 // Port B Input Pins bit 2
#define PINB3 3 // Port B Input Pins bit 3
#define PINB4 4 // Port B Input Pins bit 4
#define PINB5 5 // Port B Input Pins bit 5
#define PINB6 6 // Port B Input Pins bit 6
#define PINB7 7 // Port B Input Pins bit 7
/* ***** PORTC ************************ */
/* PORTC - Port C Data Register */
#define PORTC0 0 // Port C Data Register bit 0
#define PORTC1 1 // Port C Data Register bit 1
#define PORTC2 2 // Port C Data Register bit 2
#define PORTC3 3 // Port C Data Register bit 3
#define PORTC4 4 // Port C Data Register bit 4
#define PORTC5 5 // Port C Data Register bit 5
#define PORTC6 6 // Port C Data Register bit 6
#define PORTC7 7 // Port C Data Register bit 7
/* DDRC - Port C Data Direction Register */
#define DDC0 0 // Port C Data Direction Register bit 0
#define DDC1 1 // Port C Data Direction Register bit 1
#define DDC2 2 // Port C Data Direction Register bit 2
#define DDC3 3 // Port C Data Direction Register bit 3
#define DDC4 4 // Port C Data Direction Register bit 4
#define DDC5 5 // Port C Data Direction Register bit 5
#define DDC6 6 // Port C Data Direction Register bit 6
#define DDC7 7 // Port C Data Direction Register bit 7
/* PINC - Port C Input Pins */
#define PINC0 0 // Port C Input Pins bit 0
#define PINC1 1 // Port C Input Pins bit 1
#define PINC2 2 // Port C Input Pins bit 2
#define PINC3 3 // Port C Input Pins bit 3
#define PINC4 4 // Port C Input Pins bit 4
#define PINC5 5 // Port C Input Pins bit 5
#define PINC6 6 // Port C Input Pins bit 6
#define PINC7 7 // Port C Input Pins bit 7
/* ***** PORTD ************************ */
/* PORTD - Port D Data Register */
#define PORTD0 0 // Port D Data Register bit 0
#define PORTD1 1 // Port D Data Register bit 1
#define PORTD2 2 // Port D Data Register bit 2
#define PORTD3 3 // Port D Data Register bit 3
#define PORTD4 4 // Port D Data Register bit 4
#define PORTD5 5 // Port D Data Register bit 5
#define PORTD6 6 // Port D Data Register bit 6
#define PORTD7 7 // Port D Data Register bit 7
/* DDRD - Port D Data Direction Register */
#define DDD0 0 // Port D Data Direction Register bit 0
#define DDD1 1 // Port D Data Direction Register bit 1
#define DDD2 2 // Port D Data Direction Register bit 2
#define DDD3 3 // Port D Data Direction Register bit 3
#define DDD4 4 // Port D Data Direction Register bit 4
#define DDD5 5 // Port D Data Direction Register bit 5
#define DDD6 6 // Port D Data Direction Register bit 6
#define DDD7 7 // Port D Data Direction Register bit 7
/* PIND - Port D Input Pins */
#define PIND0 0 // Port D Input Pins bit 0
#define PIND1 1 // Port D Input Pins bit 1
#define PIND2 2 // Port D Input Pins bit 2
#define PIND3 3 // Port D Input Pins bit 3
#define PIND4 4 // Port D Input Pins bit 4
#define PIND5 5 // Port D Input Pins bit 5
#define PIND6 6 // Port D Input Pins bit 6
#define PIND7 7 // Port D Input Pins bit 7
/* ***** PORTE ************************ */
/* PORTE - Data Register, Port E */
#define PORTE0 0 //
#define PORTE1 1 //
#define PORTE2 2 //
#define PORTE3 3 //
#define PORTE4 4 //
#define PORTE5 5 //
#define PORTE6 6 //
#define PORTE7 7 //
/* DDRE - Data Direction Register, Port E */
#define DDE0 0 //
#define DDE1 1 //
#define DDE2 2 //
#define DDE3 3 //
#define DDE4 4 //
#define DDE5 5 //
#define DDE6 6 //
#define DDE7 7 //
/* PINE - Input Pins, Port E */
#define PINE0 0 //
#define PINE1 1 //
#define PINE2 2 //
#define PINE3 3 //
#define PINE4 4 //
#define PINE5 5 //
#define PINE6 6 //
#define PINE7 7 //
/* ***** PORTF ************************ */
/* PORTF - Data Register, Port F */
#define PORTF0 0 //
#define PORTF1 1 //
#define PORTF2 2 //
#define PORTF3 3 //
#define PORTF4 4 //
#define PORTF5 5 //
#define PORTF6 6 //
#define PORTF7 7 //
/* DDRF - Data Direction Register, Port F */
#define DDF0 0 //
#define DDF1 1 //
#define DDF2 2 //
#define DDF3 3 //
#define DDF4 4 //
#define DDF5 5 //
#define DDF6 6 //
#define DDF7 7 //
/* PINF - Input Pins, Port F */
#define PINF0 0 //
#define PINF1 1 //
#define PINF2 2 //
#define PINF3 3 //
#define PINF4 4 //
#define PINF5 5 //
#define PINF6 6 //
#define PINF7 7 //
/* ***** CPU ************************** */
/* SREG - Status Register */
#define SREG_C 0 // Carry Flag
#define SREG_Z 1 // Zero Flag
#define SREG_N 2 // Negative Flag
#define SREG_V 3 // Two's Complement Overflow Flag
#define SREG_S 4
#define SREG_H 5 // Half Carry Flag
#define SREG_T 6 // Bit Copy Storage
#define SREG_I 7 // Global Interrupt Enable
/* MCUCR - MCU Control Register */
#define IVCE 0 // Interrupt Vector Change Enable
#define IVSEL 1 // Interrupt Vector Select
#define PUD 4 // Pull-up disable
#define JTD 7 // JTAG Interface Disable
/* MCUSR - MCU Status Register */
#define PORF 0 // Power-on reset flag
#define EXTRF 1 // External Reset Flag
#define BORF 2 // Brown-out Reset Flag
#define WDRF 3 // Watchdog Reset Flag
#define JTRF 4 // JTAG Reset Flag
/* XMCRA - External Memory Control Register A */
#define SRW00 0 // Wait state select bit lower page
#define SRW01 1 // Wait state select bit lower page
#define SRW10 2 // Wait state select bit upper page
#define SRW11 3 // Wait state select bit upper page
#define SRL0 4 // Wait state page limit
#define SRL1 5 // Wait state page limit
#define SRL2 6 // Wait state page limit
#define SRE 7 // External SRAM Enable
/* XMCRB - External Memory Control Register B */
#define XMM0 0 // External Memory High Mask
#define XMM1 1 // External Memory High Mask
#define XMM2 2 // External Memory High Mask
#define XMBK 7 // External Memory Bus Keeper Enable
/* OSCCAL - Oscillator Calibration Value */
#define CAL0 0 // Oscillator Calibration Value Bit0
#define CAL1 1 // Oscillator Calibration Value Bit1
#define CAL2 2 // Oscillator Calibration Value Bit2
#define CAL3 3 // Oscillator Calibration Value Bit3
#define CAL4 4 // Oscillator Calibration Value Bit4
#define CAL5 5 // Oscillator Calibration Value Bit5
#define CAL6 6 // Oscillator Calibration Value Bit6
#define CAL7 7 // Oscillator Calibration Value Bit7
/* CLKPR - */
#define CLKPS0 0 //
#define CLKPS1 1 //
#define CLKPS2 2 //
#define CLKPS3 3 //
#define CPKPCE 7 //
/* SMCR - Sleep Mode Control Register */
#define SE 0 // Sleep Enable
#define SM0 1 // Sleep Mode Select bit 0
#define SM1 2 // Sleep Mode Select bit 1
#define SM2 3 // Sleep Mode Select bit 2
/* RAMPZ - RAM Page Z Select Register */
#define RAMPZ0 0 // RAM Page Z Select Register Bit 0
/* EIND - Extended Indirect Register */
#define EIND0 0 // Bit 0
/* GPIOR2 - General Purpose IO Register 2 */
#define GPIOR20 0 // General Purpose IO Register 2 bit 0
#define GPIOR21 1 // General Purpose IO Register 2 bit 1
#define GPIOR22 2 // General Purpose IO Register 2 bit 2
#define GPIOR23 3 // General Purpose IO Register 2 bit 3
#define GPIOR24 4 // General Purpose IO Register 2 bit 4
#define GPIOR25 5 // General Purpose IO Register 2 bit 5
#define GPIOR26 6 // General Purpose IO Register 2 bit 6
#define GPIOR27 7 // General Purpose IO Register 2 bit 7
/* GPIOR1 - General Purpose IO Register 1 */
#define GPIOR10 0 // General Purpose IO Register 1 bit 0
#define GPIOR11 1 // General Purpose IO Register 1 bit 1
#define GPIOR12 2 // General Purpose IO Register 1 bit 2
#define GPIOR13 3 // General Purpose IO Register 1 bit 3
#define GPIOR14 4 // General Purpose IO Register 1 bit 4
#define GPIOR15 5 // General Purpose IO Register 1 bit 5
#define GPIOR16 6 // General Purpose IO Register 1 bit 6
#define GPIOR17 7 // General Purpose IO Register 1 bit 7
/* GPIOR0 - General Purpose IO Register 0 */
#define GPIOR00 0 // General Purpose IO Register 0 bit 0
#define GPIOR01 1 // General Purpose IO Register 0 bit 1
#define GPIOR02 2 // General Purpose IO Register 0 bit 2
#define GPIOR03 3 // General Purpose IO Register 0 bit 3
#define GPIOR04 4 // General Purpose IO Register 0 bit 4
#define GPIOR05 5 // General Purpose IO Register 0 bit 5
#define GPIOR06 6 // General Purpose IO Register 0 bit 6
#define GPIOR07 7 // General Purpose IO Register 0 bit 7
/* PRR1 - Power Reduction Register1 */
#define PRUSART1 0 // Power Reduction USART1
#define PRUSART2 1 // Power Reduction USART2
#define PRUSART3 2 // Power Reduction USART3
#define PRTIM3 3 // Power Reduction Timer/Counter3
#define PRTIM4 4 // Power Reduction Timer/Counter4
#define PRTIM5 5 // Power Reduction Timer/Counter5
/* PRR0 - Power Reduction Register0 */
#define PRADC 0 // Power Reduction ADC
#define PRUSART0 1 // Power Reduction USART
#define PRSPI 2 // Power Reduction Serial Peripheral Interface
#define PRTIM1 3 // Power Reduction Timer/Counter1
#define PRTIM0 5 // Power Reduction Timer/Counter0
#define PRTIM2 6 // Power Reduction Timer/Counter2
#define PRTWI 7 // Power Reduction TWI
/* ***** TWI ************************** */
/* TWAMR - TWI (Slave) Address Mask Register */
#define TWAM0 1 //
#define TWAMR0 TWAM0 // For compatibility
#define TWAM1 2 //
#define TWAMR1 TWAM1 // For compatibility
#define TWAM2 3 //
#define TWAMR2 TWAM2 // For compatibility
#define TWAM3 4 //
#define TWAMR3 TWAM3 // For compatibility
#define TWAM4 5 //
#define TWAMR4 TWAM4 // For compatibility
#define TWAM5 6 //
#define TWAMR5 TWAM5 // For compatibility
#define TWAM6 7 //
#define TWAMR6 TWAM6 // For compatibility
/* TWBR - TWI Bit Rate register */
#define TWBR0 0 //
#define TWBR1 1 //
#define TWBR2 2 //
#define TWBR3 3 //
#define TWBR4 4 //
#define TWBR5 5 //
#define TWBR6 6 //
#define TWBR7 7 //
/* TWCR - TWI Control Register */
#define TWIE 0 // TWI Interrupt Enable
#define TWEN 2 // TWI Enable Bit
#define TWWC 3 // TWI Write Collition Flag
#define TWSTO 4 // TWI Stop Condition Bit
#define TWSTA 5 // TWI Start Condition Bit
#define TWEA 6 // TWI Enable Acknowledge Bit
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