//                 0          1          1          0          0          1          1          1       = 0x67 = 103 = 4800baud
  //

  //set high part of bitrate code (clear bit 7 to address UBRRH)
  //UBRRH = (uiBitRatCod>>8)&0x7F;
  //set low part of bitrate code
  //UBRRL = uiBitRatCod;

  //enable receiver
  //SFRX ( UCSRB  , RXEN_H ) ;

  //enable transmitter
  //SFRX ( UCSRB  , TXEN_H ) ;

}
//================================================================================
//	INIT TIMER COUNTER 0
//================================================================================
void vInitTimerCounter0(void){
  //+-----------+
  //| TCCR0     |
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  SFRX ( TCCR0  ,                                                        CS02_H   | CS01_L   | CS00_L   ) ;
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  //                                                                        n          n          n       : 000 No clock source (Timer/Counter stopped).
  //                                                                        n          n          n       : 001 clkI/O/(No prescaling)
  //                                                                        n          n          n       : 010 clkI/O/8 (From prescaler)
  //                                                                        n          n          n       : 011 clkI/O/64 (From prescaler)
  //                                                                        1          0          0       : 100 clkI/O/256 (From prescaler)
  //                                                                        n          n          n       : 101 clkI/O/1024 (From prescaler)
  //                                                                        n          n          n       : 110 External clock source on T0 pin. Clock on falling edge.
  //                                                                        n          n          n       : 111 External clock source on T0 pin. Clock on rising edge.
  //
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  //SFRX ( TIFR   ,                                                                              TOV0_X   ) ;
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  //                                                                                              n       : Timer0 overflow (0xFF->0x00) flag
  //
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  SFRX ( TIMSK  ,                                                                              TOIE0_L	) ;
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  //                                                                                              n       : Timer0 overflow (0xFF->0x00) interrupt enable
  //0xC8 = 200 
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  SFRW ( TCNT0  , 0xC8                                                                                  ) ;
  //+-----------+----------+----------+----------+----------+----------+----------+----------+----------+
  //                                                                                              n       : Timer0 counter value (r/w)
  //
}
//================================================================================
//	MAIN
//================================================================================
int main(void){

	//init all ports
	vInitAllPorts();

	//init engines (using mode 8)
	vInitEnginesUsingMode8();

	//switch front led off
	SET_FRONT_LED_OFF;

	//init USART for remote control
	vInitUsartForRemoteControl();

	//init timer/counter0 (used for sampling bit12 to bit0)
	vInitTimerCounter0();

	//clear received bits count
	gvbRxBitCnt=0;

	//clear all user defined system flags
	gvbSysFlg=0x00;

	//enable data-receive interrupt
	SFRX(UCSRB,RXCIE_H);

	//enable receiver
	SFRX(UCSRB,RXEN_H);

	//keep checking for received code
	while(1){

		//IR code received
		if(CHK_BYTE_BIT_SET(gvbSysFlg,SYSTEM_FLAG_RX_IR_CODE)){
			//clear IR-received flag
			CLR_BYTE_BIT(gvbSysFlg,SYSTEM_FLAG_RX_IR_CODE);
			//analyse low 6 bits of received data
			switch(gvlRxDat&0x3F){
				case REMOTE_KEY_0:
					SET_LEFT_BRAKE_LED_OFF;
					SET_RGHT_BRAKE_LED_OFF;
					SET_LEFT_ENGINE_SPEED(0x00);
					SET_RGHT_ENGINE_SPEED(0x00);
				break;
				case REMOTE_KEY_PRG_UP:
					SET_LEFT_BRAKE_LED_ON;
					SET_RGHT_BRAKE_LED_ON;
					SET_LEFT_ENGINE_SPEED(0x00);
					SET_RGHT_ENGINE_SPEED(0x00);
					SET_LEFT_ENGINE_DIRECTION_TO_FORWARD;
					SET_RGHT_ENGINE_DIRECTION_TO_FORWARD;
					SET_LEFT_ENGINE_SPEED(0xC0);
					SET_RGHT_ENGINE_SPEED(0xC0);
				//exit case
				break;
				case REMOTE_KEY_PRG_DW:
					SET_LEFT_BRAKE_LED_OFF;
					SET_RGHT_BRAKE_LED_OFF;
					SET_LEFT_ENGINE_SPEED(0x00);
					SET_RGHT_ENGINE_SPEED(0x00);
					SET_LEFT_ENGINE_DIRECTION_TO_REVERSE;
					SET_RGHT_ENGINE_DIRECTION_TO_REVERSE;
					SET_LEFT_ENGINE_SPEED(0xC0);
					SET_RGHT_ENGINE_SPEED(0xC0);
				//exit case
				break;
				case REMOTE_KEY_VOL_UP:
					SET_LEFT_BRAKE_LED_ON;
					SET_RGHT_BRAKE_LED_OFF;
					//right engine is driving
					if(OCR1B!=0){
						SET_RGHT_ENGINE_SPEED(0x00);
						vDelay50us(50000);
						vDelay50us(50000);
						vDelay50us(50000);
						SET_RGHT_ENGINE_SPEED(0xC0);
					}
					//right engine has stopped
					else{
						SET_LEFT_ENGINE_SPEED(0x00);
						SET_RGHT_ENGINE_SPEED(0x00);
						SET_LEFT_ENGINE_DIRECTION_TO_FORWARD;
						SET_RGHT_ENGINE_DIRECTION_TO_REVERSE;
						SET_LEFT_ENGINE_SPEED(0xC0);
						SET_RGHT_ENGINE_SPEED(0xC0);
						vDelay50us(50000);
						vDelay50us(50000);
						SET_LEFT_ENGINE_SPEED(0x00);
						SET_RGHT_ENGINE_SPEED(0x00);
					}
				//exit case
				break;
				case REMOTE_KEY_VOL_DW:
					//left engine is driving
					if(OCR1A!=0){
						SET_LEFT_ENGINE_SPEED(0x00);
						vDelay50us(50000);
						vDelay50us(50000);
						vDelay50us(50000);
						SET_LEFT_ENGINE_SPEED(0xC0);
					}
					//left engine has stopped
					else{
						SET_RGHT_BRAKE_LED_ON;
						SET_LEFT_BRAKE_LED_OFF;
						SET_LEFT_ENGINE_SPEED(0x00);
						SET_RGHT_ENGINE_SPEED(0x00);
						SET_LEFT_ENGINE_DIRECTION_TO_REVERSE;
						SET_RGHT_ENGINE_DIRECTION_TO_FORWARD;
						SET_LEFT_ENGINE_SPEED(0xC0);
						SET_RGHT_ENGINE_SPEED(0xC0);
						vDelay50us(50000);
						vDelay50us(50000);
						SET_LEFT_ENGINE_SPEED(0x00);
						SET_RGHT_ENGINE_SPEED(0x00);
					}
				//exit case
				break;
				case REMOTE_KEY_STD_BY:
					SET_LEFT_BRAKE_LED_OFF;
					SET_RGHT_BRAKE_LED_OFF;
					SET_LEFT_ENGINE_SPEED(0x00);
					SET_RGHT_ENGINE_SPEED(0x00);
				//exit case
				break;

			}//switch
			
			//clear received bit count
			gvbRxBitCnt=0;
			
			//re-enable receiver (disabled by first received character)
			SFRX(UCSRB,RXEN_H);
			
		}//if
	
	}

	return 0;
	
}
//--------------------------------------------------------------------------------
//	INTERUPT HANDLER (RECEIVED USART CHARACTER)
//--------------------------------------------------------------------------------
SIGNAL(SIG_UART_RECV){

	//disable receiver (avoiding more interrupts)
	SFRX(UCSRB,RXEN_L);
	
	//reset timer/counter0 (and timer/counter1) prescaler
	SFRX(SFIOR,PSR10_H);
	
	//define timer/counter0 counter value (delay = 0xFF-0xE4 = 0x1B = 27 (times 32us) = 864us)
	SFRW(TCNT0,0xE4);
	
	//clear overflow flag (must be cleared first, else, immediately timer/0 overflow interrupt will occur!!!)
	SFRX(TIFR,TOV0_H);

	//define timer/counter0 value, to get from halfway detected 4800baud stopbit to middle of second RC5 startbit)
	//...sounds complicated, well it is...
	// - timer/counter0 is running at clockspeed of 8MHz/256 = 32us per count.	
	// - timer/counter0 will need 0xFF-0xE4 = 0x1B = 27 clockcycles of 32us = 864us
	// - this 864us is the distance between de 4800baud stopbit-detection and RC5 startbit 2 centre of second half part of bit S2.

	//enable timer/counter0 interrupt
	SFRX(TIMSK,TOIE0_H);
	
	//store stopbit in received character
	gvlRxDat=0x0001;
	
	//count received bits
	gvbRxBitCnt=1;
	
}
//--------------------------------------------------------------------------------
//	INTERUPT HANDLER (TIMER/COUNTER0 OVERFLOW)
//--------------------------------------------------------------------------------
SIGNAL(SIG_OVERFLOW0){

	//re-init timer/counter0 counter value (exact distance between RC5 bits)
	SFRW(TCNT0,0xC9);

	//shift received data one posisiton to the left
	gvlRxDat<<=1;
	
	//when a '1-bit' (low-level!) is received
	if(!(PIND&IR_RXD_H)){
	
		//set bit at bitposition 0
		gvlRxDat|=0x0001;
		
	}
	
	//count received bits
	gvbRxBitCnt++;
	
	//all 14 bits received
	if(gvbRxBitCnt==14){

		//disable any further timer/counter0 interrupt
		SFRX(TIMSK,TOIE0_L);

		//set corresponding character-received user system flag
		SET_BYTE_BIT(gvbSysFlg,SYSTEM_FLAG_RX_IR_CODE);
		
	}
	
}