#include <cdefBF533.h>
#include "ccblkfn.h"
#include <sys\exception.h>			//Interrupt Handling Header

extern void BF533_EZ_KIT_DMA_Config();
extern void BF533_EZ_KIT_PPI_Config();
extern void BF533_EZ_KIT_ISR_Config();

extern int D1, width, height;
extern char* frame_buf;

char frame_flag;

int image_line = 0;

//section("down_sample_image")	char SDRAM_DOWNSAMPLE_OUT[2097152]; 
#define LINE_BUFFER_WIDTH (720*2)
//section("data1")		char PPI_DMA_IN[LINE_BUFFER_WIDTH*4];
#pragma align 32
char PPI_DMA_IN[LINE_BUFFER_WIDTH*4];

int x = 0;


//void Convert_to_cif(PPI_DMA_IN,image_line,y,u,v)
void Convert_to_cif(char *video_in,int line,char *y,char *u,char *v)
{
	int i,j;
	
		
		for(j = 0;j < 4; j++)
		     for(i = 0;i < 352; i++)
		     {
		           y[i + j*352] = video_in[j*1440 +i*4 + 1];
		     
		     }
		 for(j = 0;j < 2; j++)
		     for(i = 0;i < 176 ; i++)
		     {
		           u[i + j*176] = video_in[j*1440*2 +i*8 ];
		     
		     }
		     
	for(j = 0;j < 2; j++)
		     for(i = 0;i < 176; i++)
		     {
		           v[i + j*176] = video_in[j*1440*2 +i*8 +2 ];
		     
		     }
		     
		     
}
/* Defining an ISR */
#pragma interrupt_reentrant  
#pragma interrupt 
section("L1_code") void DMA0_PPI_ISR(void) 
{
	unsigned char *s, *y, *u, *v;
	int y_len = width*height, u_len = y_len / 4;
	
	//disable the interrupt request
	*pDMA0_IRQ_STATUS = 0x1;
	
	if(D1)
	{
		if(x == 1)
		{
			asm("nop;");
		}
		s = PPI_DMA_IN + ((image_line&0x4) >> 1) * LINE_BUFFER_WIDTH;
		y = frame_buf + image_line*width;
		u = frame_buf + y_len + ( (image_line+1) /2) * width /2;
		v = frame_buf + y_len + u_len + ( (image_line+1) /2) * width /2;
		
		convert2d1(s, y, v, u, width, (width)*2, LINE_BUFFER_WIDTH);
	
		image_line += 4;
		
		if (image_line == height) 
			image_line = 1; //odd field completed
		
		if (image_line == height+1) 
		{//whole frame completed
			image_line = 0;
			
			frame_flag = 1;
		}
		x++;
	}
	else
	{
	/*	
		s = PPI_DMA_IN + ((image_line&0x2) >> 1) * LINE_BUFFER_WIDTH;
		y = frame_buf + image_line*width;
		u = frame_buf + y_len + ( image_line/2) * width /2;
		v = frame_buf + y_len + u_len + ( image_line/2) * width /2;
		
		convert2cif(s, y, v, u, width, width, LINE_BUFFER_WIDTH);
	
		image_line += 2;
		
		if (image_line == height) 
		{//odd field completed
			image_line = 0;
			
			frame_flag = 1;
		}
		*/	
		s = PPI_DMA_IN;
		y = frame_buf + image_line*width;
		u = frame_buf + y_len + ( image_line/2) * width /2;
		v = frame_buf + y_len + u_len + ( image_line/2) * width /2;
		
		Convert_to_cif(PPI_DMA_IN,image_line,y,u,v);
		
		image_line += 4;
		
		if(image_line == height)
		{
			image_line = 0;
			frame_flag = 1;
		}

		
	}
}//end DMA0_PPI_ISR



void Init_DMA(void)
{
	//Target address of the DMA
	*pDMA0_START_ADDR = PPI_DMA_IN;	

	//Line_Length 32bit transfers will be executed
	*pDMA0_X_COUNT = 1440;

	//The modifier is set to 4 because of the 32bit transfers
	*pDMA0_X_MODIFY = 0x2;	
														
	//Frame_Length 32bit transfers will be executed
	*pDMA0_Y_COUNT = 2;
	 //*pDMA0_Y_COUNT = 144;
	
	//The modifier is set to 4 because of the 32bit transfers
	*pDMA0_Y_MODIFY = 0x2;	

	//PPI Peripheral is used
	*pDMA0_PERIPHERAL_MAP = 0x0;	
	
	//DMA Config: Enable DMA | Memory write DMA | 16-bit transfer |
	//2-D DMA | Interrupt after completing each raw | 
	//enable assertation of interrupt | autobuffer mode
	*pDMA0_CONFIG = DMAEN | WNR | WDSIZE_16| DMA2D | RESTART | DI_EN | DI_SEL | 0x1000;
	ssync();
		
} //end Init_DMA

void Init_PPI(void) {

	//The PPI is set to receive 625 lines for each frame
	*pPPI_FRAME = 625;	

	//PPI enabled, receive mode, ITU-R 656 active field only, receive field 1 only, 
	//packing enabled, skipping disabled, 8bit data bus, nothing inverted
	*pPPI_CONTROL = PORT_EN | PACK_EN | DLEN_8 | FLD_SEL ;
	ssync();
}//end Init_PPI

/*
videoin_init()
{
	register_handler(ik_ivg8, DMA0_PPI_ISR);			// assign DMA0 PPI ISR to interrupt vector 8
	*pSIC_IMASK = *pSIC_IMASK | 0x00000100; // all interrupts 0=disabled but DMA0 PPI interrupt enabled	
	

	
	//reset adc
	//*pFIO_DIR		|= (1 << 5); //output
	//*pFIO_FLAG_S	|= (1 << 5); //output 0
	//delay(10000);
	//*pFIO_FLAG_C	|= (1 << 5); //output 0
	//delay(10000);
	//*pFIO_FLAG_S	|= (1 << 5); //output 0
	
}

videoin_start()
{
	Init_DMA();			//DMA Setup "PPI->DMA->SDRAM" Its configured in Sotp Mode
	Init_PPI();			//PPI Setup
	
	
//	delay(1000000);
}
*/

void reset_7180_adc()
{
		//reset adc
	*pFIO_DIR		|= (1 << 5); //output
	*pFIO_FLAG_S	|= (1 << 5); //output 0
	delay(10000);
	*pFIO_FLAG_C	|= (1 << 5); //output 0
	delay(10000);
	*pFIO_FLAG_S	|= (1 << 5); //output 0
}
videoin_init()
{
	
	BF533_EZ_KIT_ISR_Config();

}

videoin_start()
{
	BF533_EZ_KIT_DMA_Config();
	frame_flag = 0;
	BF533_EZ_KIT_PPI_Config();
}


videoin_stop()
{
	*pPPI_CONTROL = 0x0;
	*pDMA0_CONFIG = 0x0;
}