#define FIO0DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x04))
#define FIO1DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x24))
#define FIO2DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x44))
#define FIO3DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x64))
#define FIO4DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x84))

#define FIO0DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00))
#define FIO1DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20))
#define FIO2DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40))
#define FIO3DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60))
#define FIO4DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80))

#define FIO0DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02))
#define FIO1DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22))
#define FIO2DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42))
#define FIO3DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62))
#define FIO4DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82))

#define FIO0MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10))
#define FIO1MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30))
#define FIO2MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50))
#define FIO3MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70))
#define FIO4MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90))

#define FIO0MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11))
#define FIO1MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
#define FIO2MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51))
#define FIO3MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71))
#define FIO4MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91))

#define FIO0MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12))
#define FIO1MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32))
#define FIO2MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52))
#define FIO3MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72))
#define FIO4MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92))

#define FIO0MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13))
#define FIO1MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33))
#define FIO2MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53))
#define FIO3MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73))
#define FIO4MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93))

#define FIO0MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10))
#define FIO1MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30))
#define FIO2MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50))
#define FIO3MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70))
#define FIO4MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90))

#define FIO0MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12))
#define FIO1MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32))
#define FIO2MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52))
#define FIO3MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72))
#define FIO4MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92))

#define FIO0PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14))
#define FIO1PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34))
#define FIO2PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54))
#define FIO3PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74))
#define FIO4PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94))

#define FIO0PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15))
#define FIO1PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25))
#define FIO2PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55))
#define FIO3PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75))
#define FIO4PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95))

#define FIO0PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16))
#define FIO1PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36))
#define FIO2PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56))
#define FIO3PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76))
#define FIO4PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96))

#define FIO0PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17))
#define FIO1PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37))
#define FIO2PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57))
#define FIO3PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77))
#define FIO4PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97))

#define FIO0PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14))
#define FIO1PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34))
#define FIO2PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54))
#define FIO3PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74))
#define FIO4PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94))

#define FIO0PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16))
#define FIO1PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36))
#define FIO2PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56))
#define FIO3PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76))
#define FIO4PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96))

#define FIO0SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18))
#define FIO1SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38))
#define FIO2SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58))
#define FIO3SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78))
#define FIO4SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98))

#define FIO0SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19))
#define FIO1SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29))
#define FIO2SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59))
#define FIO3SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79))
#define FIO4SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99))

#define FIO0SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A))
#define FIO1SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A))
#define FIO2SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A))
#define FIO3SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A))
#define FIO4SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A))

#define FIO0SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B))
#define FIO1SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B))
#define FIO2SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B))
#define FIO3SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B))
#define FIO4SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B))

#define FIO0SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18))
#define FIO1SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38))
#define FIO2SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58))
#define FIO3SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78))
#define FIO4SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98))

#define FIO0SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A))
#define FIO1SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A))
#define FIO2SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A))
#define FIO3SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A))
#define FIO4SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A))

#define FIO0CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C))
#define FIO1CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C))
#define FIO2CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C))
#define FIO3CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C))
#define FIO4CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C))

#define FIO0CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D))
#define FIO1CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D))
#define FIO2CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D))
#define FIO3CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D))
#define FIO4CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D))

#define FIO0CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E))
#define FIO1CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E))
#define FIO2CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E))
#define FIO3CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E))
#define FIO4CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E))

#define FIO0CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F))
#define FIO1CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F))
#define FIO2CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F))
#define FIO3CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F))
#define FIO4CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F))

#define FIO0CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C))
#define FIO1CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C))
#define FIO2CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C))
#define FIO3CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C))
#define FIO4CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C))

#define FIO0CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E))
#define FIO1CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E))
#define FIO2CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E))
#define FIO3CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E))
#define FIO4CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E))


/* System Control Block(SCB) modules include Memory Accelerator Module,
Phase Locked Loop, VPB divider, Power Control, External Interrupt,
Reset, and Code Security/Debugging */
#define SCB_BASE_ADDR	0xE01FC000

/* Memory Accelerator Module (MAM) */
#define MAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
#define MAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
#define MEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))

/* Phase Locked Loop (PLL) */
#define PLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
#define PLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
#define PLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
#define PLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))

/* Power Control */
#define PCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
#define PCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))

/* Clock Divider */
// #define APBDIV         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x100))
#define CCLKCFG        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x104))
#define USBCLKCFG      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x108))
#define CLKSRCSEL      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x10C))
#define PCLKSEL0       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A8))
#define PCLKSEL1       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1AC))
	
/* External Interrupts */
#define EXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
#define INTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
#define EXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
#define EXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))

/* Reset, reset source identification */
#define RSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))

/* RSID, code security protection */
#define CSPR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184))