1              		.code	16   2              		.file	"system.c"  10              	.Ltext0:  11              		.global	p_pSys  12              		.data  13              		.align	2  16              	p_pSys:  17 0000 00F0FFFF 		.word	-4096  18              		.global	p_pAic  19              		.align	2  22              	p_pAic:  23 0004 00F0FFFF 		.word	-4096  24              		.global	p_pMC  25              		.align	2  28              	p_pMC:  29 0008 00FFFFFF 		.word	-256  30              		.global	p_pPDC  31              		.align	2  34              	p_pPDC:  35 000c 0001FCFF 		.word	-261888  36              		.global	p_pUSART  37              		.align	2  40              	p_pUSART:  41 0010 0000FCFF 		.word	-262144  42              		.global	p_pPMC  43              		.align	2  46              	p_pPMC:  47 0014 00FCFFFF 		.word	-1024  48              		.global	p_pPioB  49              		.align	2  52              	p_pPioB:  53 0018 00F6FFFF 		.word	-2560  54              		.global	p_pPioA  55              		.align	2  58              	p_pPioA:  59 001c 00F4FFFF 		.word	-3072  60              		.global	pPMC  61              		.align	2  64              	pPMC:  65 0020 00FCFFFF 		.word	-1024  66              		.text  67              		.align	2  68              		.global	Delay_s  69              		.code 16  70              		.thumb_func  72              	Delay_s:  73              	.LFB2:  74              		.file 1 "system.c"   1:system.c      **** //#include "system.h"
   2:system.c      **** #include "include/include.h"
   3:system.c      **** 
   4:system.c      **** 
   5:system.c      **** AT91PS_PMC pPMC   = AT91C_BASE_PMC;
   6:system.c      **** 
   7:system.c      **** void Delay_s (unsigned long a) { while (--a!=0); }
  75              		.loc 1 7 0  76              	.LVL0:  77              		@ lr needed for prologue  78              		.loc 1 7 0  79 0000 0023     		mov	r3, #0  80              	.L3:  81 0002 0133     		add	r3, r3, #1  82 0004 8342     		cmp	r3, r0  83 0006 FCD1     		bne	.L3  84              		@ sp needed for prologue  85 0008 7047     		bx	lr  86              	.LFE2:  88 000a 0000     		.align	2  89              		.global	InitFrec  90              		.code 16  91              		.thumb_func  93              	InitFrec:  94              	.LFB3:   8:system.c      **** 
   9:system.c      **** //MAIN POINTER
  10:system.c      **** AT91PS_PIO    p_pPioA  = AT91C_BASE_PIOA;
  11:system.c      **** AT91PS_PIO    p_pPioB  = AT91C_BASE_PIOB;
  12:system.c      **** AT91PS_PMC    p_pPMC   = AT91C_BASE_PMC;
  13:system.c      **** AT91PS_USART  p_pUSART = AT91C_BASE_US0;
  14:system.c      **** AT91PS_PDC    p_pPDC   = AT91C_BASE_PDC_US0;
  15:system.c      **** AT91PS_MC     p_pMC    = AT91C_BASE_MC;
  16:system.c      **** AT91PS_AIC    p_pAic   = AT91C_BASE_AIC;
  17:system.c      **** AT91PS_SYS    p_pSys   = AT91C_BASE_SYS;
  18:system.c      **** 
  19:system.c      **** void InitFrec(void)
  20:system.c      **** {
  95              		.loc 1 20 0  96              	.LVL1:  21:system.c      **** 
  22:system.c      ****   // Set Flash Waite sate - Flash Memory Controler
  23:system.c      ****   // if MCK = 47923200 I have 50 Cycle for 1 usecond
  24:system.c      ****   AT91C_BASE_MC->MC_FMR = ((AT91C_MC_FMCN)&(48 <<16)) | AT91C_MC_FWS_1FWS ;
  97              		.loc 1 24 0  98 000c 114A     		ldr	r2, .L29  99 000e 124B     		ldr	r3, .L29+4 100 0010 1A66     		str	r2, [r3, #96]  25:system.c      **** 
  26:system.c      ****   // Watchdog Disable
  27:system.c      ****   AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
 101              		.loc 1 27 0 102 0012 8023     		mov	r3, #128 103 0014 114A     		ldr	r2, .L29+8 104 0016 1B02     		lsl	r3, r3, #8 105 0018 5360     		str	r3, [r2, #4]  28:system.c      **** 
  29:system.c      ****   // Set MCK at 47 923 200
  30:system.c      ****   // 1 Enabling the Main Oscillator:
  31:system.c      ****   // SCK = 1/32768 = 30.51 uSecond
  32:system.c      ****   // Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
  33:system.c      ****   pPMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x06 <<8) | AT91C_CKGR_MOSCEN ));
 106              		.loc 1 33 0 107 001a 114B     		ldr	r3, .L29+12 108 001c 1968     		ldr	r1, [r3] 109 001e 114B     		ldr	r3, .L29+16 110 0020 0B62     		str	r3, [r1, #32] 111              		.loc 1 20 0 112              		@ lr needed for prologue 113              	.L9:  34:system.c      **** 
  35:system.c      ****   // Wait the startup time
  36:system.c      ****   while(!(pPMC->PMC_SR & AT91C_PMC_MOSCS));
 114              		.loc 1 36 0 115 0022 8B6E     		ldr	r3, [r1, #104] 116 0024 DA07     		lsl	r2, r3, #31 117 0026 FCD5     		bpl	.L9  37:system.c      **** 
  38:system.c      ****   // 2 Checking the Main Oscillator Frequency (Optional)
  39:system.c      ****   // 3 Setting PLL and divider:
  40:system.c      ****   // - div by 5 Fin = 3,6864 =(18,432 / 5)
  41:system.c      ****   // - Mul 25+1: Fout =	95,8464 =(3,6864 *26)
  42:system.c      ****   // for 96 MHz the erroe is 0.16%
  43:system.c      ****   // Field out NOT USED = 0
  44:system.c      ****   // PLLCOUNT pll startup time estimate at : 0.844 ms
  45:system.c      ****   // PLLCOUNT 28 = 0.000844 /(1/32768)
  46:system.c      ****   pPMC->PMC_PLLR = ((AT91C_CKGR_DIV & 0x05) | (AT91C_CKGR_PLLCOUNT & (28<<8)) | (AT91C_CKGR_MUL & ( 118              		.loc 1 46 0 119 0028 0F4B     		ldr	r3, .L29+20 120 002a CB62     		str	r3, [r1, #44] 121              	.L11:  47:system.c      **** 
  48:system.c      ****   // Wait the startup time
  49:system.c      ****   while(!(pPMC->PMC_SR & AT91C_PMC_LOCK));
 122              		.loc 1 49 0 123 002c 8B6E     		ldr	r3, [r1, #104] 124 002e 5A07     		lsl	r2, r3, #29 125 0030 FCD5     		bpl	.L11 126              	.L19:  50:system.c      ****   while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
 127              		.loc 1 50 0 128 0032 8B6E     		ldr	r3, [r1, #104] 129 0034 1A07     		lsl	r2, r3, #28 130 0036 FCD5     		bpl	.L19  51:system.c      **** 
  52:system.c      ****   // 4. Selection of Master Clock and Processor Clock
  53:system.c      ****   // select the PLL clock divided by 2
  54:system.c      ****   pPMC->PMC_MCKR =  AT91C_PMC_PRES_CLK_2 ;
 131              		.loc 1 54 0 132 0038 0423     		mov	r3, #4 133 003a 0B63     		str	r3, [r1, #48] 134              	.L14:  55:system.c      ****   while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
 135              		.loc 1 55 0 136 003c 8B6E     		ldr	r3, [r1, #104] 137 003e 1A07     		lsl	r2, r3, #28 138 0040 FCD5     		bpl	.L14  56:system.c      **** 
  57:system.c      ****   pPMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK  ;
 139              		.loc 1 57 0 140 0042 0B6B     		ldr	r3, [r1, #48] 141 0044 0322     		mov	r2, #3 142 0046 1343     		orr	r3, r3, r2 143 0048 0B63     		str	r3, [r1, #48] 144              	.L16:  58:system.c      ****   while(!(pPMC->PMC_SR & AT91C_PMC_MCKRDY));
 145              		.loc 1 58 0 146 004a 8B6E     		ldr	r3, [r1, #104] 147 004c 1A07     		lsl	r2, r3, #28 148 004e FCD5     		bpl	.L16  59:system.c      **** 
  60:system.c      **** }
 149              		.loc 1 60 0 150              		@ sp needed for prologue 151 0050 7047     		bx	lr 152              	.L30: 153 0052 0000     		.align	2 154              	.L29: 155 0054 00013000 		.word	3145984 156 0058 00FFFFFF 		.word	-256 157 005c 40FDFFFF 		.word	-704 158 0060 00000000 		.word	pPMC 159 0064 01060000 		.word	1537 160 0068 051C1900 		.word	1645573 161              	.LFE3: 163              		.align	2 164              		.global	InitPeriphery 165              		.code 16