#ifndef __eppcreg_h__
#define __eppcreg_h__

/*
 *	Default register block (all registers typically requested by debugger)
 */
 
typedef ui32	DefaultType;
typedef ui32	Extended1Type;
typedef ui64	FloatType;



typedef struct Default_PPC
{
	DefaultType	GPR[32];
	DefaultType	PC;
	DefaultType	LR;
	DefaultType	CR;
	DefaultType	CTR;
	DefaultType	XER;
} Default_PPC;

#define DS_DEFAULT_MIN_REGISTER		0
#define DS_DEFAULT_MAX_REGISTER		(sizeof( Default_PPC ) / sizeof( DefaultType ) - 1)



typedef struct Float_PPC
{
	FloatType FPR[32];
	FloatType FPSCR;
	FloatType FPECR;				/* only supported on some processors */
} Float_PPC;

#define DS_FLOAT_MIN_REGISTER		0
#define DS_FLOAT_MAX_REGISTER		(sizeof( Float_PPC ) / sizeof( FloatType ) - 1)



/*
 * Info stored in NotifyStopped message.
 */

typedef DefaultType		PCType;
typedef	ui32			InstructionType;
typedef ui16			ExceptionCauseType;

typedef struct StopInfo_PPC
{
	PCType	PC;
	InstructionType	PCInstruction;		/* instruction at PC */
	ExceptionCauseType	exceptionID;	/* same as vector #, e.g. 0x0200 */
} StopInfo_PPC;



/*
 * Info stored in NotifyException message.
 */
 
typedef StopInfo_PPC ExceptionInfo_PPC;



//	Special purpose register numbers

#define SPR_XER			1
#define SPR_LR			8
#define SPR_CTR			9
#define SPR_DSISR		18
#define SPR_DAR			19
#define SPR_DEC			22
#define SPR_SRR0		26
#define SPR_SRR1		27


#define SPR_PVR			287

#define SPR_IBAT0U		528
#define SPR_IBAT0L		529
#define SPR_IBAT1U		530
#define SPR_IBAT1L		531
#define SPR_IBAT2U		532
#define SPR_IBAT2L		533
#define SPR_IBAT3U		534
#define SPR_IBAT3L		535

#define SPR_DBAT0U		536
#define SPR_DBAT0L		537
#define SPR_DBAT1U		538
#define SPR_DBAT1L		539
#define SPR_DBAT2U		540
#define SPR_DBAT2L		541
#define SPR_DBAT3U		542
#define SPR_DBAT3L		543

#define SPR_DMISS		976
#define SPR_DCMP		977
#define	SPR_HASH1		978
#define SPR_HASH2		979
#define SPR_IMISS		980
#define SPR_ICMP		981
#define SPR_RPA			982

#define SPR_SDR1		25
#define SPR_DAR			19
#define SPR_DSISR		18
#define SPR_SPRG0		272
#define SPR_SPRG1		273
#define SPR_SPRG2		274
#define SPR_SPRG3		275

#define TBR_TBL_READ	268
#define TBR_TBU_READ	269
#define TBR_TBL_WRITE	284
#define TBR_TBU_WRITE	285

#define SPR_IABR		1010
#define SPR_DABR		1013
#define	SPR_EAR			282

#define SPR_HID0		1008
#define SPR_HID1		1009

#define SPR_L2CR		1017

#define SPR_PMC1		953
#define SPR_PMC2		954
#define SPR_PMC3		957
#define SPR_PMC4		958

#define SPR_SIA			955

#define SPR_MMCR0		952
#define SPR_MMCR1		956

#define SPR_THRM1		1020
#define SPR_THRM2		1021
#define SPR_THRM3		1022

#define SPR_ICTC		1019

#endif	// #ifndef __eppcreg_h__