_$%tint_mask.4$Set$Clr$SFR_bit  int_mask, 4 ;  /* hsi0 external interrupt */
  $$end$
$$end$
  $$if$ int_mask1.6 && int_mask1.2
  _OrSFR  int_mask1, #(HSI_FIFO_FULL_INT+HSI_FIFO_4_INT)
  $$end$
  $$ifn$ int_mask1.6 &! int_mask1.2
  _AndSFR int_mask1, #not(HSI_FIFO_FULL_INT+HSI_FIFO_4_INT)
  $$end$
  $$if$ int_mask1.6 ^^ int_mask1.2
  _$%tint_mask1.2$Set$Clr$SFR_bit  int_mask1, 2 ;  /* hsi 4th fifo entry */
  _$%tint_mask1.6$Set$Clr$SFR_bit  int_mask1, 6 ;  /* hsi fifo full */
  $$end$
  ret

cseg at 2080h
main_hsi$$HSI_NUMBER$:
  call init_hsi$$HSI_NUMBER$
  br   $
end  
##80C194 HSO0_INIT#
##80C198 HSO0_INIT#
##80C194 HSO1_INIT#
##80C198 HSO1_INIT#
##80C194 HSO2_INIT#
##80C198 HSO2_INIT#
##80C194 HSO3_INIT#
##80C198 HSO3_INIT#
##80C194 HSO4_INIT#
##80C198 HSO4_INIT#
##80C194 HSO5_INIT#
##80C198 HSO5_INIT#
##80C196KB HSO0_INIT#
##80C196KC HSO0_INIT#
##80C196KD HSO0_INIT#
##80C196KB HSO1_INIT#
##80C196KC HSO1_INIT#
##80C196KD HSO1_INIT#
##80C196KB HSO2_INIT#
##80C196KC HSO2_INIT#
##80C196KD HSO2_INIT#
##80C196KB HSO3_INIT#
##80C196KC HSO3_INIT#
##80C196KD HSO3_INIT#
##80C196KB HSO4_INIT#
##80C196KC HSO4_INIT#
##80C196KD HSO4_INIT#
##80C196KB HSO5_INIT#
##80C196KC HSO5_INIT#
##80C196KD HSO5_INIT#
$include (80c196kd.inc)

$$if$ (HSO_NUMBER == 4)
  HSO4_PIN_ENABLE   equ   4
$$end$
$$if$ (HSO_NUMBER == 5)
  HSO5_PIN_ENABLE   equ   6
$$end$
  CAM_LOCK          equ   6
  CLEAR_CAM         equ   7
  HSO_INT           equ   5
  SW_TIMER_INT      equ   3

; HSO $$HSO_NUMBER$ module initialization:
$$if$ (HSO_NUMBER == 4)
;   HSO4 output  = $%tioc1.4$enabled$disabled$
$$end$
$$if$ (HSO_NUMBER == 5)
;   HSO5 output  = $%tioc1.6$enabled$disabled$
$$end$
;   cam locking  = $%tioc2.6$enabled$disabled$
;   clear cam    = $%tioc2.7$yes$no$

cseg
init_hso$$HSO_NUMBER$:
$$if$ (HSO_NUMBER == 4) || (HSO_NUMBER == 5)
  _$%tioc1.4$Set$Clr$SFR_bit ioc1, HSO$$HSO_NUMBER$_PIN_ENABLE
$$end$
  _$%tioc2.6$Set$Clr$SFR_bit ioc2, CAM_LOCK
  _$%tioc2.7$Set$Clr$SFR_bit ioc2, CLEAR_CAM

; Interrupts:
;   HSO interrupt      = $%tint_mask.3$enabled$disabled$
;   software timer int = $%tint_mask.5$enabled$disabled$

  _$%tint_mask.3$Set$Clr$SFR_bit int_mask, HSO_INT
  _$%tint_mask.5$Set$Clr$SFR_bit int_mask, SW_TIMER_INT
  ret

cseg at 2080h
main_hso$$HSO_NUMBER$:
  call init_hso$$HSO_NUMBER$
  br   $
end
##80C198 HSO0_CAM#
##80C194 HSO0_CAM#
##80C198 HSO1_CAM#
##80C194 HSO1_CAM#
##80C198 HSO2_CAM#
##80C194 HSO2_CAM#
##80C198 HSO3_CAM#
##80C194 HSO3_CAM#
##80C198 HSO4_CAM#
##80C194 HSO4_CAM#
##80C198 HSO5_CAM#
##80C194 HSO5_CAM#
##80C196KB HSO0_CAM#
##80C196KC HSO0_CAM#
##80C196KD HSO0_CAM#
##80C196KB HSO1_CAM#
##80C196KC HSO1_CAM#
##80C196KD HSO1_CAM#
##80C196KB HSO2_CAM#
##80C196KC HSO2_CAM#
##80C196KD HSO2_CAM#
##80C196KB HSO3_CAM#
##80C196KC HSO3_CAM#
##80C196KD HSO3_CAM#
##80C196KB HSO4_CAM#
##80C196KC HSO4_CAM#
##80C196KD HSO4_CAM#
##80C196KB HSO5_CAM#
##80C196KC HSO5_CAM#
##80C196KD HSO5_CAM#
$include (80c196kd.inc)

; HSO $$HSO_NUMBER$ module configuration:
$$ifn$ hso_command.3 && hso_command.5
;   HSO event       = $%8hso_command.0-2$set hso0 pin$set hso1 pin$set hso2 pin $set hso3 pin$set hso4 pin$set hso5 pin$set pins hso0 and hso1$set pins hso2 and hso3$
$$end$
$$ifn$ hso_command.3 &! hso_command.5
;   HSO event       = $%8hso_command.0-2$clear hso0 pin$clear hso1 pin$clear hso2 pin$clear hso3 pin$clear hso4 pin$clear hso5 pin$clear pins hso0 and hso1$clear pins hso2 and hso3$
$$end$
$$if$ hso_command.3
;   HSO event       = $%8hso_command.0-2$program software timer 0$ program software timer 1$program software timer 2$program software timer 3$set pins hso0-5$$reset timer 2$start an A/D conversion$
$$end$
;   event interrupt = $%thso_command.4$enabled$disabled$
;   reference timer = $%thso_command.6$timer 2$timer 1$
;   locked event    = $%thso_command.7$yes$no$
$$if$ (RELATIVE == 1)
;   execution time  = $%thso_command.6$timer 2$timer 1$  + $$hso_time$h
$$end$
$$if$ (RELATIVE == 0)
;   execution time  = $$hso_time$h
$$end$

cseg
init_hso$$HSO_NUMBER$_cam:
  _WriteSFR   hso_command, #0$$HSO_COMMAND$h
$$if$ (RELATIVE == 1)
  add hso_time, $%thso_command.6$timer2$timer1$, #0$$HSO_TIME$h
$$end$
$$if$ (RELATIVE == 0)
  _WriteSFR   hso_time, #0$$hso_time$h
$$end$   
  ret

cseg at 2080h
main_hso$$HSO_NUMBER$_cam:
  call init_hso$$HSO_NUMBER$_cam
  br   $
end
##80C198 BIU#
##80C194 BIU#
##80C198 BIU#
##80C194 BIU#
##80C198 PM#
##80C194 PM#
##80C198 CODE#
##80C194 CODE#
##80C196KB BIU#
##80C196KD BIU#
##80C196KC BIU#
##80C196KB PM#
##80C196KD PM#
##80C196KC PM#
##80C196KB CODE#
##80C196KD CODE#
##80C196KC CODE#
$include (80c196kd.inc)

; Chip configuration:
;   number of wait states  = $%4ccr.4-5$1$2$3$ready pin controlled$
$$ifp$ 80C198 || 80C194
;   bus control mode       = $%tccr.3$address valid strobe$standard bus control$
$$end$
$$ifp$ 80C196KB || 80C196KC || 80C196KD
;   bus control mode       = $%4ccr.2-3$Address valid with write strobe$Address valid strobe$Write strobe$Standard bus control$
$$end$
;   programming protection = $%4ccr.6-7$read and write$read only$write only$none$
;   power-down mode        = $%tccr.0$enabled$disabled$
$$ifp$ 80C196KB || 80C196KC || 80C196KD
;   buswidth control       = $%tccr.1$dynamic mode$8-bit$
;   hold/holda protocol    = $%twsr.7$enabled$disabled$
$$end$

cseg at 2018h
dcw 20$$ccr$h

cseg
init_hold_enable:
  $%twsr.7$orb$andb$ wsr, #$%twsr.7$80$7f$h
  ret

cseg at 2080h
main_hold_enable:
  call init_hold_enable
$$if$ ccr.0
  ;   The following will put the processor in power down mode 
  idlpd  #2
$$end$  
  br   $
end
##80C194 ICU#
##80C198 ICU#
##80C196KB ICU#
##80C196KC ICU#
##80C196KD ICU#
$include (80c196kd.inc)

; Initialize Interrupt Vectors.  

cseg  at 2000h
   dcw $%tint_mask.0$tovf_isr$error_isr$
$$ifp$ 80C194
   dcw error_isr          ;this vector is reserved 
$$end$
$$ifp$ 80C198 || 80C196KB || 80C196KC || 80C196KD
        dcw $%tint_mask.1$ad_isr$error_isr$
$$end$
   dcw $%tint_mask.2$hsi_data_avail_isr$error_isr$
   dcw $%tint_mask.3$hso_isr$error_isr$
   dcw $%tint_mask.4$hsi0_isr$error_isr$
   dcw $%tint_mask.5$sw_timer_isr$error_isr$
   dcw $%tint_mask.6$serial_isr$error_isr$
   dcw $%tint_mask.7$extint_isr$error_isr$
   dcw trap_isr
   dcw unimplemented_isr
   
cseg    at 2030h
   dcw $%tint_mask1.0$txd_isr$error_isr$
   dcw $%tint_mask1.1$rxd_isr$error_isr$
   dcw $%tint_mask1.2$hsi_fifo4_isr$error_isr$
$$ifp$ 80C194 || 80C198
   dcw error_isr                ;this vector is reserved
$$end$
$$ifp$ 80C196KB || 80C196KC || 80C196KD
        dcw $%tint_mask1.3$timer2_capt_isr$error_isr$
$$end$
   dcw $%tint_mask1.4$t2ovf_isr$error_isr$
   dcw $%tint_mask1.5$extint1_isr$error_isr$
   dcw $%tint_mask1.6$hsi_fifo_full_isr$error_isr$
   dcw nonmaskable_isr

; Timer overflow interrupt          = $%tint_mask.0$enabled$disabled$
$$ifp$ 80C198 || 80C196KB || 80C196KC || 80C196KD
; A/D conversion complete interrupt = $%tint_mask.1$enabled$disabled$
$$end$
; HSI data available interrupt      = $%tint_mask.2$enabled$disabled$
; HSO interrupt                     = $%tint_mask.3$enabled$disabled$
; HSI.0 pin interrupt               = $%tint_mask.4$enabled$disabled$
; Timer interrupt                   = $%tint_mask.5$enabled$disabled$
; Serial port interrupt             = $%tint_mask.6$enabled$disabled$
; External interrupt                = $%tint_mask.7$enabled$disabled$
; Transmit interrupt                = $%tint_mask1.0$enabled$disabled$
; Receive interrupt                 = $%tint_mask1.1$enabled$disabled$
; HSI fifo 4 interrupt              = $%tint_mask1.2$enabled$disabled$
$$ifp$ 80C196KB || 80C196KC || 80C196KD
; Timer 2 capture interrupt         = $%tint_mask1.3$enabled$disabled$
$$end$
; Timer 2 overflow interrupt        = $%tint_mask1.4$enabled$disabled$
; External Interrupt 1              = $%tint_mask1.5$enabled$disabled$
; HSI fifo full interrupt           = $%tint_mask1.6$enabled$disabled$

cseg
init_interrupts:
  orb int_mask, #0$$int_mask$h
  orb int_mask1, #0$$int_mask1$h

; $%tpsw.1$Enabled$Disabled$ global interrupt bit.

  $%tpsw.1$ei$di$
  ret
$$if$ int_mask.0

; The following code is an interrupt service routine
; shell for the timer overflow interrupt.

cseg
  tovf_isr: 
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$ifp$ 80C198 || 80C196KB || 80C196KC || 80C196KD
$$if$ int_mask.1

; The following code is an interrupt service routine
; shell for the A/D conversion complete interrupt.

cseg
  ad_isr:   
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$end$
$$if$ int_mask.2

; The following code is an interrupt service routine
; shell for the HSI data available interrupt.

cseg
  hsi_data_avail_isr:
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask.3

; The following code is an interrupt service routine
; shell for the HSO interrupt.

cseg
  hso_isr:  
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask.4

; The following code is an interrupt service routine
; shell for the HSI.0 pin interrupt.

cseg
  hsi0_isr: 
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask.5

; The following code is an interrupt service routine
; shell for the timer interrupt.

cseg
  sw_timer_isr:   
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask.6

; The following code is an interrupt service routine
; shell for the serial port interrupt.

cseg
  serial_isr:  
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask.7

; The following code is an interrupt service routine
; shell for the external interrupt.

cseg
  extint_isr:  
  pusha

   ;User code goes here

  popa
  ret
$$end$

; The following code is an interrupt service routine
; shell for the trap interrupt.

cseg
  trap_isr:
  pusha

   ;User code goes here

  popa
  ret

; The following code is an interrupt service routine
; shell for the unimplemented opcode interrupt.

cseg
  unimplemented_isr: 
  pusha

   ;User code goes here

  popa
  ret
$$if$ int_mask1.0

; The following code is an interrupt service routine
; shell for the transmit interrupt.

cseg
  txd_isr:
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask1.1

; The following code is an interrupt service routine
; shell for the receive interrupt.

cseg
  rxd_isr:
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask1.2

; The following code is an interrupt service routine
; shell for the HSI fifo 4 interrupt.

cseg
  hsi_fifo4_isr:  
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$ifp$ 80C196KB || 80C196KC || 80C196KD
$$if$ int_mask1.3

; The following code is an interrupt service routine
; shell for the timer 2 capture interrupt.

cseg
  timer2_capt_isr:   
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$end$
$$if$ int_mask1.4

; The following code is an interrupt service routine
; shell for the timer 2 overflow interrupt.

cseg
  t2ovf_isr:   
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask1.5

; The following code is an interrupt service routine
; shell for the external interrupt 1.

cseg
  extint1_isr: 
  pusha

   ;User code goes here

  popa
  ret
$$end$
$$if$ int_mask1.6

; The following code is an interrupt service routine
; shell for the HSI fifo full interrupt.

cseg
  hsi_fifo_full_isr: 
  pusha

   ;User code goes here

  popa
  ret
$$end$

; The following code is an interrupt service routine
; shell for the nonmaskable interrupt.

cseg
  nonmaskable_isr:   
  pusha

   ;User code goes here

  popa
  ret

$$if$ (int_mask < 256) || (int_mask1 < 128)
; The following code is an error interrupt service
; routine shell.

cseg
  error_isr:   
  ret
$$end$

cseg at 2080h
main_interrupts:
  call init_interrupts
  br   $
end
##80C194 ICU_ExtINTR#
##80C198 ICU_ExtINTR#
##80C196KB ICU_ExtINTR#
##80C196KC ICU_ExtINTR#
##80C196KD ICU_ExtINTR#
$include (80c196kd.inc)

EXTINT_SRC   equ   1

; external interrupt source = $%tioc1.1$p0.7$extint pin$