/*
 *  Copyright (c) 1995, Intel Corporation
 *
 *  $Workfile:   296sac.cod  $
 *  $Revision:   1.1  $
 *  $Modtime:   Jan 09 1996 18:21:00  $
 *
 *  Purpose:	   This file contains C-language code for the 296SA.
 *                This file originated from the 196NU code.
 *                All references of 196NU have been replaced by 296SA, and
 *                All references to the 196NP have been deleted.
 *                This was done to give a 'minimal' starting point for this file.
 *
 *  Compiler:       
 *
 *  Ext Packages:   
 *
 * 
 *
 */
##80C296?? WRITE#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
  $$IFSTR$ REG_MNEM "CCR0"
#pragma CCB(0x$%XREG_VALUE & 0xFF$)
  $$END$
  $$IFSTR$ REG_MNEM "CCR1"
#pragma CCB($%cCCR0 & 0xff$$%Tccr0.4-7$$0$$%xREG_VALUE & 0xff$)
  $$END$
  $$IFSTR$ REG_MNEM "ccr2"
#pragma CCB($%cCCR0 & 0xff$$%Tccr0.4-7$$0$$%xCCR1 & 0xff$$%xREG_VALUE & 0xff$)
  $$END$
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
@@REG_MNEM@_$$REG_WSR$ = $%cREG_VALUE$;
  $$END$
  $$IFN$ REG_USEWSR
@@REG_MNEM@ = $%cREG_VALUE$;
  $$END$
$$END$
##80C296?? READ#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
UserVar = @@REG_MNEM@_$$REG_WSR$;
  $$END$
  $$IFN$ REG_USEWSR
UserVar = @@REG_MNEM@;
  $$END$
$$END$
##80C296?? OR#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
@@REG_MNEM@_$$REG_WSR$ |= $%cREG_VALUE$;
  $$END$
  $$IFN$ REG_USEWSR
@@REG_MNEM@ |= $%cREG_VALUE$;
  $$END$
$$END$
##80C296?? AND#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
@@REG_MNEM@_$$REG_WSR$ &= $%cREG_VALUE$;
  $$END$
  $$IFN$ REG_USEWSR
@@REG_MNEM@ &= $%cREG_VALUE$;
  $$END$
$$END$
##80C296?? XOR#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
@@REG_MNEM@_$$REG_WSR$ ^= $%cREG_VALUE$;
  $$END$
  $$IFN$ REG_USEWSR
@@REG_MNEM@ ^= $%cREG_VALUE$;
  $$END$
$$END$
##80C296?? TESTZ#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
if(!(@@REG_MNEM@_$$REG_WSR$ & $%cREG_VALUE$))
  $$END$
  $$IFN$ REG_USEWSR
if(!(@@REG_MNEM@ & $%cREG_VALUE$))
  $$END$
{
  /* User Code */
}
$$END$
##80C296?? TESTNZ#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
wsr = $%cREG_WSR$;
if(@@REG_MNEM@_$$REG_WSR$ & $%cREG_VALUE$)
  $$END$
  $$IFN$ REG_USEWSR
if(@@REG_MNEM@ & $%cREG_VALUE$)
  $$END$
{
  /* User Code */
}
$$END$
##80C296SA PWM0#
##80C296SA PWM1#
##80C296SA PWM2#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>

#define   PWM_PRESCALE0   0
#define   PWM_PRESCALE1   1
#define   PWM_HALT   	  7
$$end$

void init_pwm$$PWM_NUMBER$(void)
{
/*
$$if$ con_reg0.7
*   PWM is HALTED
*
$$end$
* PWM$$PWM_NUMBER$ configuration:
*   prescaler mode  = divide by $%tcon_reg0.0$2$1$
$$if$ (PWM_NUMBER == 0)
*   PWM output      = $%tp4_mode.0$enabled$disabled$
$$end$
$$if$ (PWM_NUMBER == 1)
*   PWM output      = $%tp4_mode.1$enabled$disabled$
$$end$
$$if$ (PWM_NUMBER == 2)
*   PWM output      = $%tp4_mode.2$enabled$disabled$
$$end$
*   PWM duty cycle  = @@PWM_DUTY_CYCLE@ %
*
* pwm$$PWM_NUMBER$_control = 256 * (Duty Cycle) / 100
*/

  $%tcon_reg0.0$set$clr$bit(con_reg0, PWM_PRESCALE0);
  $%tcon_reg0.1$set$clr$bit(con_reg0, PWM_PRESCALE1);
  $%tcon_reg0.7$set$clr$bit(con_reg0, PWM_HALT);
$$if$ (PWM_NUMBER == 0)
  pwm$$PWM_NUMBER$_control = 0x$$PWM0_CONTROL$;
  $$if$  P4_MODE.0
  clrbit(p4_dir, $%3PWM_NUMBER$0$1$2$);
  setbit(p4_mode, $%3PWM_NUMBER$0$1$2$); 
  $$end$
$$end$
$$if$ (PWM_NUMBER == 1)
  pwm$$PWM_NUMBER$_control = 0x$$PWM1_CONTROL$;
  $$if$  P4_MODE.1
  clrbit(p4_dir, $%3PWM_NUMBER$0$1$2$);
  setbit(p4_mode, $%3PWM_NUMBER$0$1$2$); 
  $$end$
$$end$
$$if$ (PWM_NUMBER == 2)
  pwm$$PWM_NUMBER$_control = 0x$$PWM2_CONTROL$;
  $$if$  P4_MODE.2
  clrbit(p4_dir, $%3PWM_NUMBER$0$1$2$);
  setbit(p4_mode, $%3PWM_NUMBER$0$1$2$); 
  $$end$
$$end$
}
void main(void)
{
  init_pwm$$PWM_NUMBER$();
  while(1);
}  
##80C296SA CSU#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

#define   MUXED_BUS      0
#define   DEMUXED_BUS    0x80
#define   BW_8           0
#define   BW_16          0x40
#define   WS_0           0
#define   WS_1           1
#define   WS_2           2
#define   WS_3           3


void Init_ChipSelects()
{
 addrmsk0 = 0;   /*   Init to large range */
                      /*  start address   end address  */
 addrcom0 = 0x$%Xaddrcom0$;   /*  0x@@startaddr0@         0x@@endaddr0@  */  
 addrmsk0 = 0x$%Xaddrmsk0$;
 addrcom1 = 0x$%Xaddrcom1$;   /*  0x@@startaddr1@         0x@@endaddr1@  */  
 addrmsk1 = 0x$%Xaddrmsk1$;
 addrcom2 = 0x$%Xaddrcom2$;   /*  0x@@startaddr2@         0x@@endaddr2@  */  
 addrmsk2 = 0x$%Xaddrmsk2$;
 addrcom3 = 0x$%Xaddrcom3$;   /*  0x@@startaddr3@         0x@@endaddr3@  */  
 addrmsk3 = 0x$%Xaddrmsk3$;
 addrcom4 = 0x$%Xaddrcom4$;   /*  0x@@startaddr4@         0x@@endaddr4@  */  
 addrmsk4 = 0x$%Xaddrmsk4$;
 addrcom5 = 0x$%Xaddrcom5$;   /*  0x@@startaddr4@         0x@@endaddr5@  */  
 addrmsk5 = 0x$%Xaddrmsk5$;

 buscon0 = $%Tbuscon0.7$DE$$MUXED_BUS + BW_$%Tbuscon0.6$16$8$ + WS_$%Xbuscon0 & 3$;
 buscon1 = $%Tbuscon1.7$DE$$MUXED_BUS + BW_$%Tbuscon1.6$16$8$ + WS_$%Xbuscon1 & 3$;
 buscon2 = $%Tbuscon2.7$DE$$MUXED_BUS + BW_$%Tbuscon2.6$16$8$ + WS_$%Xbuscon2 & 3$;
 buscon3 = $%Tbuscon3.7$DE$$MUXED_BUS + BW_$%Tbuscon3.6$16$8$ + WS_$%Xbuscon3 & 3$;
 buscon4 = $%Tbuscon4.7$DE$$MUXED_BUS + BW_$%Tbuscon4.6$16$8$ + WS_$%Xbuscon4 & 3$;
 buscon5 = $%Tbuscon5.7$DE$$MUXED_BUS + BW_$%Tbuscon5.6$16$8$ + WS_$%Xbuscon5 & 3$;

 p3_reg  |= 0x$%Xp3_mode$;   /*  initialize the reg register  */
 p3_dir  &= 0x$%Xp3_mode ^ 0xFF$;   /*  configure I/O   */
 p3_mode |= 0x$%Xp3_mode$;   /*  enable the chip selects */
}
/*  This code must be located in the address range 0ff2080h-0ff20ffh by
    the linker locater.  It must also be called by the startup routine 
    before it leaves the above range.  */
##80C296SA IO_EP#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$

#define   EXT_BUS_A16    0x01
#define   EXT_BUS_A17    0x02
#define   EXT_BUS_A18    0x04
#define   EXT_BUS_A19    0x08

#define   LSIO_0         0x00
#define   LSIO_1         0x00
#define   LSIO_2         0x00
#define   LSIO_3         0x00

#define   IO_INPUT0      0x01
#define   IO_INPUT1      0x02
#define   IO_INPUT2      0x04
#define   IO_INPUT3      0x08
#define   IO_OUTPUT0     0x00
#define   IO_OUTPUT1     0x00
#define   IO_OUTPUT2     0x00
#define   IO_OUTPUT3     0x00

void init_eport(void)
{
 ep_reg = $%cEP_REG$;   /*  initial value in ep_reg  */
 ep_dir = $%TEP_DIR.0$IO_INPUT0$IO_OUTPUT0$ | $%TEP_DIR.1$IO_INPUT1$IO_OUTPUT1$ |
          $%TEP_DIR.2$IO_INPUT2$IO_OUTPUT2$ | $%TEP_DIR.3$IO_INPUT3$IO_OUTPUT3$;
 ep_mode = $%TEP_MODE.0$EXT_BUS_A16$LSIO_0$ | $%TEP_MODE.1$EXT_BUS_A17$LSIO_1$ |
           $%TEP_MODE.2$EXT_BUS_A18$LSIO_2$ | $%TEP_MODE.3$EXT_BUS_A19$LSIO_3$;
           
}
##80C296SA EPA#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$
#define   CAPTURE      0x00
#define   COMPARE      0x40
#define   RE_ENABLE    0x08
#define   POS_EDGE     0x20
#define   SET_PIN      0x20
#define   NEG_EDGE     0x10
#define   CLR_PIN      0x10
#define   BOTH_EDGE    0x30
#define   TOGGLE_PIN   0x30
#define   NOTHING      0x00
#define   RESET_OPP_TIMER          0x02
#define   RESET_TIMER              0x01
#define   OVERWRITE_NEW_DATA       0x01
#define   IGNORE_NEW_DATA          0x00
#define   USE_TIMER1               0x00
#define   USE_TIMER2               0x80
#define   RE_MAP                   0x0100
#define   EPA0_INT_BIT             7
#define   EPA1_INT_BIT             0
#define   EPA2_INT_BIT             1
#define   EPA3_INT_BIT             2
#define   EPA0_1_OVR_INT_BIT       3
#define   EPA2_3_OVR_INT_BIT       4

void init_epa$$EPA_CHANNEL$()
{
 epa$$EPA_CHANNEL$_con = $%TEPA_CON.6$COMPARE$CAPTURE$ |
$$ifn$ EPA_CON.5
     $$if$ EPA_CON.6
                $%TEPA_CON.4$CLR_PIN$NOTHING$ |
     $$end$
     $$ifn$ EPA_CON.6
                $%TEPA_CON.4$NEG_EDGE$NOTHING$ |
     $$end$
$$end$
$$if$ EPA_CON.5
     $$if$ EPA_CON.6
                $%TEPA_CON.4$TOGGLE_PIN$SET_PIN$ |
     $$end$
     $$ifn$ EPA_CON.6
                $%TEPA_CON.4$BOTH_EDGE$POS_EDGE$ |
     $$end$
$$end$
$$if$ EPA_CON.8
                RE_MAP |
$$end$
$$if$ EPA_CON.3
                RE_ENABLE |
$$end$
$$if$ EPA_CON.1
                RESET_OPP_TIMER |
$$end$
$$if$ EPA_CON.0
                $%TEPA_CON.6$RESET_TIMER$IGNORE_NEW_DATA$ |
$$end$
                $%TEPA_CON.7$USE_TIMER2$USE_TIMER1$;
$$if$ EPA_CON.6
     $$if$ RELATIVE
 epa$$EPA_CHANNEL$_time = $%TEPA_CON.7$timer2$timer1$ + $%CTIMER_OFFSET$;
     $$end$
     $$ifn$ RELATIVE
 epa$$EPA_CHANNEL$_time = $%CTIMER_OFFSET$;
     $$end$
$$end$
$$if$ EPA_CON.4-5
 setbit(p1_reg, $$EPA_CHANNEL$);   /*  int reg  */
     $$if$ EPA_CON.6
 clrbit(p1_dir, $$EPA_CHANNEL$);   /*  make output pin  */
     $$end$
     $$ifn$ EPA_CON.6
 setbit(p1_dir, $$EPA_CHANNEL$);   /*  make input pin  */
     $$end$
 setbit(p1_mode, $$EPA_CHANNEL$);   /*  select EPA mode  */
$$end$   /*  end of port setup of epa0  */
$$if$ EPA_INTERRUPT

 setbit($%TEPA_CHANNEL$int_mask1$int_mask$, EPA$$EPA_CHANNEL$_INT_BIT);    /*  un-mask epa interrupt  */
$$end$
$$if$ EPA_OVERFLOW

 setbit(int_mask1, EPA$%TEPA_CHANNEL.1$2_3$0_1$_OVR_INT_BIT);   /*  un-mask epa overflow interrupt  */
$$end$
}

$$ifn$ EPA_OVERFLOW &! EPA_INTERRUPT
void poll_epa$$EPA_CHANNEL$()
{
  $$ifn$ EPA_CON.6
unsigned int time_value;
  $$end$
     $$if$ (EPA_CHANNEL == 0)
 if(checkbit(int_pend, EPA$$EPA_CHANNEL$_INT_BIT))
     $$end$
     $$else$
 if(checkbit(int_pend1, EPA$$EPA_CHANNEL$_INT_BIT))
     $$end$
     {
      /*  User code for event channel $$EPA_CHANNEL$ would go here */
     $$ifn$ EPA_CON.6
     time_value = epa$$EPA_CHANNEL$_time;  /*  time needs to be read to
                                       avoid overrun  */
     $$end$
     $$if$ EPA_CON.6 &! EPA_CON.3
      /*  Since this event was not re-enabled, no more
          events will occur.  */
     $$end$
     $$if$ RELATIVE && EPA_CON.6 && EPA_CON.3
     epa$$EPA_CHANNEL$_time += 0x$$TIMER_OFFSET$;
     $$end$
     $$ifn$ RELATIVE && EPA_CON.6 && EPA_CON.3
      /*  Since this event is absolute and re-enabled,
          no polling is neccessary.   */
     $$end$
     $$if$ (EPA_CHANNEL == 0)
     clrbit(int_pend, EPA$$EPA_CHANNEL$_INT_BIT);
     $$end$
     $$else$
     clrbit(int_pend1, EPA$$EPA_CHANNEL$_INT_BIT);
     $$end$
     }
}
$$end$

void main(void)
{
$$ifn$ EPA_CON.6
 unsigned int time_value;
$$end$

 /*  Should init the timers before using the epa  */
 /*  init_timers();   */
 init_epa$$EPA_CHANNEL$();
$$if$ EPA_INTERRUPT || EPA_OVERFLOW
 enable();     /*  Globally enable interrupts  */
$$end$
$$ifn$ EPA_OVERFLOW &! EPA_INTERRUPT
 /*  EPA events can be serviced by polling int_pend  */
 while(1)
     {
     poll_epa$$EPA_CHANNEL$();
     }
$$end$
$$if$ EPA_INTERRUPT || EPA_OVERFLOW
 while(1);   /*  loop forever waiting for interrupts to occur  */
$$end$
}

$$if$ EPA_INTERRUPT
     $$if$ (EPA_CHANNEL == 0)
#pragma interrupt(epa$$EPA_CHANNEL$_interrupt = 7)
     $$end$
     $$if$ (EPA_CHANNEL > 0)
#pragma interrupt(epa$$EPA_CHANNEL$_interrupt = $%dEPA_CHANNEL + 23$)
     $$end$
void epa$$EPA_CHANNEL$_interrupt()
{
     $$ifn$ EPA_CON.6
 unsigned int time_value;

 time_value = epa$$EPA_CHANNEL$_time;   /* must read to prevent overrun */
     $$end$
     $$if$ EPA_CON.6 &! EPA_CON.3
  /*  Since not re-enabled, no more events will occur unless
      epa_control and epa_time are re-written.  */
     $$end$
     $$if$ RELATIVE && EPA_CON.6 && EPA_CON.3
 epa$$EPA_CHANNEL$_time += $%CTIMER_OFFSET$;
     $$end$
     $$ifn$ RELATIVE && EPA_CON.6 && EPA_CON.3
  /*  Since this event is absolute and re-enabled,
      user code does not need to re-enable.   */
     $$end$
}
$$end$    /*   end of epa0-3 interrupts  */
$$if$ EPA_OVERFLOW
#pragma interrupt(epa_ovr_$$EPA_CHANNEL$_interrupt = $%TEPA_CHANNEL.1$28$27$)
void epa_ovr_$$EPA_CHANNEL$_interrupt()
{
 unsigned int time_value;
 time_value = epa$$EPA_CHANNEL$_time;   /* must read to clear overrun */
/*  User's code to handle overrun   */

}
$$end$
##80C296SA TIMER#
#pragma model(EX)
$$ifp$80c296sa
#include <80c296sa.h>
$$end$
#define  COUNT_ENABLE         0x80
#define  COUNT_DISABLE        0x00
#define  COUNT_UP             0x40
#define  COUNT_DOWN           0x00
#define  CLOCK_INTERNAL       0x00
#define  CLOCK_EXTERNAL       0x08
#define  DIRECTION_TXDIR      0x10
#define  CLOCK_T1_OVFL        0x20
#define  DIRECTION_T1_OVFL    0x10
#define  QUADRATURE_CLOCK     0x38
#define  DIVIDE_BY_1          0x00
#define  DIVIDE_BY_2          0x01
#define  DIVIDE_BY_4          0x02
#define  DIVIDE_BY_8          0x03
#define  DIVIDE_BY_16         0x04
#define  DIVIDE_BY_32         0x05
#define  DIVIDE_BY_64         0x06
$$ifp$80c296sa
#define  DIVIDE_BY_128        0x07
$$end$

void init_timer@@TIMER_NUMBER@()
{
 t@@TIMER_NUMBER@control = $%TTIME_CON.7$COUNT_ENABLE$COUNT_DISABLE$ |
$$ifn$ TIME_CON.4
                    $%TTIME_CON.6$COUNT_UP$COUNT_DOWN$ |
$$end$