/*
 *  Copyright (c) 1995, Intel Corporation
 *
 *  $Workfile:   196kxa.cod  $
 *  $Revision:   1.3  $
 *  $Modtime:   Apr 13 1995 08:06:56  $
 *
 *  Purpose:
 *
 *
 *
 *
 *
 *  Compiler:       
 *
 *  Ext Packages:   
 *
 * 
 *
 */
##80C196?? WRITE#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
  $$IFSTR$ REG_MNEM "CCR0"
$$ifp$ 80C196NT
cseg at 0FF2018h
$$END$
$$ELSE$
cseg at 2018h
$$END$
ccr0:   dcw   0$%XREG_VALUE & 0xFF$h
  $$END$
  $$IFSTR$ REG_MNEM "CCR1"
$$ifp$ 80C196NT
cseg at 0FF2018h
$$END$
$$ELSE$
cseg at 2018h
$$END$
ccr0:   dcw   0$%XCCR0 & 0xFF$h
ccr1:   dcw   0$%XREG_VALUE & 0xFF$h
  $$END$
  $$IFSTR$ REG_MNEM "ccr2"
$$ifp$ 80C196NT
cseg at 0FF2018h
$$END$
$$ELSE$
cseg at 2018h
$$END$
ccr0:   dcw   0$%XCCR0 & 0xFF$h
ccr1:   dcw   0$%XCCR1 & 0xFF$h
ccr2:   dcw   0$%XREG_VALUE & 0xFF$h
  $$END$
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB   wsr, #$%aREG_WSR$
LD@@REG_SIZE@   @@REG_MNEM@_$$REG_WSR$, #$%aREG_VALUE$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, #$%aREG_VALUE$
ST@@REG_SIZE@   UserVar, @@REG_MNEM@
  $$END$
$$END$
##80C196?? READ#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB   wsr, #$%aREG_WSR$
LD@@REG_SIZE@   UserVar, @@REG_MNEM@_$$REG_WSR$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, @@REG_MNEM@
  $$END$
$$END$
##80C196?? OR#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB   wsr, #$%aREG_WSR$
OR@@REG_SIZE@   @@REG_MNEM@_$$REG_WSR$, #$%aREG_VALUE$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, @@REG_MNEM@
OR@@REG_SIZE@   UserVar, #$%aREG_VALUE$
ST@@REG_SIZE@   UserVar, @@REG_MNEM@
  $$END$
$$END$
##80C196?? AND#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB   wsr, #$%aREG_WSR$
AND@@REG_SIZE@  @@REG_MNEM@_$$REG_WSR$, #$%aREG_VALUE$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, @@REG_MNEM@
AND@@REG_SIZE@  UserVar, #$%aREG_VALUE$
ST@@REG_SIZE@   UserVar, @@REG_MNEM@
  $$END$
$$END$
##80C196?? XOR#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB   wsr, #$%aREG_WSR$
XOR@@REG_SIZE@  @@REG_MNEM@_$$REG_WSR$, #$%aREG_VALUE$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, @@REG_MNEM@
XOR@@REG_SIZE@  UserVar, #$%aREG_VALUE$
ST@@REG_SIZE@   UserVar, @@REG_MNEM@
  $$END$
$$END$
##80C196?? TESTZ#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB   wsr, #$%aREG_WSR$
AND@@REG_SIZE@  zero_reg, @@REG_MNEM@_$$REG_WSR$, #$%aREG_VALUE$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, @@REG_MNEM@
AND@@REG_SIZE@  zero_reg, UserVar, #00H 
  $$END$
JE    <Dest. Label> 
$$END$
##80C196?? TESTNZ#
$$IFSTR$ REG_MNEM "CCR0" |STR "CCR1" |STR "CCR2"
The Chip Configuration Byte is a ROM location.
Select WRITE to configure CCB's
$$END$
$$ELSE$
  $$IF$ REG_USEWSR
LDB  wsr, #$%aREG_WSR$
AND@@REG_SIZE@  zero_reg, @@REG_MNEM@_$$REG_WSR$, #$%aREG_VALUE$
  $$END$
  $$IFN$ REG_USEWSR
LD@@REG_SIZE@   UserVar, @@REG_MNEM@
AND@@REG_SIZE@  zero_reg, UserVar, #00H
  $$END$
JNE    <Dest. Label>  
$$END$
##80C196NT AD#
##80C196NQ AD#
##80C196KT AD#
##80C196KQ AD#
##80C196KR AD#
##80C196JR AD#
##80C196JT AD#
##80C196JQ AD#
$$ifp$ 80C196NT || 80C196NQ
$model(NT)
$$end$
$include (80c196kr.inc)
  ATOD_BUSY          set      (ad_result and 008)
  GO_NOW             set      008h
  GO_EPA             set      000h
  TEN_BIT_MODE       set      000h
  EIGHT_BIT_MODE     set      010h
  THRESH_DETECT_LO   set      030h
  THRESH_DETECT_HI   set      020h

$$if$ AD_TEST.0
; convert_10bit_atod:
;    Performs a 10-bit A/D conversion and returns the 10-bit 
;    result.  This routine is used by the init routine to 
;    calculate the offset error.  This routine waits until 
;    the A/D busy bit is cleared before and after the 
;    conversion. Interrupts should be disabled and the 
;    ad_time should be initialized prior to calling this 
;    routine.

cseg
convert_10bit_atod:
     ldb  tmpreg0, ad_result[0]
     jbs  tmpreg0, 3, convert_10bit_atod
     ldb  tmpreg0, #GO_NOW + TEN_BIT_MODE
     stb  tmpreg0, ad_command[0]
     ldb  zero_reg, zero_reg       ;4 state delay needed
     ldb  zero_reg, zero_reg       ;4 state delay needed
wait_for_done:
     ld   tmpreg0, ad_result[0]
     jbs  tmpreg0, 3, wait_for_done
     shr  tmpreg0, #6
     ret
$$end$
$$ifn$ ad_command.5 

; init_atod_converter:
;    Programs the A/D conversion speed and sample time by writing
;    CONV to ad_test.4-0 and SAM to ad_test.7-5.   
;
     $$if$ ad_command.4
;    CONV = (Tconv * Fosc - 3) / 16 - 1
;    SAM = (Tsam * Fosc - 2) / 8
     $$end$
     $$ifn$ ad_command.4
;    CONV = (Tconv * Fosc - 3) / 20 - 1
;    SAM = (Tsam * Fosc -2) / 8
;
;    Sample time (Tsam) = @@SAMP_TM@ microseconds
;    Conversion time (Tconv) = @@CONV_TM@ microseconds
     $$end$
$$end$

cseg
init_atod_converter:
     ldb  tmpreg0, #0$$AD_TIME$h
     stb  tmpreg0, ad_time[0]
$$ifn$ AD_TEST.0 &! AD_TEST.3

; An offset adjustment of $%TAD_TEST.2$+2.5 mV$0.0 mV$ will be added to the 
; conversion result.

$$end$
$$ifn$ AD_TEST.0 && AD_TEST.3

; An offset adjustment of $%TAD_TEST.2$-5.0 mV$-2.5 mV$ will be added to the
; conversion result.

$$end$
     CLR_BIT_REG int_mask, 5       ;disable A/D interrupt
$$if$ AD_TEST.0

$$if$ AD_TEST.0
; Set up a test conversion using $%tAD_TEST.1$VREF$ANGND$ and have the A/D
; offset error run-time calculated.
$$end$

  ATOD_TEST_ENABLE   set      0$$AD_TEST.0$h
  ATOD_TEST_GND      set      00h
  ATOD_TEST_VREF     set      02h 
  OFFSET_0_0_mV      set      00h
  OFFSET_2_5_mV      set      04h
  OFFSET_NEG_2_5_mV  set      08h
  OFFSET_NEG_5_0_mV  set      0Ch

     $$ifn$ AD_TEST.1
; Calculate the zero offset error by performing conversions 
; using ANGND. The zero offset will by either 2.5, 0.0, -2.5 or
; -5.0 mV.  
;
; Perform a conversion with a +2.5 mV offset. If the result is 0
; then the zero offset error is +2.5 mV.

     ldb  tmpreg0, #ATOD_TEST_ENABLE+ATOD_TEST_GND+OFFSET_2_5_mV
     stb  tmpreg0, ad_test[0]
     push zero_reg
     call convert_10bit_atod
     cmp  tmpreg0, zero_reg
     be   all_done_atod

; Perform a conversion with a 0.0 mV offset. If the result is 0 
; then the zero offset error is 0.0 mV. 

     ldb  tmpreg0, #ATOD_TEST_ENABLE+ATOD_TEST_GND+OFFSET_0_0_mV
     stb  tmpreg0, ad_test[0]
     push zero_reg
     call convert_10bit_atod
     cmp  tmpreg0, zero_reg
     be   all_done_atod

; Perform a conversion with a -2.5 mV offset. If the result is 0 
; then the zero offset error is -2.5 mV.  

     ldb  tmpreg0, #ATOD_TEST_ENABLE+ATOD_TEST_GND+OFFSET_NEG_2_5_mV
     stb  tmpreg0, ad_test[0]
     push zero_reg
     call convert_10bit_atod
     cmp  tmpreg0, zero_reg
     be   all_done_atod

; Perform a conversion with a -5.0 mV offset. If the result is 0 
; then the zero offset error is -5.0 mV. 

     ldb  tmpreg0, #OFFSET_NEG_5_0_mV
     stb  tmpreg0, ad_test[0]
     $$end$
     $$if$ AD_TEST.1

; Calculate the full scale offset error by performing conversions 
; using VREF. The full scale offset will by either -5.0, -2.5, 0.0 or
; +2.5 mV.  

; Perform a conversion with a -5.0 mV offset. If the result is 
; 3FFh then the full scale offset error is -5.0 mV.

     ldb  tmpreg0, #ATOD_TEST_ENABLE+ATOD_TEST_VREF+OFFSET_NEG_5_0_mV
     stb  tmpreg0, ad_test[0]
     push zero_reg
     call convert_10bit_atod
     cmp  tmpreg0, #3ffh
     je   all_done_atod

; Perform a conversion with a -2.5 mV offset. If the result is 
; 3FFh then the full scale offset error is -2.5 mV.

     ldb  tmpreg0, #ATOD_TEST_ENABLE+ATOD_TEST_VREF+OFFSET_NEG_2_5_mV
     stb  tmpreg0, ad_test[0]
     push zero_reg
     call convert_10bit_atod
     cmp  tmpreg0, #3ffh
     be   all_done_atod

; Perform a conversion with a 0.0 mV offset. If the result is 
; 3FFh then the full scale offset error is 0.0 mV.

     ldb  tmpreg0, #ATOD_TEST_ENABLE+ATOD_TEST_VREF+OFFSET_0_0_mV
     stb  tmpreg0, ad_test[0]
     push zero_reg
     call convert_10bit_atod
     cmp  tmpreg0, #3ffh
     be   all_done_atod

; Perform a conversion with a +2.5 mV offset. If the result is 
; 3FFh then the full scale offset error is +2.5 mV.

     ldb  tmpreg0, #OFFSET_2_5_mV
     stb  tmpreg0, ad_test[0]
     $$end$             end if vref reference
all_done_atod:
     ldb  tmpreg0, ad_test[0]
     andb tmpreg0, #0FCh
     stb  tmpreg0, ad_test[0]      ;clear test modes
$$end$             end if calculate
$$ifn$ AD_TEST.0
     ldb  tmpreg0, #0$$AD_TEST$h
     stb  tmpreg0, ad_test[0]      ;set offset
$$end$
$$if$ INT_MASK.5

; Enable the A/D conversion complete interrupt.

     SET_BIT_REG  int_mask, 5      ;set A/D interrupt bit
$$end$
     ret
$$ifn$ INT_MASK.5 

; convert_atod:
     $$ifn$ AD_COMMAND.5
;    Performs $%tAD_COMMAND.4$an 8$a 10$-bit A/D conversion and returns
     $$end$
     $$if$ AD_COMMAND.5
;    Performs a $%TAD_COMMAND.4$low$high$ voltage threshold detection and returns
     $$end$
;    the result.  This routine waits until the A/D busy bit 
;    is cleared before and after the conversion. If the 
;    A/D interrupt is used then the results of this 
;    routine may be erronous.

cseg
convert_atod:
     ldb  tmpreg0, ad_result[0]
     jbs  tmpreg0, 3, convert_atod
     $$ifp$ 80C196NT || 80C196NQ
     ldb  tmpreg0, 4[sp]
     $$end$
     $$ifp$ 80C196KT || 80C196KQ || 80C196KR || 80C196JR || 80C196JQ || 80C196JT
     ldb  tmpreg0, 2[sp]
     $$end$
     $$ifn$ AD_COMMAND.5
     addb tmpreg0, #$%tAD_COMMAND.3$GO_NOW$GO_EPA$ + $%tAD_COMMAND.4$EIGHT$TEN$_BIT_MODE
     $$end$
     $$if$ AD_COMMAND.5
     addb tmpreg0, #$%tAD_COMMAND.3$GO_NOW$GO_EPA$ + THRESH_DETECT_$%tAD_COMMAND.4$LO$HI$
     $$end$
     stb  tmpreg0, ad_command[0]
     $$if$ AD_COMMAND.3
     ldb  zero_reg, zero_reg       ;4 state delay needed
     ldb  zero_reg, zero_reg       ;4 state delay needed
wait_for_done2:
     ld   tmpreg0, ad_result[0]
     jbs  tmpreg0, 3, wait_for_done2
     shr  tmpreg0, #6
          $$ifn$ AD_COMMAND.5 &! AD_COMMAND.4
     ld   tmpreg0, ad_result[0]
     shr  tmpreg0, #6
          $$end$
          $$ifn$ AD_COMMAND.5 && AD_COMMAND.4
     ldbze tmpreg0, ad_result+1[0]
          $$end$
     $$end$
     ret
$$end$

; main_atod:
$$ifn$ AD_COMMAND.5
;    Program the A/D to perform a$%tAD_COMMAND.4$n 8-bit$ 10-bit$ conversion.
$$end$
$$if$ AD_COMMAND.5
;    Program the A/D to perform threshold detection of a $%tAD_COMMAND.4$low$high$ voltage
$$end$
;    on A/D channel $$AD_COMMAND.0-2$.  
;
;    The A/D conversion will be $%TAD_COMMAND.3$started immediately$triggered by the EPA$    

$$ifp$ 80C196NT || 80C196NQ
cseg at 0ff2080h
$$end$
$$ifp$ 80C196KT || 80C196KQ || 80C196KR || 80C196JR || 80C196JQ || 80C196JT
cseg at 02080h
$$end$
main_atod:
     ld   sp, #STACK
     call init_atod_converter
$$if$ INT_MASK.5
     ei                            ;globally enable interrupts
     ldb  tmpreg0, #0$$AD_COMMAND$h
     stb  tmpreg0, ad_command[0]
     br   $                        ;wait for A/D interrupt
$$end$
$$ifn$ INT_MASK.5 && AD_COMMAND.3

     push #0$$AD_COMMAND.0-2$H
     call convert_atod
     add  sp, #2

; tmpreg0 now contains the result of the conversion which
; can be now be acted upon.

     br   $
$$end$
$$ifn$ INT_MASK.$ &! AD_COMMAND.3
     push #0$$AD_COMMAND.0-2$H
     call convert_atod
     add  sp, #2
     br   $                        ;wait for epa to trigger A/D
                                   ;the result should be serviced
                                   ;with an interrupt routine.
$$end$
$$if$ INT_MASK.5
     $$ifp$ 80C196KT || 80C196KQ || 80C196KR || 80C196JR || 80C196JQ || 80C196JT

cseg at 200Ah
     $$end$
     $$ifp$ 80C196NT || 80C196NQ
cseg at 0FF200Ah
     $$end$
  atod_vector:  dcw  LSW atod_interrupt

; The atod_interrupt routine will be vectored to if interrupts
     $$if$ AD_COMMAND.5
; are enabled and a threshold has been detected.
     $$end$
     $$ifn$ AD_COMMAND.5
; are enabled and an A/D conversion has completed.
     $$end$

cseg
atod_interrupt:
     pusha
     push  tmpreg0
     $$ifn$ AD_COMMAND.5 &! AD_COMMAND.4
     ld   tmpreg0, ad_result[0]
     shr  tmpreg0, #6

; tmpreg0 can now be stored or acted upon by the user's code.
     $$end$
     $$ifn$ AD_COMMAND.5 && AD_COMMAND.4
     ldb   tmpreg0, ad_result+1[0]

; tmpreg0 can now be stored or acted upon by the user's code.