?? 196kxa.cod
字號:
$$end$
$$if$ AD_COMMAND.5
; The user's code can now act upon the detected $%TAD_COMMAND.4$low$high$ threshold
$$end$
pop tmpreg0
popa
ret
$$end$
end
##80C196NT IO_EP#
##80C196NQ IO_EP#
$model(NT)
$include (80c196kr.inc)
cseg
init_eport:
ldb tmpreg0, #0$$EP_REG$h ; initial value in ep_reg
stb tmpreg0, ep_reg[0]
; ep_dir configuration:
; $%TEP_DIR.0$IO_INPUT0$IO_OUTPUT0$ | $%TEP_DIR.1$IO_INPUT1$IO_OUTPUT1$ |
; $%TEP_DIR.2$IO_INPUT2$IO_OUTPUT2$ | $%TEP_DIR.3$IO_INPUT3$IO_OUTPUT3$ |
; $%TEP_DIR.4$IO_INPUT4$IO_OUTPUT4$ | $%TEP_DIR.5$IO_INPUT5$IO_OUTPUT5$ |
; $%TEP_DIR.6$IO_INPUT6$IO_OUTPUT6$ | $%TEP_DIR.7$IO_INPUT7$IO_OUTPUT7$;
;
; ep_mode configuration:
; $%TEP_MODE.0$EXT_BUS_A16$LSIO_0$ | $%TEP_MODE.1$EXT_BUS_A17$LSIO_1$ |
; $%TEP_MODE.2$EXT_BUS_A18$LSIO_2$ | $%TEP_MODE.3$EXT_BUS_A19$LSIO_3$ |
; $%TEP_MODE.4$EXT_BUS_A20$LSIO_4$ | $%TEP_MODE.5$EXT_BUS_A21$LSIO_5$ |
; $%TEP_MODE.6$EXT_BUS_A22$LSIO_6$ | $%TEP_MODE.7$EXT_BUS_A23$LSIO_7$;
ldb tmpreg0, #0$$EP_DIR$h
stb tmpreg0, ep_dir[0]
ldb tmpreg0, #0$$EP_MODE$h
stb tmpreg0, ep_mode[0]
ret
end
##80C196NT EPA#
##80C196NQ EPA#
##80C196KT EPA#
##80C196KQ EPA#
##80C196KR EPA#
##80C196JR EPA#
##80C196JT EPA#
##80C196JQ EPA#
$$ifp$ 80C196NT || 80C196NQ
$model(NT)
$$end$
$include (80c196kr.inc)
CAPTURE set 000h
COMPARE set 040h
EPA_ATOD set 004h
RE_ENABLE set 008h
POS_EDGE set 020h
SET_PIN set 020h
NEG_EDGE set 010h
CLR_PIN set 010h
BOTH_EDGE set 030h
TOGGLE_PIN set 030h
NOTHING set 000h
RESET_OPP_TIMER set 002h
RESET_TIMER set 001h
OVERWRITE_NEW_DATA set 001h
IGNORE_NEW_DATA set 000h
USE_TIMER1 set 000h
USE_TIMER2 set 080h
RE_MAP set 00100h
EPA0_INT_BIT set 4
EPA1_INT_BIT set 3
EPA2_INT_BIT set 2
EPA3_INT_BIT set 1
EPAX_INT_BIT set 0
EPA4_INT_BIT set 15
EPA5_INT_BIT set 14
EPA6_INT_BIT set 13
EPA7_INT_BIT set 12
EPA8_INT_BIT set 11
EPA9_INT_BIT set 10
EPA0_OVR_BIT set 9
EPA1_OVR_BIT set 8
EPA2_OVR_BIT set 7
EPA3_OVR_BIT set 6
EPA4_OVR_BIT set 5
EPA5_OVR_BIT set 4
EPA6_OVR_BIT set 3
EPA7_OVR_BIT set 2
EPA8_OVR_BIT set 1
EPA9_OVR_BIT set 0
COMP_CH0_BIT set 3
COMP_CH1_BIT set 2
TIMER1_OVR_BIT set 1
TIMER2_OVR_BIT set 0
cseg
init_epa$$EPA_CHANNEL$:
; init_epa$$EPA_CHANNEL$:
; Program the EPA module $$EPA_CHANNEL$ to operate in $%tEPA_CON.6$compare$capture$ mode
; using $%tEPA_CON.7$timer 2$timer 1$ as the reference timer.
$$ifn$ EPA_CON.6 && EPA_CON.1 || EPA_CON.0 || EPA_CON.5 || EPA_CON.4 || EPA_CON.2
;
; Select the following actions as $%tEPA_CON.6$compare$capture$ event(s):
$$if$ EPA_CON.6
$$if$ EPA_CON.4 || EPA_CON.5
; - $%4EPA_CON.4-5$$clear$set$toggle$ the EPA output pin
$$end$
$$end$
$$ifn$ EPA_CON.6
$$if$ EPA_CON.4 || EPA_CON.5
; - $%4EPA_CON.4-5$$falling$rising$either$ edge on the EPA input pin
$$end$
$$end$
$$if$ EPA_CON.2
; - start an A/D conversion
$$end$
$$if$ EPA_CON.0 && EPA_CON.6
$$if$ EPA_CON.1
; - reset $%tEPA_CON.7$timer 1$timer 2$
$$end$
$$ifn$ EPA_CON.1
; - reset $%tEPA_CON.7$timer 2$timer 1$
$$end$
$$end$
$$if$ EPA_CON.1 &! EPA_CON.6
; - reset $%tEPA_CON.7$timer 1$timer 2$
$$end$
$$end$
$$ifn$ EPA_CON.6
;
; Configure the module to $%tEPA_CON.0$overwrite old data in the buffer$ignore new data$ when an
; overrun error is generated.
$$end$
$$if$ EPA_CON.3 && EPA_CON.6
;
; Set the reenable bit so that the compare function is always enabled.
$$end$
ld tmpreg0, #0$$EPA_CON$h
st tmpreg0, epa$$EPA_CHANNEL$_con[0]
$$if$ EPA_CON.6
$$if$ RELATIVE
; Load the EPA$$EPA_CHANNEL$_TIME register with the $%TEPA_CON.7$timer 2$timer 1$ value
; plus an offset of $$TIMER_OFFSET$h.
ld tmpreg0, $%TEPA_CON.7$timer2$timer1$[0]
add tmpreg0, #0$$TIMER_OFFSET$h
st tmpreg0, epa$$EPA_CHANNEL$_time[0]
$$end$
$$ifn$ RELATIVE
; Load the EPA$$EPA_CHANNEL$_TIME register with the $$TIMER_OFFSET$h.
ld tmpreg0, #0$$TIMER_OFFSET$h
st tmpreg0, epa$$EPA_CHANNEL$_time[0]
$$end$
$$end$
$$if$ EPA_CON.4-5
; Configure the port pin as an EPA event pin.
$$ifn$ EPA_CHANNEL.3
SET_BIT p1_reg, $$EPA_CHANNEL$ ;init reg
$$if$ EPA_CON.6
CLR_BIT p1_dir, $$EPA_CHANNEL$ ;make output pin
$$end$
$$ifn$ EPA_CON.6
SET_BIT p1_dir, $$EPA_CHANNEL$ ;make input pin
$$end$
SET_BIT p1_mode, $$EPA_CHANNEL$ ;select EPA mode
$$end$
$$if$ EPA_CHANNEL.3
SET_BIT p6_reg, $%XEPA_CHANNEL - 8$ ;init reg
$$if$ EPA_CON.6
CLR_BIT p6_dir, $%XEPA_CHANNEL - 8$ ;make output pin
$$end$
$$ifn$ EPA_CON.6
SET_BIT p6_dir, $%XEPA_CHANNEL - 8$ ;make input pin
$$end$
SET_BIT p6_mode, $%XEPA_CHANNEL - 8$ ;select EPA mode
$$end$
$$end$ end of port setup
$$if$ EPA_INTERRUPT
$$if$ (EPA_CHANNEL > 3)
SET_BIT_REG int_mask, EPAX_INT_BIT ;unmask epax interrupts
SET_BITW epa_mask, EPA$$EPA_CHANNEL$_INT_BIT
$$end$
$$if$ (EPA_CHANNEL < 4)
SET_BIT_REG int_mask, EPA$$EPA_CHANNEL$_INT_BIT ;unmask epa interrupts
$$end$
$$end$
$$if$ EPA_OVERFLOW
$$if$ (EPA_CHANNEL < 4)
SET_BIT_REG int_mask, EPAX_INT_BIT ;unmask epax interrupts
SET_BITW epa_mask,EPA$$EPA_CHANNEL$_OVR_BIT ;unmask overflow on epa$$EPA_CHANNEL$
$$end$
$$end$
ret
$$ifn$ EPA_OVERFLOW &! EPA_INTERRUPT
poll_epa$$EPA_CHANNEL$:
$$ifn$ EPA_INTERRUPT
$$ifn$ EPA_CHANNEL.2-4
jbc int_pend, EPA$$EPA_CHANNEL$INT_BIT, no_epa$$EPA_CHANNEL$_interrupts
$$end$
$$if$ EPA_CHANNEL.2-4
jbc epa_pend, EPA$$EPA_CHANNEL$INT_BIT, no_epa$$EPA_CHANNEL$_interrupts
$$end$
; User code for event channel $$EPA_CHANNEL$ would go here
$$ifn$ EPA_CON.6
ld tmpreg0, epa$$EPA_CHANNEL$_time[0] ;time needs to be read to
;avoid overrun
$$end$
$$if$ EPA_CON.6 &! EPA_CON.3
; Since this event was not re-enabled, no more events will occur.
$$end$
$$if$ RELATIVE && EPA_CON.6 && EPA_CON.3
ld tmpreg0, epa$$EPA_CHANNEL$_time[0]
add tmpreg0, #0$$TIMER_OFFSET$h
st tmpreg0, epa$$EPA_CHANNEL$_time[0]
$$end$
$$ifn$ RELATIVE && EPA_CON.6 && EPA_CON.3
; Since this event is absolute and re-enabled,
; no polling is necessary.
$$end$
$$ifn$ EPA_CHANNEL.2-4
CLR_BIT int_pend, EPA$$EPA_CHANNEL$_INT_BIT
$$end$
$$if$ EPA_CHANNEL.2-4
CLR_BITW epa_pend, EPA$$EPA_CHANNEL$_INT_BIT
$$end$
no_epa$$EPA_CHANNEL$_interrupts:
$$end$
$$if$ EPA_OVERFLOW
jbc epa_pend, EPA$$EPA_CHANNEL$_OVR_BIT, no_epa$$EPA_CHANNEL$_ovr
;code to handle overflow would go here
;the epa_time needs to be read to clear overflow
ld tmpreg0, epa$$EPA_CHANNEL$_time[0];
CLR_BITW epa_pend, EPA$$EPA_CHANNEL$_OVR_BIT
no_epa$$EPA_CHANNEL$_ovr:
$$end$
ret
$$end$
$$ifp$ 80C196NT || 80C196NQ
cseg at 0ff2080h
$$end$
$$ifp$ 80C196KT || 80C196KQ || 80C196KR || 80C196JR || 80C196JQ || 80C196JT
cseg at 02080h
$$end$
main_epa$$EPA_CHANNEL$:
ld sp, #STACK
; Should init the timers before using the epa
call init_epa$$EPA_CHANNEL$
$$if$ EPA_INTERRUPT || EPA_OVERFLOW
ei ;globally enable interrupts
$$end$
$$ifn$ EPA_OVERFLOW &! EPA_INTERRUPT
; EPA events can be serviced by polling int_pend or epa_pend.
loop_forever$$EPA_CHANNEL$:
call poll_epa$$EPA_CHANNEL$
br loop_forever$$EPA_CHANNEL$
$$end$
$$if$ EPA_INTERRUPT || EPA_OVERFLOW
br $ ;wait for interrupts to occur
$$end$
$$if$ EPA_INTERRUPT
$$if$ (EPA_CHANNEL < 4)
$$ifp$ 80C196KT || 80C196KQ || 80C196KR || 80C196JR || 80C196JQ || 80C196JT
cseg at 2000h + (2 * EPA$$EPA_CHANNEL$_INT_BIT)
$$end$
$$ifp$ 80C196NT || 80C196NQ
cseg at 0FF2000h + (2 * EPA$$EPA_CHANNEL$_INT_BIT)
$$end$
epa$$EPA_CHANNEL$_vector: dcw LSW epa$$EPA_CHANNEL$_interrupt
cseg
epa$$EPA_CHANNEL$_interrupt:
pusha
push tmpreg0
$$ifn$ EPA_CON.6
ld tmpreg0, epa$$EPA_CHANNEL$_time[0] ;time needs to be read to
;avoid overrun
$$end$
$$if$ EPA_CON.6 && RELATIVE && EPA_CON.3
ld tmpreg0, epa$$EPA_CHANNEL$_time[0]
add tmpreg0, #0$$TIMER_OFFSET$h
st tmpreg0, epa$$EPA_CHANNEL$_time[0]
$$end$
$$if$ EPA_CON.6 &! EPA_CON.3
; Since not re-enabled, no more events will occur unless
; epa_control and epa_time are re-written.
$$end$
$$ifn$ RELATIVE && EPA_CON.6 && EPA_CON.3
; Since this event is absolute and re-enabled,
; user code does not need to re-enable.
$$end$
pop tmpreg0
popa
ret
$$end$ end of epa0-3 interrupts
$$end$
$$if$ EPA_INTERRUPT && (EPA_CHANNEL > 3) || EPA_OVERFLOW
; To have code generated for the epax interrupt, select the ICU
; design screen.
$$end$
end
##80C196NT COMP#
##80C196NQ COMP#
##80C196KT COMP#
##80C196KQ COMP#
##80C196KR COMP#
##80C196JR COMP#
##80C196JT COMP#
##80C196JQ COMP#
$$ifp$ 80C196NT || 80C196NQ
$model(NT)
$$end$
$include (80c196kr.inc)
COMPARE set 040h
EPA_ATOD set 004h
RE_ENABLE set 008h
SET_PIN set 020h
CLR_PIN set 010h
TOGGLE_PIN set 030h
NOTHING set 000h
RESET_OPP_TIMER set 002h
RESET_TIMER set 001h
USE_TIMER1 set 000h
USE_TIMER2 set 080h
EPAX_INT_BIT set 0
COMP0_INT_BIT set 3
COMP1_INT_BIT set 2
cseg
;init_comp$$COMP_CHANNEL$:
; Program the EPA Compare Module $$COMP_CHANNEL$ to use $%tTCOMP_CON$timer 2$timer 1$
; as the reference timer.
$$if$ COMP_CON.5 || COMP_CON.3 || COMP_CON.4 || COMP_CON.2 || COMP_CON.0
;
; Select the following actions as compare event(s)
$$if$ COMP_CON.4 || COMP_CON.5
; - $%4COMP_CON.4-5$$clear$set$toggle$ the EPA output pin
$$end$
$$if$ COMP_CON.2
; - start an A/D conversion
$$end$
$$if$ COMP_CON.0 && COMP_CON.7
; - reset $%tCOMP_CON.1$timer 2$timer 1$
$$end$
$$if$ COMP_CON.0 &! COMP_CON.7
; - reset $%tCOMP_CON.1$timer 1$timer 2$
$$end$
$$end$
$$if$ COMP_CON.3
;
; Set the reenable bit so that the compare function is always enabled.
$$end$
init_comp$$COMP_CHANNEL$:
ld tmpreg0, #0$$COMP_CON$h
st tmpreg0, comp$$COMP_CHANNEL$_con[0]
$$if$ COMP_CON.6 && RELATIVE
ld tmpreg0, $%TCOMP_CON.7$timer2$timer1$[0]
add tmpreg0, #0$$TIMER_OFFSET$h;
st tmpreg0, comp$$COMP_CHANNEL$_time[0]
$$end$
$$if$ COMP_CON.6 &! RELATIVE
ld tmpreg0, #0$$TIMER_OFFSET$h;
st tmpreg0, comp$$COMP_CHANNEL$_time[0]
$$end$
$$if$ COMP_CON.4-5
SET_BIT p6_reg, $$COMP_CHANNEL$ ;init reg
CLR_BIT p6_dir, $$COMP_CHANNEL$ ;make output pin
SET_BIT p6_mode, $$COMP_CHANNEL$ ;select COMP mode
$$end$ end of port setup of COMP0
$$if$ COMP_INTERRUPT
SET_BIT_REG int_mask, EPAX_INT_BIT ;unmask COMPx interrupts
SET_BIT epa_mask1, COMP$$COMP_CHANNEL$_INT_BIT
$$end$
ret
$$ifn$ COMP_INTERRUPT
poll_comp$$COMP_CHANNEL$:
ldb tmpreg0, epa_pend1[0]
jbc tmpreg0, COMP$$COMP_CHANNEL$_INT_BIT, no_comp$$COMP_CHANNEL$_event
; User code for comp channel $$COMP_CHANNEL$ would go here.
$$ifn$ COMP_CON.3
; Since this event was not re-enabled, no more
; events will occur.
$$end$
$$if$ RELATIVE && COMP_CON.3
ld tmpreg0, comp$$COMP_CHANNEL$_time[0]
add tmpreg0, #0$$TIMER_OFFSET$h
st tmpreg0, comp$$COMP_CHANNEL$_time[0]
$$end$
$$ifn$ RELATIVE && COMP_CON.3
; Since this event is absolute and re-enabled,
; no polling is necessary.
$$end$
CLR_BIT epa_pend1, COMP$$COMP_CHANNEL$_INT_BIT
no_comp$$COMP_CHANNEL$_event:
ret
$$end$
$$ifp$ 80C196NT || 80C196NQ
cseg at 0ff2080h
$$end$
$$ifp$ 80C196KT || 80C196KQ || 80C196KR || 80C196JR || 80C196JQ || 80C196JT
cseg at 02080h
$$end$
main_comp$$COMP_CHANNEL$:
ld sp, #STACK
; Should init the timers before using the COMP
call init_comp$$COMP_CHANNEL$
$$if$ COMP_INTERRUPT
ei ;globally enable interrupts
$$end$
$$ifn$ COMP_INTERRUPT
; COMP events can be serviced by polling epa_pend1.
loop_forever_comp$$COMP_CHANNEL$:
call poll_comp$$COMP_CHANNEL$
br loop_forever_comp$$COMP_CHANNEL$
$$end$
$$if$ COMP_INTERRUPT
br $ ;wait for interrupts to occur
$$end$
$$if$ COMP_INTERRUPT
; To have code generated for the epax interrupt,
; select the ICU design screen.
$$end$
end
##80C196NT TIMER#
##80C196NQ TIMER#
##80C196KT TIMER#
##80C196KQ TIMER#
##80C196KR TIMER#
##80C196JR TIMER#
##80C196JT TIMER#
##80C196JQ TIMER#
$$ifp$ 80C196NT || 80C196NQ
$model(NT)
$$end$
$include (80c196kr.inc)
COUNT_ENABLE set 080h
COUNT_DISABLE set 000h
COUNT_UP set 040h
COUNT_DOWN set 000h
CLOCK_INTERNAL set 000h
CLOCK_EXTERNAL set 008h
DIRECTION_TXDIR set 010h
CLOCK_T1_OVFL set 020h
DIRECTION_T1_OVFL set 010h
QUADRATURE_CLOCK set 038h
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