/*
 *  Copyright (c) 1995, Intel Corporation
 *
 *  $Workfile:   186c.cod  $
 *  $Revision:   1.1  $
 *  $Modtime:   Mar 22 1995 16:55:02  $
 *
 *  Purpose:
 *
 *
 *
 *
 *
 *  Compiler:       
 *
 *  Ext Packages:   
 *
 * 
 *
 */
##COMMENT#
  ************* Register Editor Coding information ************
##80C186E? WRITE#
##80C186XL WRITE#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
_Set186Register(@@REG_MNEM@,$%cREG_VALUE$);
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
outpw(@@REG_MNEM@, $%cREG_VALUE$);
    $$END$
    $$IF$ RELREG.12
@@REG_MNEM@ = $%cREG_VALUE$;
    $$END$
  $$END$
$$END$
##80C186E? READ#
##80C186XL READ#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
UserVar = _Get186Register(@@REG_MNEM@);
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
UserVar = inpw(@@REG_MNEM@);
    $$END$
    $$IF$ RELREG.12
UserVar = @@REG_MNEM@;
    $$END$
  $$END$
$$END$
##80C186E? AND#
##80C186XL AND#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
_Set186Register(@@REG_MNEM@),_Get186Register(@@REG_MNEM@) & $%cREG_VALUE$);
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
outpw(@@REG_MNEM@,inpw(@@REG_MNEM@) & $%cREG_VALUE$);
    $$END$
    $$IF$ RELREG.12
@@REG_MNEM@ &= $%cREG_VALUE$;
    $$END$
  $$END$
$$END$
##80C186E? XOR#
##80C186XL XOR#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
_Set186Register(@@REG_MNEM@),_Get186Register(@@REG_MNEM@) ^ $%cREG_VALUE$);
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
outpw(@@REG_MNEM@,inpw(@@REG_MNEM@) ^ $%cREG_VALUE$);
    $$END$
    $$IF$ RELREG.12
@@REG_MNEM@ ^= $%cREG_VALUE$;
    $$END$
  $$END$
$$END$
##80C186E? OR#
##80C186XL OR#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
_Set186Register(@@REG_MNEM@),_Get186Register(@@REG_MNEM@) | $%cREG_VALUE$);
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
outpw(@@REG_MNEM@,inpw(@@REG_MNEM@) | $%cREG_VALUE$);
    $$END$
    $$IF$ RELREG.12
@@REG_MNEM@ |= $%cREG_VALUE$;
    $$END$
  $$END$
$$END$
##80C186E? TESTZ#
##80C186XL TESTZ#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
if(!(_Get186Register(@@REG_MNEM@) & $%cREG_VALUE$))
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
if(!(inpw(@@REG_MNEM@) & $%cREG_VALUE$))
    $$END$
    $$IF$ RELREG.12
if(!(@@REG_MNEM@ & $%cREG_VALUE$))
    $$END$
  $$END$
{
  /* User Code */
}
$$END$
##80C186E? TESTNZ#
##80C186XL TESTNZ#
$$IFSTR$ REG_MNEM "WDT????"
Use the Peripheral Editor
to Program @@REG_MNEM@
$$END$
$$ELSE$
  $$IF$ REG_USEMACRO
if((_Get186Register(@@REG_MNEM@) & $%cREG_VALUE$))
  $$END$
  $$ELSE$
    $$IFN$ RELREG.12
if(inpw(@@REG_MNEM@) & $%cREG_VALUE$)
    $$END$
    $$IF$ RELREG.12
if(@@REG_MNEM@ & $%cREG_VALUE$)
    $$END$
  $$END$
{
  /* User Code */
}
$$END$
##COMMENT#
  ********** Begin Peripheral Editor Coding **************
##80C186EC DMA0#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ec.h"
void Init_DMA0(void)
{
/*DMA Channel 0 
*  Source Address = @@D0SRC@ */
    _Set186Register(D0SRCL , 0x$$D0SRCL$);
    _Set186Register(D0SRCH , 0x$$D0SRCH$);

/* Destination Address = @@D0DST@ */
    _Set186Register(D0DSTL , 0x$$D0DSTL$);
    _Set186Register(D0DSTH , 0x$$D0DSTH$);

/* Transfer Count */
    _Set186Register(D0TC , 0x$$D0TC$);

/* DMA Control Register
*   Destination Address is in $%tD0CON.15$Memory$I/O$ Space
*   Destination Decrement = ($$D0CON.14$) $%tD0CON.14$Decrement$Off$
*   Destination Increment = ($$D0CON.13$) $%tD0CON.13$Increment$Off$
*   Source Address is in $%tD0CON.12$Memory$I/O$ Space
*   Source Decrement  = ($$D0CON.11$) $%tD0CON.11$Decrement$Off$
*   Source Increment  = ($$D0CON.10$) $%tD0CON.10$Increment$Off$
*   Terminal Count is $%eD0CON.9$
*   Interrupt is $%eD0CON.8$  
*   Synchronization:
*      00 - Unsyn    01 - Src Syn   10 - Dest Syn
*   Synchronization = $$D0CON.7$$$D0CON.6$
*   Priority = $%tD0CON.5$High$Low$
*   Internal IDRQ Select = $%eD0CON.4$
*   Change Start Bit = $%eD0CON.2$
*   Start  = $%eD0CON.1$
*   $%tD0CON.0$Word$Byte$ Transfer
*/
    _Set186Register(D0CON , 0x$$D0CON$);

/* DMA Priority Register
*   DMA Module A Priority = $%tDMAPRI.0$High$Low$
*   Internal DMA Request for Module A = $%tDMAPRI.8$Serial Chan0$Timer 2$
*/
    _Set186Register(DMAPRI , 0x$$DMAPRI$);
}
##80C186XL DMA0#
##80C186EA DMA0#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ea.h"
void Init_DMA0(void)
{
/* Source Address = @@D0SRC@ */
    _Set186Register(D0SRCL , 0x$$D0SRCL$);
    _Set186Register(D0SRCH , 0x$$D0SRCH$);

/* Destination Address = @@D0DST@ */
    _Set186Register(D0DSTL , 0x$$D0DSTL$);
    _Set186Register(D0DSTH , 0x$$D0DSTH$);

/* Transfer Count */
    _Set186Register(D0TC , 0x$$D0TC$);

/* DMA Control Register
*   Destination Address is in $%tD0CON.15$Memory$I/O$ Space
*   Destination Decrement = ($$D0CON.14$)$%tD0CON.14$Decrement$Off$
*   Destination Increment = ($$D0CON.13$)$%tD0CON.13$Increment$Off$
*   Source Address is in $%tD0CON.12$Memory$I/O$ Space
*   Source Decrement  = ($$D0CON.11$)$%tD0CON.11$Decrement$Off$
*   Source Increment  = ($$D0CON.10$)$%tD0CON.10$Increment$Off$
*   Terminal Count is $%eD0CON.9$
*   Interrupt is $%eD0CON.8$
*   Synchronization:
*      00 - Unsyn    01 - Src Syn   10 - Dest Syn
*   Synchronization = $$D0CON.7$$$D0CON.6$
*   Priority = $%tD0CON.5$High$Low$
*   Internal IDRQ Select = $%eD0CON.4$
*   Change Start Bit = $%eD0CON.2$
*   Start  = $%eD0CON.1$
*   $%tD0CON.0$Word$Byte$ Transfer
*/
    _Set186Register(D0CON , 0x$$D0CON$);
}
##80C186EC DMA1#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ec.h"
void Init_DMA1(void)
{
/* Source Address = @@D1SRC@ */
    _Set186Register(D1SRCL , 0x$$D1SRCL$);
    _Set186Register(D1SRCH , 0x$$D1SRCH$);

/* Destination Address = @@D1DST@ */
    _Set186Register(D1DSTL , 0x$$D1DSTL$);
    _Set186Register(D1DSTH , 0x$$D1DSTH$);

/* Transfer Count */
    _Set186Register(D1TC , 0x$$D1TC$);

/* DMA Control Register
*   Destination Address is in $%tD1CON.15$Memory$I/O$ Space
*   Destination Decrement = ($$D1CON.14$)$%tD1CON.14$Decrement$Off$
*   Destination Increment = ($$D1CON.13$)$%tD1CON.13$Increment$Off$
*   Source Address is in $%tD1CON.12$Memory$I/O$ Space
*   Source Decrement  = ($$D1CON.11$)$%tD1CON.11$Decrement$Off$
*   Source Increment  = ($$D1CON.10$)$%tD1CON.10$Increment$Off$
*   Terminal Count is $%eD1CON.9$
*   Interrupt is $%eD1CON.8$
*   Synchronization:
*      00 - Unsyn    01 - Src Syn   10 - Dest Syn
*   Synchronization = $$D1CON.7$$$D1CON.6$
*   Priority = $%tD1CON.5$High$Low$
*   Internal IDRQ Select = $%eD1CON.4$
*   Change Start Bit = $%eD1CON.2$
*   Start  = $%eD1CON.1$
*   $%tD1CON.0$Word$Byte$ Transfer
*/
    _Set186Register(D1CON , 0x$$D1CON$);

/* DMA Priority Register
*   DMA Module A Priority = $%tDMAPRI.0$High$Low$
*   Internal DMA Request for Module A = $%tDMAPRI.8$Serial Chan0$Timer 2$
*/
    _Set186Register(DMAPRI , 0x$$DMAPRI$);
}
##80C186XL DMA1#
##80C186EA DMA1#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ea.h"
void Init_DMA1(void)
{
/* Source Address = @@D1SRC@ */
    _Set186Register(D1SRCL , 0x$$D1SRCL$);
    _Set186Register(D1SRCH , 0x$$D1SRCH$);

/* Destination Address = @@D1DST@ */
    _Set186Register(D1DSTL , 0x$$D1DSTL$);
    _Set186Register(D1DSTH , 0x$$D1DSTH$);

/* Transfer Count */
    _Set186Register(D1TC , 0x$$D1TC$);

/* DMA Control Register
*   Destination Address is in $%tD1CON.15$Memory$I/O$ Space
*   Destination Decrement = ($$D1CON.14$) $%tD1CON.14$Decrement$Off$
*   Destination Increment = ($$D1CON.13$) $%tD1CON.13$Increment$Off$
*   Source Address is in $%tD1CON.12$Memory$I/O$ Space
*   Source Decrement  = ($$D1CON.11$) $%tD1CON.11$Decrement$Off$
*   Source Increment  = ($$D1CON.10$) $%tD1CON.10$Increment$Off$
*   Terminal Count is $%eD1CON.9$
*   Interrupt is $%eD1CON.8$
*   Synchronization:
*      00 - Unsyn    01 - Src Syn   10 - Dest Syn
*   Synchronization = $$D1CON.7$$$D1CON.6$
*   Priority = $%tD1CON.5$High$Low$
*   Internal IDRQ Select = $%eD1CON.4$
*   Change Start Bit = $%eD1CON.2$
*   Start  = $%eD1CON.1$
*   $%tD1CON.0$Word$Byte$ Transfer
*/
    _Set186Register(D1CON , 0x$$D1CON$);
}
##80C186EC DMA2#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ec.h"
void Init_DMA2(void)
{
/* Source Address = @@D2SRC@ */
    _Set186Register(D2SRCL , 0x$$D2SRCL$);
    _Set186Register(D2SRCH , 0x$$D2SRCH$);

/* Destination Address = @@D2DST@ */
    _Set186Register(D2DSTL , 0x$$D2DSTL$);
    _Set186Register(D2DSTH , 0x$$D2DSTH$);

/* Transfer Count */
    _Set186Register(D2TC , 0x$$D2TC$);

/* DMA Control Register
*   Destination Address is in $%tD2CON.15$Memory$I/O$ Space
*   Destination Decrement = ($$D2CON.14$) $%tD2CON.14$Decrement$Off$
*   Destination Increment = ($$D2CON.13$) $%tD2CON.13$Increment$Off$
*   Source Address is in $%tD2CON.12$Memory$I/O$ Space
*   Source Decrement  = ($$D2CON.11$) $%tD2CON.11$Decrement$Off$
*   Source Increment  = ($$D2CON.10$) $%tD2CON.10$Increment$Off$
*   Terminal Count is $%eD2CON.9$
*   Interrupt is $%eD2CON.8$
*   Synchronization:
*      00 - Unsyn    01 - Src Syn   10 - Dest Syn
*   Synchronization = $$D2CON.7$$$D2CON.6$
*   Priority = $%tD2CON.5$High$Low$
*   Internal IDRQ Select = $%eD2CON.4$
*   Change Start Bit = $%eD2CON.2$
*   Start  = $%eD2CON.1$
*   $%tD2CON.0$Word$Byte$ Transfer
*/
    _Set186Register(D2CON , 0x$$D2CON$);

/* DMA Priority Register
*   DMA Module B Priority = $%tDMAPRI.2$High$Low$
*   Internal DMA Request for Module B = $%tDMAPRI.10$Serial Chan1$Timer 2$
*/
    _Set186Register(DMAPRI , 0x$$DMAPRI$);
}
##80C186EC DMA3#
$$IF$ RELREG.12
#define _MEM_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00000L
#endif
$$END$
$$IFN$ RELREG.12
#define _IO_SPACE_
#ifndef PCB_BASE
#define PCB_BASE 0x$$RELREG.0-11$00
#endif
$$END$
#include "80c186ec.h"
void Init_DMA3(void)
{
/* Source Address = @@D3SRC@ */
    _Set186Register(D3SRCL , 0x$$D3SRCL$);
    _Set186Register(D3SRCH , 0x$$D3SRCH$);

/* Destination Address = @@D3DST@ */
    _Set186Register(D3DSTL , 0x$$D3DSTL$);
    _Set186Register(D3DSTH , 0x$$D3DSTH$);

/* Transfer Count */
    _Set186Register(D3TC , 0x$$D3TC$);

/* DMA Control Register
*   Destination Address is in $%tD3CON.15$Memory$I/O$ Space
*   Destination Decrement = ($$D3CON.14$) $%tD3CON.14$Decrement$Off$
*   Destination Increment = ($$D3CON.13$) $%tD3CON.13$Increment$Off$
*   Source Address is in $%tD3CON.12$Memory$I/O$ Space
*   Source Decrement  = ($$D3CON.11$) $%tD3CON.11$Decrement$Off$
*   Source Increment  = ($$D3CON.10$) $%tD3CON.10$Increment$Off$
*   Terminal Count is $%eD3CON.9$
*   Interrupt is $%eD3CON.8$
*   Synchronization:
*      00 - Unsyn    01 - Src Syn   10 - Dest Syn
*   Synchronization = $$D3CON.7$$$D3CON.6$
*   Priority = $%tD3CON.5$High$Low$
*   Internal IDRQ Select = $%eD3CON.4$
*   Change Start Bit = $%eD3CON.2$
*   Start  = $%eD3CON.1$
*   $%tD3CON.0$Word$Byte$ Transfer
*/
    _Set186Register(D3CON , 0x$$D3CON$);