?? hl82930h.txt
字號(hào):
#USB 82930H#
Universal Serial Bus\n
- Supports the connection of a PC peripheral to a host PC via the USB.\n
- Supports four endpoint pairs (0-3).\n
- Four downstream ports, (3 ext. and 1 int.)\n
- Overcurrent detection input \n
- Port power switching output\n
- Embedded Function FIFO memory\n
- Two user configurable FIFO's with up to 1024 bytes,\n
One for transmission and one for reception.\n
- Six FIFOs of 16 bytes depth, 3 for transmission and 3 for reception.\n
- Hub FIFO memory EP0 = 16 bytes and EP1 = 1 byte.
- (SIE) Serial bus interface engine.\n
- Function Interface Unit (FIU)\n
- Automatic transmit/receive FIFO management.\n
- Three USB interrupt vectors\n
- USB function interrupt\n
- start of frame/Hub\n
- global suspend and resume\n
- Phase Locked Loop\n
- Selectable 12 Mbps data rate.\n
#PCA 82930H#
Programmable Counter Array\n
- Measures periods, pulse widths, duty cycles, and phase differences\n
- 16-bit timer/counter with 166-ns resolution at 12 MHz (PLL On)\n
- Five high-speed, 16-bit modules\n
Input capture: rising, falling, or both edges\n
Output compare\n
Pulse-width modulation\n
Programmable 16-bit watchdog timer (module 4 only)\n
#Serial 82930H#
Serial Port\n
- Full duplex\n
- One synchronous and three asynchronous modes\n
- Variable baud rate\n
- Framing error detection\n
- Multi-processor communications\n
- Automatic address recognition\n
- Interrupt on reception and transmission of data byte\n
#Clock 82930H#
Clock\n
- 8X930Hx operates at 12 MHz\n
Operating Frequency:\n
PLLSEL2, PLLSEL1, PLLSEL0, USB Data Rate, Core/Periph Frequency, XTAL1, Comment\n
1, 1, 0, 12 Mbps , 12 Mhz, 12 Mhz, PLL On\n
#Timer 82930H#
Timer/Counters\n
- Three 16-bit units: timer 0, timer 1, timer 2\n
- Timer or counter operation\n
- Internal or external clocking\n
\n
- Timer 0 and timer 1 modes:\n
13-bit timer or counter\n
16-bit timer or counter\n
8-bit auto-reload timer or counter\n
Two 8-bit timers\n
\n
- Timer 2 modes:\n
Auto-reload (up or up/down counter/timer)\n
Independent event capture\n
Baud rate generator\n
Programmable clock-out at 50% duty cycle\n
#CPU 82930H#
Central Processing Unit\n
- High-performance CPU\n
- Binary- and source-mode compatible with MCS 51 microcontrollers\n
- Linear address space\n
- Register-based architecture\n
- Enriched instruction set\n
8-, 16-, and 32-bit data-transfer instructions\n
8-, 16-, and 32-bit arithmetic instructions\n
8-, 16-, and 32-bit control instructions\n
Supports two-operand instructions\n
- Pipeline CPU\n
- Two bytes/state code fetch (internal execution)\n
- Two bytes/state data fetch (internal execution)\n
#WDT 82930H#
Watchdog Timer\n
- 14-bit timer\n
- Allows recovery from system upsets\n
- Increases system reliability\n
- One-time enabled\n
- Resets chip on overflow\n
#DATA 82930H#
RAM\n
General-purpose data RAM accessible by direct addressing\n
-8X930Hx - 1K Bytes of on chip general-purpose data RAM\n
#CODE 82930H#
EPROM/ROM\n
-8x930HD - 8 K Bytes of on chip ROM\n
-8x930HE - 16 K Bytes of on chip ROM\n
#IO 82930H#
I/O Ports\n
- 32 bidirectional I/O pins\n
#BU 82930H#
Bus Interface Unit\n
- 16-Mbyte addressability (24-bit internal address bus)\n
#IU 82930H#
Interrupt Control Unit\n
- Eleven interrupt sources\n
- Four priority levels\n
#PM 82930H#
Power Management\n
Idle mode\n
- SFRs and on-chip data RAM retain their values\n
- Peripherals continue to operate\n
- Any enabled interrupt awakens the chip\n
\n
Powerdown mode\n
- SFRs and on-chip data RAM retain their values\n
- Peripherals stop operation\n
- Any enabled external interrupt awakens the chip\n
- Vcc can be reduced as low as 2 V\n
\n
Power off flag\n
- Used to distinguish between\n
'cold-start' reset and 'warm-start' reset\n
\n
- Global Suspend and Resume\n
- Remote Wakeup\n
- Low clock mode\n
#
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