?? project.map
字號:
PROGRAM "C:\Documents and Settings\luciano\Meus documentos\voga\bin\Project.abs"
*********************************************************************************************
TARGET SECTION
---------------------------------------------------------------------------------------------
Processor : Freescale RS08
Memory Model: SMALL
File Format : ELF\DWARF 2.0
Linker : SmartLinker V-5.0.34 Build 8120, Apr 30 2008
*********************************************************************************************
FILE SECTION
---------------------------------------------------------------------------------------------
RTSRS08.C.o (ansi.lib) Model: SMALL, Lang: ANSI-C
StartRS08.c.o Model: SMALL, Lang: ANSI-C
Cpu.c.o Model: SMALL, Lang: ANSI-C
IO_Map.c.o Model: SMALL, Lang: ANSI-C
le4.c.o Model: SMALL, Lang: ANSI-C
LCD1.c.o Model: SMALL, Lang: ANSI-C
AD1.c.o Model: SMALL, Lang: ANSI-C
RTI1.c.o Model: SMALL, Lang: ANSI-C
*********************************************************************************************
STARTUP SECTION
---------------------------------------------------------------------------------------------
Entry point: 0x3000 (_EntryPoint)
_startupData is allocated at 0x3078 and uses 5 Bytes
extern struct _tagStartup {
unsigned nofZeroOut 1
_Range pZeroOut 0x50 112
_Copy *toCopyDownBeg 0x3731
} _startupData;
*********************************************************************************************
SECTION-ALLOCATION SECTION
Section Name Size Type From To Segment
---------------------------------------------------------------------------------------------
RESERVED 5 N/I 0x0 0x4 RESERVED_RAM
.data 15 R/W 0x80 0x8E RAM
.text 1696 R 0x3081 0x3720 ROM
.abs_section_3ffc 1 R 0x3FFC 0x3FFC .absSeg0
.abs_section_3ffd 1 R 0x3FFD 0x3FFD .absSeg1
.abs_section_3ffe 2 R 0x3FFE 0x3FFF .absSeg2
.abs_section_10 1 N/I 0x10 0x10 .absSeg3
.abs_section_11 1 N/I 0x11 0x11 .absSeg4
.abs_section_16 1 N/I 0x16 0x16 .absSeg5
.abs_section_17 1 N/I 0x17 0x17 .absSeg6
.abs_section_18 1 N/I 0x18 0x18 .absSeg7
.abs_section_19 1 N/I 0x19 0x19 .absSeg8
.abs_section_1a 1 N/I 0x1A 0x1A .absSeg9
.abs_section_1b 1 N/I 0x1B 0x1B .absSeg10
.abs_section_1c 1 N/I 0x1C 0x1C .absSeg11
.abs_section_1d 1 N/I 0x1D 0x1D .absSeg12
.abs_section_1e 1 N/I 0x1E 0x1E .absSeg13
.abs_section_1f 1 N/I 0x1F 0x1F .absSeg14
.abs_section_20 1 N/I 0x20 0x20 .absSeg15
.abs_section_21 1 N/I 0x21 0x21 .absSeg16
.abs_section_22 1 N/I 0x22 0x22 .absSeg17
.abs_section_23 1 N/I 0x23 0x23 .absSeg18
.abs_section_24 1 N/I 0x24 0x24 .absSeg19
.abs_section_25 1 N/I 0x25 0x25 .absSeg20
.abs_section_26 1 N/I 0x26 0x26 .absSeg21
.abs_section_27 1 N/I 0x27 0x27 .absSeg22
.abs_section_28 1 N/I 0x28 0x28 .absSeg23
.abs_section_29 1 N/I 0x29 0x29 .absSeg24
.abs_section_2a 1 N/I 0x2A 0x2A .absSeg25
.abs_section_2b 1 N/I 0x2B 0x2B .absSeg26
.abs_section_2c 1 N/I 0x2C 0x2C .absSeg27
.abs_section_2d 1 N/I 0x2D 0x2D .absSeg28
.abs_section_2e 1 N/I 0x2E 0x2E .absSeg29
.abs_section_2f 1 N/I 0x2F 0x2F .absSeg30
.abs_section_30 1 N/I 0x30 0x30 .absSeg31
.abs_section_31 1 N/I 0x31 0x31 .absSeg32
.abs_section_32 1 N/I 0x32 0x32 .absSeg33
.abs_section_33 1 N/I 0x33 0x33 .absSeg34
.abs_section_34 1 N/I 0x34 0x34 .absSeg35
.abs_section_35 1 N/I 0x35 0x35 .absSeg36
.abs_section_40 1 N/I 0x40 0x40 .absSeg37
.abs_section_41 1 N/I 0x41 0x41 .absSeg38
.abs_section_42 1 N/I 0x42 0x42 .absSeg39
.abs_section_44 1 N/I 0x44 0x44 .absSeg40
.abs_section_45 1 N/I 0x45 0x45 .absSeg41
.abs_section_46 1 N/I 0x46 0x46 .absSeg42
.abs_section_47 1 N/I 0x47 0x47 .absSeg43
.abs_section_48 1 N/I 0x48 0x48 .absSeg44
.abs_section_49 1 N/I 0x49 0x49 .absSeg45
.abs_section_4a 1 N/I 0x4A 0x4A .absSeg46
.abs_section_4b 1 N/I 0x4B 0x4B .absSeg47
.abs_section_4c 1 N/I 0x4C 0x4C .absSeg48
.abs_section_4d 1 N/I 0x4D 0x4D .absSeg49
.abs_section_200 1 N/I 0x200 0x200 .absSeg50
.abs_section_201 1 N/I 0x201 0x201 .absSeg51
.abs_section_202 1 N/I 0x202 0x202 .absSeg52
.abs_section_203 1 N/I 0x203 0x203 .absSeg53
.abs_section_204 1 N/I 0x204 0x204 .absSeg54
.abs_section_205 1 N/I 0x205 0x205 .absSeg55
.abs_section_206 1 N/I 0x206 0x206 .absSeg56
.abs_section_207 1 N/I 0x207 0x207 .absSeg57
.abs_section_208 1 N/I 0x208 0x208 .absSeg58
.abs_section_209 1 N/I 0x209 0x209 .absSeg59
.abs_section_20a 1 N/I 0x20A 0x20A .absSeg60
.abs_section_20b 1 N/I 0x20B 0x20B .absSeg61
.abs_section_20c 1 N/I 0x20C 0x20C .absSeg62
.abs_section_20d 1 N/I 0x20D 0x20D .absSeg63
.abs_section_20e 1 N/I 0x20E 0x20E .absSeg64
.abs_section_20f 1 N/I 0x20F 0x20F .absSeg65
.abs_section_212 1 N/I 0x212 0x212 .absSeg66
.abs_section_213 1 N/I 0x213 0x213 .absSeg67
.abs_section_214 1 N/I 0x214 0x214 .absSeg68
.abs_section_215 1 N/I 0x215 0x215 .absSeg69
.abs_section_216 1 N/I 0x216 0x216 .absSeg70
.abs_section_217 1 N/I 0x217 0x217 .absSeg71
.abs_section_21c 1 N/I 0x21C 0x21C .absSeg72
.abs_section_21d 1 N/I 0x21D 0x21D .absSeg73
.abs_section_220 1 N/I 0x220 0x220 .absSeg74
.abs_section_225 1 N/I 0x225 0x225 .absSeg75
.abs_section_228 1 N/I 0x228 0x228 .absSeg76
.abs_section_22c 1 N/I 0x22C 0x22C .absSeg77
.abs_section_22d 1 N/I 0x22D 0x22D .absSeg78
.abs_section_22e 1 N/I 0x22E 0x22E .absSeg79
.abs_section_22f 1 N/I 0x22F 0x22F .absSeg80
.abs_section_230 1 N/I 0x230 0x230 .absSeg81
.abs_section_235 1 N/I 0x235 0x235 .absSeg82
.abs_section_238 1 N/I 0x238 0x238 .absSeg83
.abs_section_23c 1 N/I 0x23C 0x23C .absSeg84
.abs_section_23d 1 N/I 0x23D 0x23D .absSeg85
.abs_section_240 1 N/I 0x240 0x240 .absSeg86
.abs_section_241 1 N/I 0x241 0x241 .absSeg87
.abs_section_242 1 N/I 0x242 0x242 .absSeg88
.abs_section_248 1 N/I 0x248 0x248 .absSeg89
.abs_section_249 1 N/I 0x249 0x249 .absSeg90
.abs_section_24a 1 N/I 0x24A 0x24A .absSeg91
.abs_section_12 2 N/I 0x12 0x13 .absSeg92
.abs_section_14 2 N/I 0x14 0x15 .absSeg93
.abs_section_210 2 N/I 0x210 0x211 .absSeg94
.abs_section_21a 2 N/I 0x21A 0x21B .absSeg95
.abs_section_221 2 N/I 0x221 0x222 .absSeg96
.abs_section_223 2 N/I 0x223 0x224 .absSeg97
.abs_section_226 2 N/I 0x226 0x227 .absSeg98
.abs_section_229 2 N/I 0x229 0x22A .absSeg99
.abs_section_231 2 N/I 0x231 0x232 .absSeg100
.abs_section_233 2 N/I 0x233 0x234 .absSeg101
.abs_section_236 2 N/I 0x236 0x237 .absSeg102
.abs_section_239 2 N/I 0x239 0x23A .absSeg103
.bss 16 R/W 0x8F 0x9E RAM
.rodata 16 R 0x3721 0x3730 ROM
.startData 9 R 0x3078 0x3080 ROM
.init 120 R 0x3000 0x3077 ROM
.common 33 R/W 0x9F 0xBF RAM
.overlap 48 R/W 0x50 0x7F RAM
.copy 18 R 0x3731 0x3742 ROM
Summary of section sizes per section type:
READ_ONLY (R): 747 (dec: 1863)
READ_WRITE (R/W): 70 (dec: 112)
NO_INIT (N/I): 76 (dec: 118)
*********************************************************************************************
VECTOR-ALLOCATION SECTION
Address InitValue InitFunction
---------------------------------------------------------------------------------------------
*********************************************************************************************
OBJECT-ALLOCATION SECTION
Name Module Addr hSize dSize Ref Section RLIB
---------------------------------------------------------------------------------------------
MODULE: -- RTSRS08.C.o (ansi.lib) --
- PROCEDURES:
_FPADD 3081 41 65 1 .text
_BLSR 30C2 A 10 1 .text
_ILSR 30CC 1E 30 1 .text
_IMUL 30EA 3F 63 2 .text
_BDIVS 3129 56 86 1 .text
_BDIVU 317F 3 3 2 .text
_IDIVU 3182 65 101 4 .text
_LDIVU 31E7 10E 270 1 .text
- VARIABLES:
_U 0 1 1 40 RESERVED
_V 1 1 1 24 RESERVED
_W 2 1 1 31 RESERVED
_Y 3 1 1 45 RESERVED
_Z 4 1 1 49 RESERVED
__OVL_5__IMUL_temp.27 52 1 1 2 .overlap
__OVL_5__IMUL_8_rescue_A.28 51 1 1 3 .overlap
__OVL_5__IMUL_8_rescue_X.29 50 1 1 2 .overlap
__OVL_6__IDIVU_t1.36 51 1 1 3 .overlap
__OVL_6__IDIVU_t2.37 50 1 1 3 .overlap
__OVL_6__LDIVU_t.50 50 8 8 46 .overlap
MODULE: -- StartRS08.c.o --
- PROCEDURES:
_DoZeroOut 32F5 35 53 1 .text
_DoCopyDown 332A 39 57 1 .text
_Startup 3363 7 7 1 .text
- VARIABLES:
_startupData 3078 5 5 10 .startData
MODULE: -- Cpu.c.o --
- PROCEDURES:
_EntryPoint 3000 27 39 1 .init
PE_low_level_init 3027 51 81 1 .init
- VARIABLES:
NVOPT_INIT 3FFC 1 1 0 .abs_section_3ffc
JMPOpcode 3FFD 1 1 0 .abs_section_3ffd
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