?? vmware_vga.c
字號:
uint8_t *src; uint8_t col[4];# ifdef DIRECT_VRAM if (s->ds->dpy_fill) s->ds->dpy_fill(s->ds, x, y, w, h, c); else# endif { col[0] = c; col[1] = c >> 8; col[2] = c >> 16; col[3] = c >> 24; if (line --) { dst = fst; src = col; for (column = width; column > 0; column --) { *(dst ++) = *(src ++); if (src - col == bypp) src = col; } dst = fst; for (; line > 0; line --) { dst += bypl; memcpy(dst, fst, width); } } } vmsvga_update_rect_delayed(s, x, y, w, h);}#endifstruct vmsvga_cursor_definition_s { int width; int height; int id; int bpp; int hot_x; int hot_y; uint32_t mask[1024]; uint32_t image[1024];};#define SVGA_BITMAP_SIZE(w, h) ((((w) + 31) >> 5) * (h))#define SVGA_PIXMAP_SIZE(w, h, bpp) (((((w) * (bpp)) + 31) >> 5) * (h))#ifdef HW_MOUSE_ACCELstatic inline void vmsvga_cursor_define(struct vmsvga_state_s *s, struct vmsvga_cursor_definition_s *c){ int i; for (i = SVGA_BITMAP_SIZE(c->width, c->height) - 1; i >= 0; i --) c->mask[i] = ~c->mask[i]; if (s->ds->cursor_define) s->ds->cursor_define(c->width, c->height, c->bpp, c->hot_x, c->hot_y, (uint8_t *) c->image, (uint8_t *) c->mask);}#endifstatic inline int vmsvga_fifo_empty(struct vmsvga_state_s *s){ if (!s->config || !s->enable) return 1; return (s->cmd->next_cmd == s->cmd->stop);}static inline uint32_t vmsvga_fifo_read(struct vmsvga_state_s *s){ uint32_t cmd = s->fifo[s->cmd->stop >> 2]; s->cmd->stop += 4; if (s->cmd->stop >= s->cmd->max) s->cmd->stop = s->cmd->min; return cmd;}static void vmsvga_fifo_run(struct vmsvga_state_s *s){ uint32_t cmd, colour; int args = 0; int x, y, dx, dy, width, height; struct vmsvga_cursor_definition_s cursor; while (!vmsvga_fifo_empty(s)) switch (cmd = vmsvga_fifo_read(s)) { case SVGA_CMD_UPDATE: case SVGA_CMD_UPDATE_VERBOSE: x = vmsvga_fifo_read(s); y = vmsvga_fifo_read(s); width = vmsvga_fifo_read(s); height = vmsvga_fifo_read(s); vmsvga_update_rect_delayed(s, x, y, width, height); break; case SVGA_CMD_RECT_FILL: colour = vmsvga_fifo_read(s); x = vmsvga_fifo_read(s); y = vmsvga_fifo_read(s); width = vmsvga_fifo_read(s); height = vmsvga_fifo_read(s);#ifdef HW_FILL_ACCEL vmsvga_fill_rect(s, colour, x, y, width, height); break;#else goto badcmd;#endif case SVGA_CMD_RECT_COPY: x = vmsvga_fifo_read(s); y = vmsvga_fifo_read(s); dx = vmsvga_fifo_read(s); dy = vmsvga_fifo_read(s); width = vmsvga_fifo_read(s); height = vmsvga_fifo_read(s);#ifdef HW_RECT_ACCEL vmsvga_copy_rect(s, x, y, dx, dy, width, height); break;#else goto badcmd;#endif case SVGA_CMD_DEFINE_CURSOR: cursor.id = vmsvga_fifo_read(s); cursor.hot_x = vmsvga_fifo_read(s); cursor.hot_y = vmsvga_fifo_read(s); cursor.width = x = vmsvga_fifo_read(s); cursor.height = y = vmsvga_fifo_read(s); vmsvga_fifo_read(s); cursor.bpp = vmsvga_fifo_read(s); for (args = 0; args < SVGA_BITMAP_SIZE(x, y); args ++) cursor.mask[args] = vmsvga_fifo_read(s); for (args = 0; args < SVGA_PIXMAP_SIZE(x, y, cursor.bpp); args ++) cursor.image[args] = vmsvga_fifo_read(s);#ifdef HW_MOUSE_ACCEL vmsvga_cursor_define(s, &cursor); break;#else args = 0; goto badcmd;#endif /* * Other commands that we at least know the number of arguments * for so we can avoid FIFO desync if driver uses them illegally. */ case SVGA_CMD_DEFINE_ALPHA_CURSOR: vmsvga_fifo_read(s); vmsvga_fifo_read(s); vmsvga_fifo_read(s); x = vmsvga_fifo_read(s); y = vmsvga_fifo_read(s); args = x * y; goto badcmd; case SVGA_CMD_RECT_ROP_FILL: args = 6; goto badcmd; case SVGA_CMD_RECT_ROP_COPY: args = 7; goto badcmd; case SVGA_CMD_DRAW_GLYPH_CLIPPED: vmsvga_fifo_read(s); vmsvga_fifo_read(s); args = 7 + (vmsvga_fifo_read(s) >> 2); goto badcmd; case SVGA_CMD_SURFACE_ALPHA_BLEND: args = 12; goto badcmd; /* * Other commands that are not listed as depending on any * CAPABILITIES bits, but are not described in the README either. */ case SVGA_CMD_SURFACE_FILL: case SVGA_CMD_SURFACE_COPY: case SVGA_CMD_FRONT_ROP_FILL: case SVGA_CMD_FENCE: case SVGA_CMD_INVALID_CMD: break; /* Nop */ default: badcmd: while (args --) vmsvga_fifo_read(s); printf("%s: Unknown command 0x%02x in SVGA command FIFO\n", __FUNCTION__, cmd); break; } s->syncing = 0;}static uint32_t vmsvga_index_read(void *opaque, uint32_t address){ struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque; return s->index;}static void vmsvga_index_write(void *opaque, uint32_t address, uint32_t index){ struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque; s->index = index;}static uint32_t vmsvga_value_read(void *opaque, uint32_t address){ uint32_t caps; struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque; switch (s->index) { case SVGA_REG_ID: return s->svgaid; case SVGA_REG_ENABLE: return s->enable; case SVGA_REG_WIDTH: return s->width; case SVGA_REG_HEIGHT: return s->height; case SVGA_REG_MAX_WIDTH: return SVGA_MAX_WIDTH; case SVGA_REG_MAX_HEIGHT: return SVGA_MAX_HEIGHT; case SVGA_REG_DEPTH: return s->depth; case SVGA_REG_BITS_PER_PIXEL: return (s->depth + 7) & ~7; case SVGA_REG_PSEUDOCOLOR: return 0x0; case SVGA_REG_RED_MASK: return s->wred; case SVGA_REG_GREEN_MASK: return s->wgreen; case SVGA_REG_BLUE_MASK: return s->wblue; case SVGA_REG_BYTES_PER_LINE: return ((s->depth + 7) >> 3) * s->new_width; case SVGA_REG_FB_START: return SVGA_MEM_BASE; case SVGA_REG_FB_OFFSET: return 0x0; case SVGA_REG_VRAM_SIZE: return s->vram_size - SVGA_FIFO_SIZE; case SVGA_REG_FB_SIZE: return s->fb_size; case SVGA_REG_CAPABILITIES: caps = SVGA_CAP_NONE;#ifdef HW_RECT_ACCEL caps |= SVGA_CAP_RECT_COPY;#endif#ifdef HW_FILL_ACCEL caps |= SVGA_CAP_RECT_FILL;#endif#ifdef HW_MOUSE_ACCEL if (s->ds->mouse_set) caps |= SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 | SVGA_CAP_CURSOR_BYPASS;#endif return caps; case SVGA_REG_MEM_START: return SVGA_MEM_BASE + s->vram_size - SVGA_FIFO_SIZE; case SVGA_REG_MEM_SIZE: return SVGA_FIFO_SIZE; case SVGA_REG_CONFIG_DONE: return s->config; case SVGA_REG_SYNC: case SVGA_REG_BUSY: return s->syncing; case SVGA_REG_GUEST_ID: return s->guest; case SVGA_REG_CURSOR_ID: return s->cursor.id; case SVGA_REG_CURSOR_X: return s->cursor.x; case SVGA_REG_CURSOR_Y: return s->cursor.x; case SVGA_REG_CURSOR_ON: return s->cursor.on; case SVGA_REG_HOST_BITS_PER_PIXEL: return (s->depth + 7) & ~7; case SVGA_REG_SCRATCH_SIZE: return s->scratch_size; case SVGA_REG_MEM_REGS: case SVGA_REG_NUM_DISPLAYS: case SVGA_REG_PITCHLOCK: case SVGA_PALETTE_BASE ... SVGA_PALETTE_END: return 0; default: if (s->index >= SVGA_SCRATCH_BASE && s->index < SVGA_SCRATCH_BASE + s->scratch_size) return s->scratch[s->index - SVGA_SCRATCH_BASE]; printf("%s: Bad register %02x\n", __FUNCTION__, s->index); } return 0;}static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value){ struct vmsvga_state_s *s = (struct vmsvga_state_s *) opaque; switch (s->index) { case SVGA_REG_ID: if (value == SVGA_ID_2 || value == SVGA_ID_1 || value == SVGA_ID_0) s->svgaid = value; break; case SVGA_REG_ENABLE: s->enable = value; s->config &= !!value; s->width = -1; s->height = -1; s->invalidated = 1;#ifdef EMBED_STDVGA s->invalidate(opaque);#endif if (s->enable) s->fb_size = ((s->depth + 7) >> 3) * s->new_width * s->new_height; break; case SVGA_REG_WIDTH: s->new_width = value; s->invalidated = 1; break; case SVGA_REG_HEIGHT: s->new_height = value; s->invalidated = 1; break; case SVGA_REG_DEPTH: case SVGA_REG_BITS_PER_PIXEL: if (value != s->depth) { printf("%s: Bad colour depth: %i bits\n", __FUNCTION__, value); s->config = 0; } break; case SVGA_REG_CONFIG_DONE: if (value) { s->fifo = (uint32_t *) &s->vram[s->vram_size - SVGA_FIFO_SIZE]; /* Check range and alignment. */ if ((s->cmd->min | s->cmd->max | s->cmd->next_cmd | s->cmd->stop) & 3) break; if (s->cmd->min < (uint8_t *) s->cmd->fifo - (uint8_t *) s->fifo) break; if (s->cmd->max > SVGA_FIFO_SIZE) break; if (s->cmd->max < s->cmd->min + 10 * 1024) break; } s->config = !!value; break; case SVGA_REG_SYNC: s->syncing = 1; vmsvga_fifo_run(s); /* Or should we just wait for update_display? */ break; case SVGA_REG_GUEST_ID: s->guest = value;#ifdef VERBOSE if (value >= GUEST_OS_BASE && value < GUEST_OS_BASE + sizeof(vmsvga_guest_id) / sizeof(*vmsvga_guest_id)) printf("%s: guest runs %s.\n", __FUNCTION__, vmsvga_guest_id[value - GUEST_OS_BASE]);#endif break; case SVGA_REG_CURSOR_ID: s->cursor.id = value; break;
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