/* Loads values of tally counters from VM state file */static void RTL8139TallyCounters_load(QEMUFile* f, RTL8139TallyCounters *tally_counters){    qemu_get_be64s(f, &tally_counters->TxOk);    qemu_get_be64s(f, &tally_counters->RxOk);    qemu_get_be64s(f, &tally_counters->TxERR);    qemu_get_be32s(f, &tally_counters->RxERR);    qemu_get_be16s(f, &tally_counters->MissPkt);    qemu_get_be16s(f, &tally_counters->FAE);    qemu_get_be32s(f, &tally_counters->Tx1Col);    qemu_get_be32s(f, &tally_counters->TxMCol);    qemu_get_be64s(f, &tally_counters->RxOkPhy);    qemu_get_be64s(f, &tally_counters->RxOkBrd);    qemu_get_be32s(f, &tally_counters->RxOkMul);    qemu_get_be16s(f, &tally_counters->TxAbt);    qemu_get_be16s(f, &tally_counters->TxUndrn);}/* Saves values of tally counters to VM state file */static void RTL8139TallyCounters_save(QEMUFile* f, RTL8139TallyCounters *tally_counters){    qemu_put_be64s(f, &tally_counters->TxOk);    qemu_put_be64s(f, &tally_counters->RxOk);    qemu_put_be64s(f, &tally_counters->TxERR);    qemu_put_be32s(f, &tally_counters->RxERR);    qemu_put_be16s(f, &tally_counters->MissPkt);    qemu_put_be16s(f, &tally_counters->FAE);    qemu_put_be32s(f, &tally_counters->Tx1Col);    qemu_put_be32s(f, &tally_counters->TxMCol);    qemu_put_be64s(f, &tally_counters->RxOkPhy);    qemu_put_be64s(f, &tally_counters->RxOkBrd);    qemu_put_be32s(f, &tally_counters->RxOkMul);    qemu_put_be16s(f, &tally_counters->TxAbt);    qemu_put_be16s(f, &tally_counters->TxUndrn);}static void rtl8139_ChipCmd_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: ChipCmd write val=0x%08x\n", val));    if (val & CmdReset)    {        DEBUG_PRINT(("RTL8139: ChipCmd reset\n"));        rtl8139_reset(s);    }    if (val & CmdRxEnb)    {        DEBUG_PRINT(("RTL8139: ChipCmd enable receiver\n"));        s->currCPlusRxDesc = 0;    }    if (val & CmdTxEnb)    {        DEBUG_PRINT(("RTL8139: ChipCmd enable transmitter\n"));        s->currCPlusTxDesc = 0;    }    /* mask unwriteable bits */    val = SET_MASKED(val, 0xe3, s->bChipCmdState);    /* Deassert reset pin before next read */    val &= ~CmdReset;    s->bChipCmdState = val;}static int rtl8139_RxBufferEmpty(RTL8139State *s){    int unread = MOD2(s->RxBufferSize + s->RxBufAddr - s->RxBufPtr, s->RxBufferSize);    if (unread != 0)    {        DEBUG_PRINT(("RTL8139: receiver buffer data available 0x%04x\n", unread));        return 0;    }    DEBUG_PRINT(("RTL8139: receiver buffer is empty\n"));    return 1;}static uint32_t rtl8139_ChipCmd_read(RTL8139State *s){    uint32_t ret = s->bChipCmdState;    if (rtl8139_RxBufferEmpty(s))        ret |= RxBufEmpty;    DEBUG_PRINT(("RTL8139: ChipCmd read val=0x%04x\n", ret));    return ret;}static void rtl8139_CpCmd_write(RTL8139State *s, uint32_t val){    val &= 0xffff;    DEBUG_PRINT(("RTL8139C+ command register write(w) val=0x%04x\n", val));    /* mask unwriteable bits */    val = SET_MASKED(val, 0xff84, s->CpCmd);    s->CpCmd = val;}static uint32_t rtl8139_CpCmd_read(RTL8139State *s){    uint32_t ret = s->CpCmd;    DEBUG_PRINT(("RTL8139C+ command register read(w) val=0x%04x\n", ret));    return ret;}static void rtl8139_IntrMitigate_write(RTL8139State *s, uint32_t val){    DEBUG_PRINT(("RTL8139C+ IntrMitigate register write(w) val=0x%04x\n", val));}static uint32_t rtl8139_IntrMitigate_read(RTL8139State *s){    uint32_t ret = 0;    DEBUG_PRINT(("RTL8139C+ IntrMitigate register read(w) val=0x%04x\n", ret));    return ret;}static int rtl8139_config_writeable(RTL8139State *s){    if (s->Cfg9346 & Cfg9346_Unlock)    {        return 1;    }    DEBUG_PRINT(("RTL8139: Configuration registers are write-protected\n"));    return 0;}static void rtl8139_BasicModeCtrl_write(RTL8139State *s, uint32_t val){    val &= 0xffff;    DEBUG_PRINT(("RTL8139: BasicModeCtrl register write(w) val=0x%04x\n", val));    /* mask unwriteable bits */    uint32_t mask = 0x4cff;    if (1 || !rtl8139_config_writeable(s))    {        /* Speed setting and autonegotiation enable bits are read-only */        mask |= 0x3000;        /* Duplex mode setting is read-only */        mask |= 0x0100;    }    val = SET_MASKED(val, mask, s->BasicModeCtrl);    s->BasicModeCtrl = val;}static uint32_t rtl8139_BasicModeCtrl_read(RTL8139State *s){    uint32_t ret = s->BasicModeCtrl;    DEBUG_PRINT(("RTL8139: BasicModeCtrl register read(w) val=0x%04x\n", ret));    return ret;}static void rtl8139_BasicModeStatus_write(RTL8139State *s, uint32_t val){    val &= 0xffff;    DEBUG_PRINT(("RTL8139: BasicModeStatus register write(w) val=0x%04x\n", val));    /* mask unwriteable bits */    val = SET_MASKED(val, 0xff3f, s->BasicModeStatus);    s->BasicModeStatus = val;}static uint32_t rtl8139_BasicModeStatus_read(RTL8139State *s){    uint32_t ret = s->BasicModeStatus;    DEBUG_PRINT(("RTL8139: BasicModeStatus register read(w) val=0x%04x\n", ret));    return ret;}static void rtl8139_Cfg9346_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: Cfg9346 write val=0x%02x\n", val));    /* mask unwriteable bits */    val = SET_MASKED(val, 0x31, s->Cfg9346);    uint32_t opmode = val & 0xc0;    uint32_t eeprom_val = val & 0xf;    if (opmode == 0x80) {        /* eeprom access */        int eecs = (eeprom_val & 0x08)?1:0;        int eesk = (eeprom_val & 0x04)?1:0;        int eedi = (eeprom_val & 0x02)?1:0;        prom9346_set_wire(s, eecs, eesk, eedi);    } else if (opmode == 0x40) {        /* Reset.  */        val = 0;        rtl8139_reset(s);    }    s->Cfg9346 = val;}static uint32_t rtl8139_Cfg9346_read(RTL8139State *s){    uint32_t ret = s->Cfg9346;    uint32_t opmode = ret & 0xc0;    if (opmode == 0x80)    {        /* eeprom access */        int eedo = prom9346_get_wire(s);        if (eedo)        {            ret |=  0x01;        }        else        {            ret &= ~0x01;        }    }    DEBUG_PRINT(("RTL8139: Cfg9346 read val=0x%02x\n", ret));    return ret;}static void rtl8139_Config0_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: Config0 write val=0x%02x\n", val));    if (!rtl8139_config_writeable(s))        return;    /* mask unwriteable bits */    val = SET_MASKED(val, 0xf8, s->Config0);    s->Config0 = val;}static uint32_t rtl8139_Config0_read(RTL8139State *s){    uint32_t ret = s->Config0;    DEBUG_PRINT(("RTL8139: Config0 read val=0x%02x\n", ret));    return ret;}static void rtl8139_Config1_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: Config1 write val=0x%02x\n", val));    if (!rtl8139_config_writeable(s))        return;    /* mask unwriteable bits */    val = SET_MASKED(val, 0xC, s->Config1);    s->Config1 = val;}static uint32_t rtl8139_Config1_read(RTL8139State *s){    uint32_t ret = s->Config1;    DEBUG_PRINT(("RTL8139: Config1 read val=0x%02x\n", ret));    return ret;}static void rtl8139_Config3_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: Config3 write val=0x%02x\n", val));    if (!rtl8139_config_writeable(s))        return;    /* mask unwriteable bits */    val = SET_MASKED(val, 0x8F, s->Config3);    s->Config3 = val;}static uint32_t rtl8139_Config3_read(RTL8139State *s){    uint32_t ret = s->Config3;    DEBUG_PRINT(("RTL8139: Config3 read val=0x%02x\n", ret));    return ret;}static void rtl8139_Config4_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: Config4 write val=0x%02x\n", val));    if (!rtl8139_config_writeable(s))        return;    /* mask unwriteable bits */    val = SET_MASKED(val, 0x0a, s->Config4);    s->Config4 = val;}static uint32_t rtl8139_Config4_read(RTL8139State *s){    uint32_t ret = s->Config4;    DEBUG_PRINT(("RTL8139: Config4 read val=0x%02x\n", ret));    return ret;}static void rtl8139_Config5_write(RTL8139State *s, uint32_t val){    val &= 0xff;    DEBUG_PRINT(("RTL8139: Config5 write val=0x%02x\n", val));    /* mask unwriteable bits */    val = SET_MASKED(val, 0x80, s->Config5);    s->Config5 = val;}static uint32_t rtl8139_Config5_read(RTL8139State *s){    uint32_t ret = s->Config5;    DEBUG_PRINT(("RTL8139: Config5 read val=0x%02x\n", ret));    return ret;}static void rtl8139_TxConfig_write(RTL8139State *s, uint32_t val){    if (!rtl8139_transmitter_enabled(s))    {        DEBUG_PRINT(("RTL8139: transmitter disabled; no TxConfig write val=0x%08x\n", val));        return;    }    DEBUG_PRINT(("RTL8139: TxConfig write val=0x%08x\n", val));    val = SET_MASKED(val, TxVersionMask | 0x8070f80f, s->TxConfig);    s->TxConfig = val;}static void rtl8139_TxConfig_writeb(RTL8139State *s, uint32_t val){    DEBUG_PRINT(("RTL8139C TxConfig via write(b) val=0x%02x\n", val));    uint32_t tc = s->TxConfig;    tc &= 0xFFFFFF00;    tc |= (val & 0x000000FF);    rtl8139_TxConfig_write(s, tc);}static uint32_t rtl8139_TxConfig_read(RTL8139State *s){    uint32_t ret = s->TxConfig;    DEBUG_PRINT(("RTL8139: TxConfig read val=0x%04x\n", ret));    return ret;}static void rtl8139_RxConfig_write(RTL8139State *s, uint32_t val){    DEBUG_PRINT(("RTL8139: RxConfig write val=0x%08x\n", val));    /* mask unwriteable bits */    val = SET_MASKED(val, 0xf0fc0040, s->RxConfig);    s->RxConfig = val;    /* reset buffer size and read/write pointers */    rtl8139_reset_rxring(s, 8192 << ((s->RxConfig >> 11) & 0x3));    DEBUG_PRINT(("RTL8139: RxConfig write reset buffer size to %d\n", s->RxBufferSize));}static uint32_t rtl8139_RxConfig_read(RTL8139State *s){    uint32_t ret = s->RxConfig;    DEBUG_PRINT(("RTL8139: RxConfig read val=0x%08x\n", ret));    return ret;}static void rtl8139_transfer_frame(RTL8139State *s, const uint8_t *buf, int size, int do_interrupt){    if (!size)    {        DEBUG_PRINT(("RTL8139: +++ empty ethernet frame\n"));        return;    }    if (TxLoopBack == (s->TxConfig & TxLoopBack))    {        DEBUG_PRINT(("RTL8139: +++ transmit loopback mode\n"));        rtl8139_do_receive(s, buf, size, do_interrupt);    }    else    {        qemu_send_packet(s->vc, buf, size);    }}