static struct clk usb_clk0 = {	/* 6 MHz output on W4_USB_CLK0 */    .name	= "usb_clk0",    .alias	= "usb.clko",    /* Direct from ULPD, no parent */    .rate	= 6000000,    .flags	= CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,};static struct clk usb_hhc_ck1510 = {    .name	= "usb_hhc_ck",    /* Direct from ULPD, no parent */    .rate	= 48000000, /* Actually 2 clocks, 12MHz and 48MHz */    .flags	= CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,};static struct clk usb_hhc_ck16xx = {    .name	= "usb_hhc_ck",    /* Direct from ULPD, no parent */    .rate	= 48000000,    /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */    .flags	= CLOCK_IN_OMAP16XX,};static struct clk usb_w2fc_mclk = {    .name	= "usb_w2fc_mclk",    .alias	= "usb_w2fc_ck",    .parent	= &ck_48m,    .rate	= 48000000,    .flags	= CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,};static struct clk mclk_1510 = {    .name	= "mclk",    /* Direct from ULPD, no parent. May be enabled by ext hardware. */    .rate	= 12000000,    .flags	= CLOCK_IN_OMAP1510,};static struct clk bclk_310 = {    .name	= "bt_mclk_out",	/* Alias midi_mclk_out? */    .parent	= &armper_ck,    .flags	= CLOCK_IN_OMAP310,};static struct clk mclk_310 = {    .name	= "com_mclk_out",    .parent	= &armper_ck,    .flags	= CLOCK_IN_OMAP310,};static struct clk mclk_16xx = {    .name	= "mclk",    /* Direct from ULPD, no parent. May be enabled by ext hardware. */    .flags	= CLOCK_IN_OMAP16XX,};static struct clk bclk_1510 = {    .name	= "bclk",    /* Direct from ULPD, no parent. May be enabled by ext hardware. */    .rate	= 12000000,    .flags	= CLOCK_IN_OMAP1510,};static struct clk bclk_16xx = {    .name	= "bclk",    /* Direct from ULPD, no parent. May be enabled by ext hardware. */    .flags	= CLOCK_IN_OMAP16XX,};static struct clk mmc1_ck = {    .name	= "mmc_ck",    .id		= 1,    /* Functional clock is direct from ULPD, interface clock is ARMPER */    .parent	= &armper_ck,	/* either armper_ck or dpll4 */    .rate	= 48000000,    .flags	= CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,};static struct clk mmc2_ck = {    .name	= "mmc_ck",    .id		= 2,    /* Functional clock is direct from ULPD, interface clock is ARMPER */    .parent	= &armper_ck,    .rate	= 48000000,    .flags	= CLOCK_IN_OMAP16XX,};static struct clk cam_mclk = {    .name	= "cam.mclk",    .flags	= CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,    .rate	= 12000000,};static struct clk cam_exclk = {    .name	= "cam.exclk",    .flags	= CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,    /* Either 12M from cam.mclk or 48M from dpll4 */    .parent	= &cam_mclk,};static struct clk cam_lclk = {    .name	= "cam.lclk",    .flags	= CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,};static struct clk i2c_fck = {    .name	= "i2c_fck",    .id		= 1,    .flags	= CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |            ALWAYS_ENABLED,    .parent	= &armxor_ck,};static struct clk i2c_ick = {    .name	= "i2c_ick",    .id		= 1,    .flags	= CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,    .parent	= &armper_ck,};static struct clk clk32k = {    .name	= "clk32-kHz",    .flags	= CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |            ALWAYS_ENABLED,    .parent     = &xtal_osc32k,};static struct clk *onchip_clks[] = {    /* non-ULPD clocks */    &xtal_osc12m,    &xtal_osc32k,    &ck_ref,    &dpll1,    &dpll2,    &dpll3,    &dpll4,    &apll,    &ck_48m,    /* CK_GEN1 clocks */    &clkm1,    &ck_dpll1out,    &sossi_ck,    &arm_ck,    &armper_ck,    &arm_gpio_ck,    &armxor_ck,    &armtim_ck,    &armwdt_ck,    &arminth_ck15xx,  &arminth_ck16xx,    /* CK_GEN2 clocks */    &clkm2,    &dsp_ck,    &dspmmu_ck,    &dspper_ck,    &dspxor_ck,    &dsptim_ck,    /* CK_GEN3 clocks */    &clkm3,    &tc_ck,    &tipb_ck,    &l3_ocpi_ck,    &tc1_ck,    &tc2_ck,    &dma_ck,    &dma_lcdfree_ck,    &api_ck,    &lb_ck,    &lbfree_ck,    &hsab_ck,    &rhea1_ck,    &rhea2_ck,    &lcd_ck_16xx,    &lcd_ck_1510,    /* ULPD clocks */    &uart1_1510,    &uart1_16xx,    &uart2_ck,    &uart3_1510,    &uart3_16xx,    &usb_clk0,    &usb_hhc_ck1510, &usb_hhc_ck16xx,    &mclk_1510,  &mclk_16xx, &mclk_310,    &bclk_1510,  &bclk_16xx, &bclk_310,    &mmc1_ck,    &mmc2_ck,    &cam_mclk,    &cam_exclk,    &cam_lclk,    &clk32k,    &usb_w2fc_mclk,    /* Virtual clocks */    &i2c_fck,    &i2c_ick,    0};void omap_clk_adduser(struct clk *clk, qemu_irq user){    qemu_irq *i;    for (i = clk->users; *i; i ++);    *i = user;}/* If a clock is allowed to idle, it is disabled automatically when * all of clock domains using it are disabled.  */int omap_clk_is_idle(struct clk *clk){    struct clk *chld;    if (!clk->enabled && (!clk->usecount || !(clk->flags && ALWAYS_ENABLED)))        return 1;    if (clk->usecount)        return 0;    for (chld = clk->child1; chld; chld = chld->sibling)        if (!omap_clk_is_idle(chld))            return 0;    return 1;}struct clk *omap_findclk(struct omap_mpu_state_s *mpu, const char *name){    struct clk *i;    for (i = mpu->clks; i->name; i ++)        if (!strcmp(i->name, name) || (i->alias && !strcmp(i->alias, name)))            return i;    cpu_abort(mpu->env, "%s: %s not found\n", __FUNCTION__, name);}void omap_clk_get(struct clk *clk){    clk->usecount ++;}void omap_clk_put(struct clk *clk){    if (!(clk->usecount --))        cpu_abort(cpu_single_env, "%s: %s is not in use\n",                        __FUNCTION__, clk->name);}static void omap_clk_update(struct clk *clk){    int parent, running;    qemu_irq *user;    struct clk *i;    if (clk->parent)        parent = clk->parent->running;    else        parent = 1;    running = parent && (clk->enabled ||                    ((clk->flags & ALWAYS_ENABLED) && clk->usecount));    if (clk->running != running) {        clk->running = running;        for (user = clk->users; *user; user ++)            qemu_set_irq(*user, running);        for (i = clk->child1; i; i = i->sibling)            omap_clk_update(i);    }}static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate,                unsigned long int div, unsigned long int mult){    struct clk *i;    qemu_irq *user;    clk->rate = muldiv64(rate, mult, div);    if (clk->running)        for (user = clk->users; *user; user ++)            qemu_irq_raise(*user);    for (i = clk->child1; i; i = i->sibling)        omap_clk_rate_update_full(i, rate,                        div * i->divisor, mult * i->multiplier);}static void omap_clk_rate_update(struct clk *clk){    struct clk *i;    unsigned long int div, mult = div = 1;    for (i = clk; i->parent; i = i->parent) {        div *= i->divisor;        mult *= i->multiplier;    }    omap_clk_rate_update_full(clk, i->rate, div, mult);}void omap_clk_reparent(struct clk *clk, struct clk *parent){    struct clk **p;    if (clk->parent) {        for (p = &clk->parent->child1; *p != clk; p = &(*p)->sibling);        *p = clk->sibling;    }    clk->parent = parent;    if (parent) {        clk->sibling = parent->child1;        parent->child1 = clk;        omap_clk_update(clk);        omap_clk_rate_update(clk);    } else        clk->sibling = 0;}void omap_clk_onoff(struct clk *clk, int on){    clk->enabled = on;    omap_clk_update(clk);}void omap_clk_canidle(struct clk *clk, int can){    if (can)        omap_clk_put(clk);    else        omap_clk_get(clk);}void omap_clk_setrate(struct clk *clk, int divide, int multiply){    clk->divisor = divide;    clk->multiplier = multiply;    omap_clk_rate_update(clk);}int64_t omap_clk_getrate(omap_clk clk){    return clk->rate;}void omap_clk_init(struct omap_mpu_state_s *mpu){    struct clk **i, *j, *k;    int count;    int flag;    if (cpu_is_omap310(mpu))        flag = CLOCK_IN_OMAP310;    else if (cpu_is_omap1510(mpu))        flag = CLOCK_IN_OMAP1510;    else        return;    for (i = onchip_clks, count = 0; *i; i ++)        if ((*i)->flags & flag)            count ++;    mpu->clks = (struct clk *) qemu_mallocz(sizeof(struct clk) * (count + 1));    for (i = onchip_clks, j = mpu->clks; *i; i ++)        if ((*i)->flags & flag) {            memcpy(j, *i, sizeof(struct clk));            for (k = mpu->clks; k < j; k ++)                if (j->parent && !strcmp(j->parent->name, k->name)) {                    j->parent = k;                    j->sibling = k->child1;                    k->child1 = j;                } else if (k->parent && !strcmp(k->parent->name, j->name)) {                    k->parent = j;                    k->sibling = j->child1;                    j->child1 = k;                }            j->divisor = j->divisor ?: 1;            j->multiplier = j->multiplier ?: 1;            j ++;        }    for (j = mpu->clks; count --; j ++) {        omap_clk_update(j);        omap_clk_rate_update(j);    }}