?? translate.c
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gen_op_load_gpr_T1(rA(ctx->opcode)); goto do_mask; } gen_op_load_gpr_T0(rS(ctx->opcode)); gen_op_load_gpr_T1(rA(ctx->opcode)); gen_op_rotli32_T0(SH(ctx->opcode)); do_mask:#if defined(TARGET_PPC64) mb += 32; me += 32;#endif mask = MASK(mb, me); gen_op_andi_T0(mask); gen_op_andi_T1(~mask); gen_op_or(); do_store: gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}/* rlwinm & rlwinm. */GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER){ uint32_t mb, me, sh; sh = SH(ctx->opcode); mb = MB(ctx->opcode); me = ME(ctx->opcode); gen_op_load_gpr_T0(rS(ctx->opcode)); if (likely(sh == 0)) { goto do_mask; } if (likely(mb == 0)) { if (likely(me == 31)) { gen_op_rotli32_T0(sh); goto do_store; } else if (likely(me == (31 - sh))) { gen_op_sli_T0(sh); goto do_store; } } else if (likely(me == 31)) { if (likely(sh == (32 - mb))) { gen_op_srli_T0(mb); goto do_store; } } gen_op_rotli32_T0(sh); do_mask:#if defined(TARGET_PPC64) mb += 32; me += 32;#endif gen_op_andi_T0(MASK(mb, me)); do_store: gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}/* rlwnm & rlwnm. */GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER){ uint32_t mb, me; mb = MB(ctx->opcode); me = ME(ctx->opcode); gen_op_load_gpr_T0(rS(ctx->opcode)); gen_op_load_gpr_T1(rB(ctx->opcode)); gen_op_rotl32_T0_T1(); if (unlikely(mb != 0 || me != 31)) {#if defined(TARGET_PPC64) mb += 32; me += 32;#endif gen_op_andi_T0(MASK(mb, me)); } gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}#if defined(TARGET_PPC64)#define GEN_PPC64_R2(name, opc1, opc2) \GEN_HANDLER2(name##0, stringify(name), opc1, opc2, 0xFF, 0x00000000, PPC_64B) \{ \ gen_##name(ctx, 0); \} \GEN_HANDLER2(name##1, stringify(name), opc1, opc2 | 0x10, 0xFF, 0x00000000, \ PPC_64B) \{ \ gen_##name(ctx, 1); \}#define GEN_PPC64_R4(name, opc1, opc2) \GEN_HANDLER2(name##0, stringify(name), opc1, opc2, 0xFF, 0x00000000, PPC_64B) \{ \ gen_##name(ctx, 0, 0); \} \GEN_HANDLER2(name##1, stringify(name), opc1, opc2 | 0x01, 0xFF, 0x00000000, \ PPC_64B) \{ \ gen_##name(ctx, 0, 1); \} \GEN_HANDLER2(name##2, stringify(name), opc1, opc2 | 0x10, 0xFF, 0x00000000, \ PPC_64B) \{ \ gen_##name(ctx, 1, 0); \} \GEN_HANDLER2(name##3, stringify(name), opc1, opc2 | 0x11, 0xFF, 0x00000000, \ PPC_64B) \{ \ gen_##name(ctx, 1, 1); \}static always_inline void gen_andi_T0_64 (DisasContext *ctx, uint64_t mask){ if (mask >> 32) gen_op_andi_T0_64(mask >> 32, mask & 0xFFFFFFFF); else gen_op_andi_T0(mask);}static always_inline void gen_andi_T1_64 (DisasContext *ctx, uint64_t mask){ if (mask >> 32) gen_op_andi_T1_64(mask >> 32, mask & 0xFFFFFFFF); else gen_op_andi_T1(mask);}static always_inline void gen_rldinm (DisasContext *ctx, uint32_t mb, uint32_t me, uint32_t sh){ gen_op_load_gpr_T0(rS(ctx->opcode)); if (likely(sh == 0)) { goto do_mask; } if (likely(mb == 0)) { if (likely(me == 63)) { gen_op_rotli64_T0(sh); goto do_store; } else if (likely(me == (63 - sh))) { gen_op_sli_T0(sh); goto do_store; } } else if (likely(me == 63)) { if (likely(sh == (64 - mb))) { gen_op_srli_T0_64(mb); goto do_store; } } gen_op_rotli64_T0(sh); do_mask: gen_andi_T0_64(ctx, MASK(mb, me)); do_store: gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}/* rldicl - rldicl. */static always_inline void gen_rldicl (DisasContext *ctx, int mbn, int shn){ uint32_t sh, mb; sh = SH(ctx->opcode) | (shn << 5); mb = MB(ctx->opcode) | (mbn << 5); gen_rldinm(ctx, mb, 63, sh);}GEN_PPC64_R4(rldicl, 0x1E, 0x00);/* rldicr - rldicr. */static always_inline void gen_rldicr (DisasContext *ctx, int men, int shn){ uint32_t sh, me; sh = SH(ctx->opcode) | (shn << 5); me = MB(ctx->opcode) | (men << 5); gen_rldinm(ctx, 0, me, sh);}GEN_PPC64_R4(rldicr, 0x1E, 0x02);/* rldic - rldic. */static always_inline void gen_rldic (DisasContext *ctx, int mbn, int shn){ uint32_t sh, mb; sh = SH(ctx->opcode) | (shn << 5); mb = MB(ctx->opcode) | (mbn << 5); gen_rldinm(ctx, mb, 63 - sh, sh);}GEN_PPC64_R4(rldic, 0x1E, 0x04);static always_inline void gen_rldnm (DisasContext *ctx, uint32_t mb, uint32_t me){ gen_op_load_gpr_T0(rS(ctx->opcode)); gen_op_load_gpr_T1(rB(ctx->opcode)); gen_op_rotl64_T0_T1(); if (unlikely(mb != 0 || me != 63)) { gen_andi_T0_64(ctx, MASK(mb, me)); } gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}/* rldcl - rldcl. */static always_inline void gen_rldcl (DisasContext *ctx, int mbn){ uint32_t mb; mb = MB(ctx->opcode) | (mbn << 5); gen_rldnm(ctx, mb, 63);}GEN_PPC64_R2(rldcl, 0x1E, 0x08);/* rldcr - rldcr. */static always_inline void gen_rldcr (DisasContext *ctx, int men){ uint32_t me; me = MB(ctx->opcode) | (men << 5); gen_rldnm(ctx, 0, me);}GEN_PPC64_R2(rldcr, 0x1E, 0x09);/* rldimi - rldimi. */static always_inline void gen_rldimi (DisasContext *ctx, int mbn, int shn){ uint64_t mask; uint32_t sh, mb, me; sh = SH(ctx->opcode) | (shn << 5); mb = MB(ctx->opcode) | (mbn << 5); me = 63 - sh; if (likely(sh == 0)) { if (likely(mb == 0)) { gen_op_load_gpr_T0(rS(ctx->opcode)); goto do_store; } gen_op_load_gpr_T0(rS(ctx->opcode)); gen_op_load_gpr_T1(rA(ctx->opcode)); goto do_mask; } gen_op_load_gpr_T0(rS(ctx->opcode)); gen_op_load_gpr_T1(rA(ctx->opcode)); gen_op_rotli64_T0(sh); do_mask: mask = MASK(mb, me); gen_andi_T0_64(ctx, mask); gen_andi_T1_64(ctx, ~mask); gen_op_or(); do_store: gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}GEN_PPC64_R4(rldimi, 0x1E, 0x06);#endif/*** Integer shift ***//* slw & slw. */__GEN_LOGICAL2(slw, 0x18, 0x00, PPC_INTEGER);/* sraw & sraw. */__GEN_LOGICAL2(sraw, 0x18, 0x18, PPC_INTEGER);/* srawi & srawi. */GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER){ int mb, me; gen_op_load_gpr_T0(rS(ctx->opcode)); if (SH(ctx->opcode) != 0) { gen_op_move_T1_T0(); mb = 32 - SH(ctx->opcode); me = 31;#if defined(TARGET_PPC64) mb += 32; me += 32;#endif gen_op_srawi(SH(ctx->opcode), MASK(mb, me)); } gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}/* srw & srw. */__GEN_LOGICAL2(srw, 0x18, 0x10, PPC_INTEGER);#if defined(TARGET_PPC64)/* sld & sld. */__GEN_LOGICAL2(sld, 0x1B, 0x00, PPC_64B);/* srad & srad. */__GEN_LOGICAL2(srad, 0x1A, 0x18, PPC_64B);/* sradi & sradi. */static always_inline void gen_sradi (DisasContext *ctx, int n){ uint64_t mask; int sh, mb, me; gen_op_load_gpr_T0(rS(ctx->opcode)); sh = SH(ctx->opcode) + (n << 5); if (sh != 0) { gen_op_move_T1_T0(); mb = 64 - SH(ctx->opcode); me = 63; mask = MASK(mb, me); gen_op_sradi(sh, mask >> 32, mask); } gen_op_store_T0_gpr(rA(ctx->opcode)); if (unlikely(Rc(ctx->opcode) != 0)) gen_set_Rc0(ctx);}GEN_HANDLER2(sradi0, "sradi", 0x1F, 0x1A, 0x19, 0x00000000, PPC_64B){ gen_sradi(ctx, 0);}GEN_HANDLER2(sradi1, "sradi", 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B){ gen_sradi(ctx, 1);}/* srd & srd. */__GEN_LOGICAL2(srd, 0x1B, 0x10, PPC_64B);#endif/*** Floating-Point arithmetic ***/#define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type) \GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type) \{ \ if (unlikely(!ctx->fpu_enabled)) { \ GEN_EXCP_NO_FP(ctx); \ return; \ } \ gen_op_load_fpr_FT0(rA(ctx->opcode)); \ gen_op_load_fpr_FT1(rC(ctx->opcode)); \ gen_op_load_fpr_FT2(rB(ctx->opcode)); \ gen_reset_fpstatus(); \ gen_op_f##op(); \ if (isfloat) { \ gen_op_frsp(); \ } \ gen_op_store_FT0_fpr(rD(ctx->opcode)); \ gen_compute_fprf(set_fprf, Rc(ctx->opcode) != 0); \}#define GEN_FLOAT_ACB(name, op2, set_fprf, type) \_GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, set_fprf, type); \_GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type);#define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type) \{ \ if (unlikely(!ctx->fpu_enabled)) { \ GEN_EXCP_NO_FP(ctx); \ return; \ } \ ?? 快捷鍵說明
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