{"rbf",     0x3b30, 0xc0c0,		  "S",	     0, SIZE_NONE,   cris_ver_v10,   cris_not_implemented_op},  {"rfe",     0x2930, 0xD6CF,		  "",	     0, SIZE_NONE,   cris_ver_v32p,   cris_not_implemented_op},  {"rfg",     0x4930, 0xB6CF,		  "",	     0, SIZE_NONE,   cris_ver_v32p,   cris_not_implemented_op},  {"rfn",     0x5930, 0xA6CF,		  "",	     0, SIZE_NONE,   cris_ver_v32p,   cris_not_implemented_op},  {"ret",     0xB67F, 0x4980,		  "",	     1, SIZE_NONE,   cris_ver_v0_10,   cris_reg_mode_move_from_preg_op},  {"ret",     0xB9F0, 0x460F,		  "",	     1, SIZE_NONE,   cris_ver_v32p,   cris_reg_mode_move_from_preg_op},  {"retb",    0xe67f, 0x1980,		  "",	     1, SIZE_NONE,   cris_ver_v0_10,   cris_reg_mode_move_from_preg_op},  {"rete",     0xA9F0, 0x560F,		  "",	     1, SIZE_NONE,   cris_ver_v32p,   cris_reg_mode_move_from_preg_op},  {"reti",    0xA67F, 0x5980,		  "",	     1, SIZE_NONE,   cris_ver_v0_10,   cris_reg_mode_move_from_preg_op},  {"retn",     0xC9F0, 0x360F,		  "",	     1, SIZE_NONE,   cris_ver_v32p,   cris_reg_mode_move_from_preg_op},  {"sbfs",    0x3b70, 0xc080,		  "y",	     0, SIZE_NONE,   cris_ver_v10,   cris_not_implemented_op},  {"sbfs",    0x3b70, 0xc080,		  "S",	     0, SIZE_NONE,   cris_ver_v10,   cris_not_implemented_op},  {"sa",   0x0530+CC_A*0x1000,   0x0AC0+(0xf-CC_A)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"ssb",   0x0530+CC_EXT*0x1000,   0x0AC0+(0xf-CC_EXT)*0x1000,		  "r",	     0, SIZE_NONE,   cris_ver_v32p,   cris_scc_op},  {"scc",   0x0530+CC_CC*0x1000,   0x0AC0+(0xf-CC_CC)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"scs",   0x0530+CC_CS*0x1000,   0x0AC0+(0xf-CC_CS)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"seq",   0x0530+CC_EQ*0x1000,   0x0AC0+(0xf-CC_EQ)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"setf",    0x05b0, 0x0A40,		  "f",	     0, SIZE_NONE,     0,   cris_ax_ei_setf_op},  {"sfe",    0x3930, 0xC6CF,		  "",	     0, SIZE_NONE,   cris_ver_v32p,   cris_not_implemented_op},  /* Need to have "swf" in front of "sext" so it is the one displayed in     disassembly.  */  {"swf",   0x0530+CC_EXT*0x1000,   0x0AC0+(0xf-CC_EXT)*0x1000,		  "r",	     0, SIZE_NONE,   cris_ver_v10,   cris_scc_op},  {"sext",   0x0530+CC_EXT*0x1000,   0x0AC0+(0xf-CC_EXT)*0x1000,		  "r",	     0, SIZE_NONE,   cris_ver_v0_3,   cris_scc_op},  {"sge",   0x0530+CC_GE*0x1000,   0x0AC0+(0xf-CC_GE)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"sgt",   0x0530+CC_GT*0x1000,   0x0AC0+(0xf-CC_GT)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"shi",   0x0530+CC_HI*0x1000,   0x0AC0+(0xf-CC_HI)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"shs",   0x0530+CC_HS*0x1000,   0x0AC0+(0xf-CC_HS)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"sle",   0x0530+CC_LE*0x1000,   0x0AC0+(0xf-CC_LE)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"slo",   0x0530+CC_LO*0x1000,   0x0AC0+(0xf-CC_LO)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"sls",   0x0530+CC_LS*0x1000,   0x0AC0+(0xf-CC_LS)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"slt",   0x0530+CC_LT*0x1000,   0x0AC0+(0xf-CC_LT)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"smi",   0x0530+CC_MI*0x1000,   0x0AC0+(0xf-CC_MI)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"sne",   0x0530+CC_NE*0x1000,   0x0AC0+(0xf-CC_NE)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"spl",   0x0530+CC_PL*0x1000,   0x0AC0+(0xf-CC_PL)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"sub",     0x0680, 0x0940,		  "m r,R",   0, SIZE_NONE,     0,   cris_reg_mode_add_sub_cmp_and_or_move_op},  {"sub",     0x0a80, 0x0140,		  "m s,R",   0, SIZE_FIELD,    0,   cris_none_reg_mode_add_sub_cmp_and_or_move_op},  {"sub",     0x0a80, 0x0140,		  "m S,D",   0, SIZE_NONE,   cris_ver_v0_10,   cris_none_reg_mode_add_sub_cmp_and_or_move_op},  {"sub",     0x0a80, 0x0540,		  "m S,R,r", 0, SIZE_NONE,   cris_ver_v0_10,   cris_three_operand_add_sub_cmp_and_or_op},  {"subq",    0x0280, 0x0d40,		  "I,R",     0, SIZE_NONE,     0,   cris_quick_mode_add_sub_op},  {"subs",    0x04a0, 0x0b40,		  "z r,R",   0, SIZE_NONE,     0,   cris_reg_mode_add_sub_cmp_and_or_move_op},  /* FIXME: SIZE_FIELD_SIGNED and all necessary changes.  */  {"subs",    0x08a0, 0x0340,		  "z s,R",   0, SIZE_FIELD,    0,   cris_none_reg_mode_add_sub_cmp_and_or_move_op},  {"subs",    0x08a0, 0x0340,		  "z S,D",   0, SIZE_NONE,   cris_ver_v0_10,   cris_none_reg_mode_add_sub_cmp_and_or_move_op},  {"subs",    0x08a0, 0x0740,		  "z S,R,r", 0, SIZE_NONE,   cris_ver_v0_10,   cris_three_operand_add_sub_cmp_and_or_op},  {"subu",    0x0480, 0x0b60,		  "z r,R",   0, SIZE_NONE,     0,   cris_reg_mode_add_sub_cmp_and_or_move_op},  /* FIXME: SIZE_FIELD_UNSIGNED and all necessary changes.  */  {"subu",    0x0880, 0x0360,		  "z s,R",   0, SIZE_FIELD,    0,   cris_none_reg_mode_add_sub_cmp_and_or_move_op},  {"subu",    0x0880, 0x0360,		  "z S,D",   0, SIZE_NONE,   cris_ver_v0_10,   cris_none_reg_mode_add_sub_cmp_and_or_move_op},  {"subu",    0x0880, 0x0760,		  "z S,R,r", 0, SIZE_NONE,   cris_ver_v0_10,   cris_three_operand_add_sub_cmp_and_or_op},  {"svc",   0x0530+CC_VC*0x1000,   0x0AC0+(0xf-CC_VC)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  {"svs",   0x0530+CC_VS*0x1000,   0x0AC0+(0xf-CC_VS)*0x1000,		  "r",	     0, SIZE_NONE,     0,   cris_scc_op},  /* The insn "swapn" is the same as "not" and will be disassembled as     such, but the swap* family of mnmonics are generally v8-and-higher     only, so count it in.  */  {"swapn",   0x8770, 0x7880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapw",   0x4770, 0xb880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnw",  0xc770, 0x3880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapb",   0x2770, 0xd880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnb",  0xA770, 0x5880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapwb",  0x6770, 0x9880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnwb", 0xE770, 0x1880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapr",   0x1770, 0xe880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnr",  0x9770, 0x6880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapwr",  0x5770, 0xa880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnwr", 0xd770, 0x2880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapbr",  0x3770, 0xc880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnbr", 0xb770, 0x4880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapwbr", 0x7770, 0x8880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"swapnwbr", 0xf770, 0x0880,		  "r",	     0, SIZE_NONE,   cris_ver_v8p,   cris_not_implemented_op},  {"test",    0x0640, 0x0980,		  "m D",     0, SIZE_NONE,   cris_ver_v0_10,   cris_reg_mode_test_op},  {"test",    0x0b80, 0xf040,		  "m y",     0, SIZE_FIELD,    0,   cris_none_reg_mode_clear_test_op},  {"test",    0x0b80, 0xf040,		  "m S",     0, SIZE_NONE,   cris_ver_v0_10,   cris_none_reg_mode_clear_test_op},  {"xor",     0x07B0, 0x0840,		  "r,R",     0, SIZE_NONE,     0,   cris_xor_op},  {NULL, 0, 0, NULL, 0, 0, 0, cris_not_implemented_op}};/* Condition-names, indexed by the CC_* numbers as found in cris.h. */const char * constcris_cc_strings[] ={  "hs",  "lo",  "ne",  "eq",  "vc",  "vs",  "pl",  "mi",  "ls",  "hi",  "ge",  "lt",  "gt",  "le",  "a",  /* This is a placeholder.  In v0, this would be "ext".  In v32, this     is "sb".  See cris_conds15.  */  "wf"};/* Different names and semantics for condition 1111 (0xf).  */const struct cris_cond15 cris_cond15s[] ={  /* FIXME: In what version did condition "ext" disappear?  */  {"ext", cris_ver_v0_3},  {"wf", cris_ver_v10},  {"sb", cris_ver_v32p},  {NULL, 0}};/* * Local variables: * eval: (c-set-style "gnu") * indent-tabs-mode: t * End: *//* No instruction will be disassembled longer than this.  In theory, and   in silicon, address prefixes can be cascaded.  In practice, cascading   is not used by GCC, and not supported by the assembler.  */#ifndef MAX_BYTES_PER_CRIS_INSN#define MAX_BYTES_PER_CRIS_INSN 8#endif/* Whether or not to decode prefixes, folding it into the following   instruction.  FIXME: Make this optional later.  */#ifndef PARSE_PREFIX#define PARSE_PREFIX 1#endif/* Sometimes we prefix all registers with this character.  */#define REGISTER_PREFIX_CHAR '$'/* Whether or not to trace the following sequence:   sub* X,r%d   bound* Y,r%d   adds.w [pc+r%d.w],pc   This is the assembly form of a switch-statement in C.   The "sub is optional.  If there is none, then X will be zero.   X is the value of the first case,   Y is the number of cases (including default).   This results in case offsets printed on the form:    case N: -> case_address   where N is an estimation on the corresponding 'case' operand in C,   and case_address is where execution of that case continues after the   sequence presented above.   The old style of output was to print the offsets as instructions,   which made it hard to follow "case"-constructs in the disassembly,   and caused a lot of annoying warnings about undefined instructions.   FIXME: Make this optional later.  */#ifndef TRACE_CASE#define TRACE_CASE (disdata->trace_case)#endifenum cris_disass_family { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 };/* Stored in the disasm_info->private_data member.  */struct cris_disasm_data{  /* Whether to print something less confusing if we find something     matching a switch-construct.  */  bfd_boolean trace_case;  /* Whether this code is flagged as crisv32.  FIXME: Should be an enum     that includes "compatible".  */  enum cris_disass_family distype;};/* Value of first element in switch.  */static long case_offset = 0;/* How many more case-offsets to print.  */static long case_offset_counter = 0;/* Number of case offsets.  */static long no_of_case_offsets = 0;/* Candidate for next case_offset.  */static long last_immediate = 0;static int cris_constraint  (const char *, unsigned, unsigned, struct cris_disasm_data *);/* Parse disassembler options and store state in info.  FIXME: For the   time being, we abuse static variables.  */static bfd_booleancris_parse_disassembler_options (disassemble_info *info,				 enum cris_disass_family distype){  struct cris_disasm_data *disdata;  info->private_data = calloc (1, sizeof (struct cris_disasm_data));  disdata = (struct cris_disasm_data *) info->private_data;  if (disdata == NULL)    return FALSE;  /* Default true.  */  disdata->trace_case    = (info->disassembler_options == NULL       || (strcmp (info->disassembler_options, "nocase") != 0));  disdata->distype = distype;  return TRUE;}static const struct cris_spec_reg *spec_reg_info (unsigned int sreg, enum cris_disass_family distype){  int i;  for (i = 0; cris_spec_regs[i].name != NULL; i++)    {      if (cris_spec_regs[i].number == sreg)	{	  if (distype == cris_dis_v32)	    switch (cris_spec_regs[i].applicable_version)	      {	      case cris_ver_warning:	      case cris_ver_version_all:	      case cris_ver_v3p:	      case cris_ver_v8p:	      case cris_ver_v10p:	      case cris_ver_v32p:		/* No ambiguous sizes or register names with CRISv32.  */		if (cris_spec_regs[i].warning == NULL)		  return &cris_spec_regs[i];	      default:		;	      }	  else if (cris_spec_regs[i].applicable_version != cris_ver_v32p)	    return &cris_spec_regs[i];	}    }  return NULL;}