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?? softfloat.c

?? QEMU 0.91 source code, supports ARM processor including S3C24xx series
?? C
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/*============================================================================This C source file is part of the SoftFloat IEC/IEEE Floating-point ArithmeticPackage, Release 2b.Written by John R. Hauser.  This work was made possible in part by theInternational Computer Science Institute, located at Suite 600, 1947 CenterStreet, Berkeley, California 94704.  Funding was partially provided by theNational Science Foundation under grant MIP-9311980.  The original versionof this code was written as part of a project to build a fixed-point vectorprocessor in collaboration with the University of California at Berkeley,overseen by Profs. Nelson Morgan and John Wawrzynek.  More informationis available through the Web page `http://www.cs.berkeley.edu/~jhauser/arithmetic/SoftFloat.html'.THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort hasbeen made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMESRESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONSAND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMOREEFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCEINSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OROTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.Derivative works are acceptable, even for commercial purposes, so long as(1) the source code for the derivative work includes prominent notice thatthe work is derivative, and (2) the source code includes prominent notice withthese four paragraphs for those parts of this code that are retained.=============================================================================*/#include "softfloat.h"/*----------------------------------------------------------------------------| Primitive arithmetic functions, including multi-word arithmetic, and| division and square root approximations.  (Can be specialized to target if| desired.)*----------------------------------------------------------------------------*/#include "softfloat-macros.h"/*----------------------------------------------------------------------------| Functions and definitions to determine:  (1) whether tininess for underflow| is detected before or after rounding by default, (2) what (if anything)| happens when exceptions are raised, (3) how signaling NaNs are distinguished| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs| are propagated from function inputs to output.  These details are target-| specific.*----------------------------------------------------------------------------*/#include "softfloat-specialize.h"void set_float_rounding_mode(int val STATUS_PARAM){    STATUS(float_rounding_mode) = val;}void set_float_exception_flags(int val STATUS_PARAM){    STATUS(float_exception_flags) = val;}#ifdef FLOATX80void set_floatx80_rounding_precision(int val STATUS_PARAM){    STATUS(floatx80_rounding_precision) = val;}#endif/*----------------------------------------------------------------------------| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6| and 7, and returns the properly rounded 32-bit integer corresponding to the| input.  If `zSign' is 1, the input is negated before being converted to an| integer.  Bit 63 of `absZ' must be zero.  Ordinarily, the fixed-point input| is simply rounded to an integer, with the inexact exception raised if the| input cannot be represented exactly as an integer.  However, if the fixed-| point input is too large, the invalid exception is raised and the largest| positive or negative integer is returned.*----------------------------------------------------------------------------*/static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM){    int8 roundingMode;    flag roundNearestEven;    int8 roundIncrement, roundBits;    int32 z;    roundingMode = STATUS(float_rounding_mode);    roundNearestEven = ( roundingMode == float_round_nearest_even );    roundIncrement = 0x40;    if ( ! roundNearestEven ) {        if ( roundingMode == float_round_to_zero ) {            roundIncrement = 0;        }        else {            roundIncrement = 0x7F;            if ( zSign ) {                if ( roundingMode == float_round_up ) roundIncrement = 0;            }            else {                if ( roundingMode == float_round_down ) roundIncrement = 0;            }        }    }    roundBits = absZ & 0x7F;    absZ = ( absZ + roundIncrement )>>7;    absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );    z = absZ;    if ( zSign ) z = - z;    if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {        float_raise( float_flag_invalid STATUS_VAR);        return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;    }    if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;    return z;}/*----------------------------------------------------------------------------| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and| `absZ1', with binary point between bits 63 and 64 (between the input words),| and returns the properly rounded 64-bit integer corresponding to the input.| If `zSign' is 1, the input is negated before being converted to an integer.| Ordinarily, the fixed-point input is simply rounded to an integer, with| the inexact exception raised if the input cannot be represented exactly as| an integer.  However, if the fixed-point input is too large, the invalid| exception is raised and the largest positive or negative integer is| returned.*----------------------------------------------------------------------------*/static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 STATUS_PARAM){    int8 roundingMode;    flag roundNearestEven, increment;    int64 z;    roundingMode = STATUS(float_rounding_mode);    roundNearestEven = ( roundingMode == float_round_nearest_even );    increment = ( (sbits64) absZ1 < 0 );    if ( ! roundNearestEven ) {        if ( roundingMode == float_round_to_zero ) {            increment = 0;        }        else {            if ( zSign ) {                increment = ( roundingMode == float_round_down ) && absZ1;            }            else {                increment = ( roundingMode == float_round_up ) && absZ1;            }        }    }    if ( increment ) {        ++absZ0;        if ( absZ0 == 0 ) goto overflow;        absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );    }    z = absZ0;    if ( zSign ) z = - z;    if ( z && ( ( z < 0 ) ^ zSign ) ) { overflow:        float_raise( float_flag_invalid STATUS_VAR);        return              zSign ? (sbits64) LIT64( 0x8000000000000000 )            : LIT64( 0x7FFFFFFFFFFFFFFF );    }    if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact;    return z;}/*----------------------------------------------------------------------------| Returns the fraction bits of the single-precision floating-point value `a'.*----------------------------------------------------------------------------*/INLINE bits32 extractFloat32Frac( float32 a ){    return float32_val(a) & 0x007FFFFF;}/*----------------------------------------------------------------------------| Returns the exponent bits of the single-precision floating-point value `a'.*----------------------------------------------------------------------------*/INLINE int16 extractFloat32Exp( float32 a ){    return ( float32_val(a)>>23 ) & 0xFF;}/*----------------------------------------------------------------------------| Returns the sign bit of the single-precision floating-point value `a'.*----------------------------------------------------------------------------*/INLINE flag extractFloat32Sign( float32 a ){    return float32_val(a)>>31;}/*----------------------------------------------------------------------------| Normalizes the subnormal single-precision floating-point value represented| by the denormalized significand `aSig'.  The normalized exponent and| significand are stored at the locations pointed to by `zExpPtr' and| `zSigPtr', respectively.*----------------------------------------------------------------------------*/static void normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr ){    int8 shiftCount;    shiftCount = countLeadingZeros32( aSig ) - 8;    *zSigPtr = aSig<<shiftCount;    *zExpPtr = 1 - shiftCount;}/*----------------------------------------------------------------------------| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a| single-precision floating-point value, returning the result.  After being| shifted into the proper positions, the three fields are simply added| together to form the result.  This means that any integer portion of `zSig'| will be added into the exponent.  Since a properly normalized significand| will have an integer portion equal to 1, the `zExp' input should be 1 less| than the desired result exponent whenever `zSig' is a complete, normalized| significand.*----------------------------------------------------------------------------*/INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig ){    return make_float32(          ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig);}/*----------------------------------------------------------------------------| Takes an abstract floating-point value having sign `zSign', exponent `zExp',| and significand `zSig', and returns the proper single-precision floating-| point value corresponding to the abstract input.  Ordinarily, the abstract| value is simply rounded and packed into the single-precision format, with| the inexact exception raised if the abstract input cannot be represented| exactly.  However, if the abstract value is too large, the overflow and| inexact exceptions are raised and an infinity or maximal finite value is| returned.  If the abstract value is too small, the input value is rounded to| a subnormal number, and the underflow and inexact exceptions are raised if| the abstract input cannot be represented exactly as a subnormal single-| precision floating-point number.|     The input significand `zSig' has its binary point between bits 30| and 29, which is 7 bits to the left of the usual location.  This shifted| significand must be normalized or smaller.  If `zSig' is not normalized,| `zExp' must be 0; in that case, the result returned is a subnormal number,| and it must not require rounding.  In the usual case that `zSig' is| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.| The handling of underflow and overflow follows the IEC/IEEE Standard for| Binary Floating-Point Arithmetic.*----------------------------------------------------------------------------*/static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM){    int8 roundingMode;    flag roundNearestEven;    int8 roundIncrement, roundBits;    flag isTiny;    roundingMode = STATUS(float_rounding_mode);    roundNearestEven = ( roundingMode == float_round_nearest_even );    roundIncrement = 0x40;    if ( ! roundNearestEven ) {        if ( roundingMode == float_round_to_zero ) {            roundIncrement = 0;        }        else {            roundIncrement = 0x7F;            if ( zSign ) {                if ( roundingMode == float_round_up ) roundIncrement = 0;            }            else {                if ( roundingMode == float_round_down ) roundIncrement = 0;            }        }    }    roundBits = zSig & 0x7F;    if ( 0xFD <= (bits16) zExp ) {        if (    ( 0xFD < zExp )             || (    ( zExp == 0xFD )                  && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )           ) {            float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);            return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));        }        if ( zExp < 0 ) {            isTiny =                   ( STATUS(float_detect_tininess) == float_tininess_before_rounding )                || ( zExp < -1 )                || ( zSig + roundIncrement < 0x80000000 );            shift32RightJamming( zSig, - zExp, &zSig );            zExp = 0;            roundBits = zSig & 0x7F;            if ( isTiny && roundBits ) float_raise( float_flag_underflow STATUS_VAR);        }    }    if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;    zSig = ( zSig + roundIncrement )>>7;    zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );    if ( zSig == 0 ) zExp = 0;    return packFloat32( zSign, zExp, zSig );}/*----------------------------------------------------------------------------| Takes an abstract floating-point value having sign `zSign', exponent `zExp',| and significand `zSig', and returns the proper single-precision floating-| point value corresponding to the abstract input.  This routine is just like| `roundAndPackFloat32' except that `zSig' does not have to be normalized.| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''| floating-point exponent.*----------------------------------------------------------------------------*/static float32 normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig STATUS_PARAM){    int8 shiftCount;    shiftCount = countLeadingZeros32( zSig ) - 1;    return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount STATUS_VAR);}/*----------------------------------------------------------------------------| Returns the fraction bits of the double-precision floating-point value `a'.*----------------------------------------------------------------------------*/INLINE bits64 extractFloat64Frac( float64 a ){    return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF );}/*----------------------------------------------------------------------------| Returns the exponent bits of the double-precision floating-point value `a'.*----------------------------------------------------------------------------*/INLINE int16 extractFloat64Exp( float64 a ){    return ( float64_val(a)>>52 ) & 0x7FF;}/*----------------------------------------------------------------------------| Returns the sign bit of the double-precision floating-point value `a'.*----------------------------------------------------------------------------*/INLINE flag extractFloat64Sign( float64 a ){

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