{    { "divps", XM, EX, XX },    { "divss", XM, EX, XX },    { "divpd", XM, EX, XX },    { "divsd", XM, EX, XX },  },  /* PREGRP6 */  {    { "maxps", XM, EX, XX },    { "maxss", XM, EX, XX },    { "maxpd", XM, EX, XX },    { "maxsd", XM, EX, XX },  },  /* PREGRP7 */  {    { "minps", XM, EX, XX },    { "minss", XM, EX, XX },    { "minpd", XM, EX, XX },    { "minsd", XM, EX, XX },  },  /* PREGRP8 */  {    { "movups", XM, EX, XX },    { "movss", XM, EX, XX },    { "movupd", XM, EX, XX },    { "movsd", XM, EX, XX },  },  /* PREGRP9 */  {    { "movups", EX, XM, XX },    { "movss", EX, XM, XX },    { "movupd", EX, XM, XX },    { "movsd", EX, XM, XX },  },  /* PREGRP10 */  {    { "mulps", XM, EX, XX },    { "mulss", XM, EX, XX },    { "mulpd", XM, EX, XX },    { "mulsd", XM, EX, XX },  },  /* PREGRP11 */  {    { "rcpps", XM, EX, XX },    { "rcpss", XM, EX, XX },    { "(bad)", XM, EX, XX },    { "(bad)", XM, EX, XX },  },  /* PREGRP12 */  {    { "rsqrtps", XM, EX, XX },    { "rsqrtss", XM, EX, XX },    { "(bad)", XM, EX, XX },    { "(bad)", XM, EX, XX },  },  /* PREGRP13 */  {    { "sqrtps", XM, EX, XX },    { "sqrtss", XM, EX, XX },    { "sqrtpd", XM, EX, XX },    { "sqrtsd", XM, EX, XX },  },  /* PREGRP14 */  {    { "subps", XM, EX, XX },    { "subss", XM, EX, XX },    { "subpd", XM, EX, XX },    { "subsd", XM, EX, XX },  },  /* PREGRP15 */  {    { "(bad)", XM, EX, XX },    { "cvtdq2pd", XM, EX, XX },    { "cvttpd2dq", XM, EX, XX },    { "cvtpd2dq", XM, EX, XX },  },  /* PREGRP16 */  {    { "cvtdq2ps", XM, EX, XX },    { "cvttps2dq",XM, EX, XX },    { "cvtps2dq",XM, EX, XX },    { "(bad)", XM, EX, XX },  },  /* PREGRP17 */  {    { "cvtps2pd", XM, EX, XX },    { "cvtss2sd", XM, EX, XX },    { "cvtpd2ps", XM, EX, XX },    { "cvtsd2ss", XM, EX, XX },  },  /* PREGRP18 */  {    { "maskmovq", MX, MS, XX },    { "(bad)", XM, EX, XX },    { "maskmovdqu", XM, EX, XX },    { "(bad)", XM, EX, XX },  },  /* PREGRP19 */  {    { "movq", MX, EM, XX },    { "movdqu", XM, EX, XX },    { "movdqa", XM, EX, XX },    { "(bad)", XM, EX, XX },  },  /* PREGRP20 */  {    { "movq", EM, MX, XX },    { "movdqu", EX, XM, XX },    { "movdqa", EX, XM, XX },    { "(bad)", EX, XM, XX },  },  /* PREGRP21 */  {    { "(bad)", EX, XM, XX },    { "movq2dq", XM, MS, XX },    { "movq", EX, XM, XX },    { "movdq2q", MX, XS, XX },  },  /* PREGRP22 */  {    { "pshufw", MX, EM, Ib },    { "pshufhw", XM, EX, Ib },    { "pshufd", XM, EX, Ib },    { "pshuflw", XM, EX, Ib },  },  /* PREGRP23 */  {    { "movd", Ed, MX, XX },    { "movq", XM, EX, XX },    { "movd", Ed, XM, XX },    { "(bad)", Ed, XM, XX },  },  /* PREGRP24 */  {    { "(bad)", MX, EX, XX },    { "(bad)", XM, EX, XX },    { "punpckhqdq", XM, EX, XX },    { "(bad)", XM, EX, XX },  },  /* PREGRP25 */  {  { "movntq", Ev, MX, XX },  { "(bad)", Ev, XM, XX },  { "movntdq", Ev, XM, XX },  { "(bad)", Ev, XM, XX },  },  /* PREGRP26 */  {    { "(bad)", MX, EX, XX },    { "(bad)", XM, EX, XX },    { "punpcklqdq", XM, EX, XX },    { "(bad)", XM, EX, XX },  },};static const struct dis386 x86_64_table[][2] = {  {    { "arpl", Ew, Gw, XX },    { "movs{||lq|xd}", Gv, Ed, XX },  },};#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")static voidckprefix (){  int newrex;  rex = 0;  prefixes = 0;  used_prefixes = 0;  rex_used = 0;  while (1)    {      FETCH_DATA (the_info, codep + 1);      newrex = 0;      switch (*codep)	{	/* REX prefixes family.  */	case 0x40:	case 0x41:	case 0x42:	case 0x43:	case 0x44:	case 0x45:	case 0x46:	case 0x47:	case 0x48:	case 0x49:	case 0x4a:	case 0x4b:	case 0x4c:	case 0x4d:	case 0x4e:	case 0x4f:	    if (mode_64bit)	      newrex = *codep;	    else	      return;	  break;	case 0xf3:	  prefixes |= PREFIX_REPZ;	  break;	case 0xf2:	  prefixes |= PREFIX_REPNZ;	  break;	case 0xf0:	  prefixes |= PREFIX_LOCK;	  break;	case 0x2e:	  prefixes |= PREFIX_CS;	  break;	case 0x36:	  prefixes |= PREFIX_SS;	  break;	case 0x3e:	  prefixes |= PREFIX_DS;	  break;	case 0x26:	  prefixes |= PREFIX_ES;	  break;	case 0x64:	  prefixes |= PREFIX_FS;	  break;	case 0x65:	  prefixes |= PREFIX_GS;	  break;	case 0x66:	  prefixes |= PREFIX_DATA;	  break;	case 0x67:	  prefixes |= PREFIX_ADDR;	  break;	case FWAIT_OPCODE:	  /* fwait is really an instruction.  If there are prefixes	     before the fwait, they belong to the fwait, *not* to the	     following instruction.  */	  if (prefixes)	    {	      prefixes |= PREFIX_FWAIT;	      codep++;	      return;	    }	  prefixes = PREFIX_FWAIT;	  break;	default:	  return;	}      /* Rex is ignored when followed by another prefix.  */      if (rex)	{	  oappend (prefix_name (rex, 0));	  oappend (" ");	}      rex = newrex;      codep++;    }}/* Return the name of the prefix byte PREF, or NULL if PREF is not a   prefix byte.  */static const char *prefix_name (pref, sizeflag)     int pref;     int sizeflag;{  switch (pref)    {    /* REX prefixes family.  */    case 0x40:      return "rex";    case 0x41:      return "rexZ";    case 0x42:      return "rexY";    case 0x43:      return "rexYZ";    case 0x44:      return "rexX";    case 0x45:      return "rexXZ";    case 0x46:      return "rexXY";    case 0x47:      return "rexXYZ";    case 0x48:      return "rex64";    case 0x49:      return "rex64Z";    case 0x4a:      return "rex64Y";    case 0x4b:      return "rex64YZ";    case 0x4c:      return "rex64X";    case 0x4d:      return "rex64XZ";    case 0x4e:      return "rex64XY";    case 0x4f:      return "rex64XYZ";    case 0xf3:      return "repz";    case 0xf2:      return "repnz";    case 0xf0:      return "lock";    case 0x2e:      return "cs";    case 0x36:      return "ss";    case 0x3e:      return "ds";    case 0x26:      return "es";    case 0x64:      return "fs";    case 0x65:      return "gs";    case 0x66:      return (sizeflag & DFLAG) ? "data16" : "data32";    case 0x67:      if (mode_64bit)        return (sizeflag & AFLAG) ? "addr32" : "addr64";      else        return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";    case FWAIT_OPCODE:      return "fwait";    default:      return NULL;    }}static char op1out[100], op2out[100], op3out[100];static int op_ad, op_index[3];static bfd_vma op_address[3];static bfd_vma op_riprel[3];static bfd_vma start_pc;/* *   On the 386's of 1988, the maximum length of an instruction is 15 bytes. *   (see topic "Redundant prefixes" in the "Differences from 8086" *   section of the "Virtual 8086 Mode" chapter.) * 'pc' should be the address of this instruction, it will *   be used to print the target address if this is a relative jump or call * The function returns the length of this instruction in bytes. */static int8_t intel_syntax;static char open_char;static char close_char;static char separator_char;static char scale_char;intprint_insn_i386 (pc, info)     bfd_vma pc;     disassemble_info *info;{  intel_syntax = -1;  return print_insn (pc, info);}static intprint_insn (pc, info)     bfd_vma pc;     disassemble_info *info;{  const struct dis386 *dp;  int i;  int two_source_ops;  char *first, *second, *third;  int needcomma;  unsigned char uses_SSE_prefix;  int sizeflag;  const char *p;  struct dis_private priv;  mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax		|| info->mach == bfd_mach_x86_64);  if (intel_syntax == -1)    intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax		    || info->mach == bfd_mach_x86_64_intel_syntax);  if (info->mach == bfd_mach_i386_i386      || info->mach == bfd_mach_x86_64      || info->mach == bfd_mach_i386_i386_intel_syntax      || info->mach == bfd_mach_x86_64_intel_syntax)    priv.orig_sizeflag = AFLAG | DFLAG;  else if (info->mach == bfd_mach_i386_i8086)    priv.orig_sizeflag = 0;  else    abort ();  for (p = info->disassembler_options; p != NULL; )    {      if (strncmp (p, "x86-64", 6) == 0)	{	  mode_64bit = 1;	  priv.orig_sizeflag = AFLAG | DFLAG;	}      else if (strncmp (p, "i386", 4) == 0)	{	  mode_64bit = 0;	  priv.orig_sizeflag = AFLAG | DFLAG;	}      else if (strncmp (p, "i8086", 5) == 0)	{	  mode_64bit = 0;	  priv.orig_sizeflag = 0;	}      else if (strncmp (p, "intel", 5) == 0)	{	  intel_syntax = 1;	}      else if (strncmp (p, "att", 3) == 0)	{	  intel_syntax = 0;	}      else if (strncmp (p, "addr", 4) == 0)	{	  if (p[4] == '1' && p[5] == '6')	    priv.orig_sizeflag &= ~AFLAG;	  else if (p[4] == '3' && p[5] == '2')	    priv.orig_sizeflag |= AFLAG;	}      else if (strncmp (p, "data", 4) == 0)	{	  if (p[4] == '1' && p[5] == '6')	    priv.orig_sizeflag &= ~DFLAG;	  else if (p[4] == '3' && p[5] == '2')	    priv.orig_sizeflag |= DFLAG;	}      else if (strncmp (p, "suffix", 6) == 0)	priv.orig_sizeflag |= SUFFIX_ALWAYS;      p = strchr (p, ',');      if (p != NULL)	p++;    }  if (intel_syntax)    {      names64 = intel_names64;      names32 = intel_names32;      names16 = intel_names16;      names8 = intel_names8;      names8rex = intel_names8rex;      names_seg = intel_names_seg;      index16 = intel_index16;      open_char = '[';      close_char = ']';      separator_char = '+';      scale_char = '*';    }  else    {      names64 = att_names64;      names32 = att_names32;      names16 = att_names16;      names8 = att_names8;      names8rex = att_names8rex;      names_seg = att_names_seg;      index16 = att_index16;      open_char = '(';      close_char =  ')';      separator_char = ',';      scale_char = ',';    }  /* The output looks better if we put 7 bytes on a line, since that     puts most long word instructions on a single line.  */  info->bytes_per_line = 7;  info->private_data = (PTR) &priv;  priv.max_fetched = priv.the_buffer;  priv.insn_start = pc;  obuf[0] = 0;  op1out[0] = 0;  op2out[0] = 0;  op3out[0] = 0;  op_index[0] = op_index[1] = op_index[2] = -1;  the_info = info;  start_pc = pc;  start_codep = priv.the_buffer;  codep = priv.the_buffer;  if (setjmp (priv.bailout) != 0)    {