//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
/******************************************************************************
 * File:		 pciext.h
 *
 ******************************************************************************/
#ifndef __PCIEXT_H_
#define __PCIEXT_H_

#define IOCTL_HAL_SETBUSDATA            0x01
#define IOCTL_HAL_GETBUSDATA            0x02


#define PHYSICAL_PCI_MEM		(PCI_BASE + PCI_MEM_OFFSET)		// PCI memory mapped area.
#define PHYSICAL_PCI_IO			(PCI_BASE + PCI_IO_OFFSET)		// PCI I/O area
#define PHYSICAL_PCI_CONTROL	(PCI_BASE + PCI_CONTROL_OFFSET)	// PCI control register.
#define PHYSICAL_FPG_CONTROL	P_FPGA_BASE						// FPGA control register.

#define PCI_FIRST_INSTANCE                          0x0

struct PciBaseAddresses_Type {
    unsigned PciIoReg;
    unsigned PciMemReg;
    unsigned PciControlReg;
};
/*
typedef struct  __BUSDATA_PARMS
{
    DWORD Function;    // Which function IOCTL_HAL_GETBUSDATA/IOCTL_HAL_SETBUSDATA
    ULONG ReturnCode; // Return code from the function

    // Remaining elements are parameters for the functions
    BUS_DATA_TYPE BusDataType;
    ULONG BusNumber;
    ULONG SlotNumber;
    PVOID Buffer;
    ULONG Offset;
    ULONG Length;
} BUSDATA_PARMS, *PBUSDATA_PARMS;
*/

// PCI Interrupt Support routine.
void OEMInitInterrupts();
DWORD OEMTranslateIrq(    DWORD Irq   );
DWORD OEMTranslateSysIntr(     DWORD SysIntr  );
DWORD OEMRequestSysIntr(     DWORD Irq    );
BOOL OEMGetInterrupt(     PDEVICE_LOCATION pDevLoc,     PDWORD pIrq  );
int PCI_ISR() ;
BOOL OEMPciIntrEnable(DWORD dwIrq);
BOOL OEMPciIntrDisable(DWORD dwIrq);
BOOL OEMPciIntrDone(DWORD dwIrq);

int OEM_InitPCIHostBridge( void ) ;
ULONG PCI_Type1_Configuration(ULONG BusNumber, ULONG SlotNumber, PVOID Buffer,
                              ULONG Offset, ULONG Length, BOOL  fSet);

#endif