//
//  Copyright(C) Renesas Technology Corp. 1998-2004. All rights reserved.
//
//  header file for SH-4A Ver.1.0.0
//
//  FILE      : sh4a.h
//  CREATED   : 1999.04.26
//  MODIFIED  : 2004.04.20
//  AUTHOR    : Renesas Technology Corp.
//  HARDWARE  : RENESAS SH-4A
//  HISTORY   : 
//              2003.06.20
//              - Created release code.
//                (based on RENESAS ITS-DS4 Source Kit Ver.1.2.0 for WCE4.2)
//              2004.03.04
//              - Added EXPEVT register.
//              2004.04.09
//              - Modified change CPUOPM define value.
//              2004.04.20
//              - Modified change CPUOPM define value.
//

#ifndef	SH4_H
#define	SH4_H

//
// CCN.
//

#define CCN_REGBASE					0xFF000000	// CCN Register Base Address
#define CCN_REGSIZE					0x40

#define CCN_CCR_OFFSET				0x001C		// Cache Control Register Offset
#define CCN_QACR0_OFFSET			0x0038		// Queue Address Control Register 0
#define CCN_QACR1_OFFSET			0x003C		// Queue Address Control Register 1
#define CCN_RAMCR_OFFSET			0x0074		// RAM Control Register

#define CCN_CCR						(CCN_REGBASE + CCN_CCR_OFFSET)		// Cache Control Register
#define CCN_QACR0					(CCN_REGBASE + CCN_QACR0_OFFSET)	// Queue Address Control Register 0
#define CCN_QACR1					(CCN_REGBASE + CCN_QACR1_OFFSET)	// Queue Address Control Register 1
#define CCN_RAMCR					(CCN_REGBASE + CCN_RAMCR_OFFSET)	// RAM Control Register

// Cache Control Register

#define CCN_CCR_ICI					0x00000800	//IC invalidation
#define CCN_CCR_ICE					0x00000100	//IC enable
#define CCN_CCR_OCI					0x00000008	//OC invalidation
#define CCN_CCR_CB					0x00000004	//Copy-back enable 
#define CCN_CCR_WT					0x00000002	//Write-through enable
#define CCN_CCR_OCE					0x00000001	//OC enable

//
// The SR reg, puts us in priviledged mode, and blocks all interrupts
//

#define	TM_SR						0x700000f0

// VBR
#define VBR_DEFAULT					0xa0000000

// CPUOPM
#define CPUOPM_REG					0xff2f0000
#define CPUOPM_DEFAULT				0x000003e0		// for 3rdCut
#define CPUOPM_OFF					0x000003e1		// for 2ndCut

// EXPEVT
#define EXPEVT_REG					0xff000024

#endif