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?? os_sem.asm

?? 此代碼是ucos-II在凌陽61單片機上的移植
?? ASM
?? 第 1 頁 / 共 2 頁
字號: 
// GCC for SUNPLUS u'nSP version 1.0.21-3
// Command: C:\PROGRA~1\Sunplus\UNSPID~1.0\cc1.exe C:\TEMP\ccaUcbaa.i -fkeep-inline-functions -quiet -dumpbase OS_SEM.c -mglobal-var-iram -gstabs -Wall -o .\Debug/OS_SEM.asm
	.external __sn_func_ptr_sec

// gcc2_compiled.:

.debug
	.dw '.stabs "K:/ucosii/",0x64,0,3,',0,0,offset Ltext0,seg Ltext0,0x0d,0x0a
.code
.debug
	.dw '.stabs "K:/ucosii/OS_SEM.C",0x64,0,3,',0,0,offset Ltext0,seg Ltext0,0x0d,0x0a
.code
.code
Ltext0:
.debug
	.dw '.stabs "int:t1=r1;-32768;32767;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "char:t2=r2;0;127;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "long int:t3=r3;-2147483648;2147483647;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "unsigned int:t4=r4;0;65535;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "long unsigned int:t5=r5;0;4294967295;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "long long int:t6=r6;-2147483648;2147483647;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "long long unsigned int:t7=r7;0;4294967295;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "short int:t8=r8;-32768;32767;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "short unsigned int:t9=r9;0;65535;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "signed char:t10=r10;-32768;32767;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "unsigned char:t11=r11;0;65535;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "float:t12=r1;2;0;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "double:t13=r1;2;0;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "long double:t14=r1;2;0;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "complex int:t15=s2real:1,0,16;imag:1,16,16;;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "complex float:t16=r16;2;0;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "complex double:t17=r17;2;0;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "complex long double:t18=r18;2;0;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "void:t19=19",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "BOOLEAN:t20=9",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "INT8U:t21=9",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "INT8S:t22=8",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "INT16U:t23=4",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "INT16S:t24=1",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "INT32U:t25=5",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "INT32S:t26=3",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "FP32:t27=12",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "FP64:t28=13",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "OS_STK:t29=4",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "OS_EVENT:t30=31=s6OSEventPtr:32=*19,0,16;OSEventTbl:33=ar1;0;1;21,16,32;\\",128,0,0,0',0x0d,0x0a
	.DW '.stabs "OSEventCnt:23,48,16;OSEventType:21,64,16;OSEventGrp:21,80,16;;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "OS_SEM_DATA:t34=35=s4OSCnt:23,0,16;OSEventTbl:33,16,32;\\",128,0,0,0',0x0d,0x0a
	.DW '.stabs "OSEventGrp:21,48,16;;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "os_tcb:T36=s11OSTCBStkPtr:37=*29,0,16;OSTCBNext:38=*36,16,16;\\",128,0,0,0',0x0d,0x0a
	.DW '.stabs "OSTCBPrev:38,32,16;OSTCBEventPtr:39=*30,48,16;\\",128,0,0,0',0x0d,0x0a
	.DW '.stabs "OSTCBDly:23,64,16;OSTCBStat:21,80,16;OSTCBPrio:21,96,16;\\",128,0,0,0',0x0d,0x0a
	.DW '.stabs "OSTCBX:21,112,16;OSTCBY:21,128,16;OSTCBBitX:21,144,16;\\",128,0,0,0',0x0d,0x0a
	.DW '.stabs "OSTCBBitY:21,160,16;;",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabs "OS_TCB:t40=36",128,0,0,0',0x0d,0x0a
.CODE
.code
.debug
	.dw '.stabs "OSSemAccept:F23",36,0,0,',0,0,offset _OSSemAccept,seg _OSSemAccept,0x0d,0x0a
.CODE
.public _OSSemAccept
_OSSemAccept:	.proc
.debug
	.dw '.stabn 0x44,0,40,',0,0
	.dd LM1-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM1:
	// total=2, vars=2
	// frame_pointer_needed: 1
	push bp to [sp]
	sp-=2
	bp=sp+1

	R2=BP+5
.debug
	.dw '.stabn 0x44,0,41,',0,0
	.dd LM2-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM2:
LBB2:
.debug
	.dw '.stabn 0x44,0,44,',0,0
	.dd LM3-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM3:
// GCC inline ASM start
	INT OFF 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,45,',0,0
	.dd LM4-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM4:
	R1=R2	// QImode move
	R3=[R1]	// QImode move
	R1=R3	// QImode move
	R3=R3+4
	R4=R3	// QImode move
	R1=[R4]	// QImode move
	CMP R1,3	// QImode compare
	NSJZ L3	//QImode EQ
.debug
	.dw '.stabn 0x44,0,46,',0,0
	.dd LM5-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM5:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,47,',0,0
	.dd LM6-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM6:
	R1=0	// QImode move
	pc=L2	// Indirect jump
L3:
.debug
	.dw '.stabn 0x44,0,49,',0,0
	.dd LM7-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM7:
	R1=R2	// QImode move
	R3=[R1]	// QImode move
	R1=R3	// QImode move
	R3=R3+3
	R4=R3	// QImode move
	R1=[R4]	// QImode move
	[BP]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,50,',0,0
	.dd LM8-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM8:
	R1=[BP]	// QImode move
	CMP R1,0	// QImode test
	NSJZ L4	//QImode EQ
.debug
	.dw '.stabn 0x44,0,51,',0,0
	.dd LM9-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM9:
	R1=R2	// QImode move
	R3=[R1]	// QImode move
	R1=R3	// QImode move
	R3=R3+3
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	R3=R1	// QImode move
	R1=R1+3
	R3=R2	// QImode move
	R4=[R3]	// QImode move
	R3=R4	// QImode move
	R3=R4+3
	[bp+1]=R3	// QImode move
	R4=[bp+1]	// QImode move
	R3=[R4]	// QImode move
	R4=R3+(-1)
	R3=R1	// QImode move
	[R3]=R4	// QImode move
L4:
.debug
	.dw '.stabn 0x44,0,53,',0,0
	.dd LM10-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM10:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,54,',0,0
	.dd LM11-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM11:
	R3=[BP]	// QImode move
	R1=R3	// QImode move
	pc=L2	// Indirect jump
.debug
	.dw '.stabn 0x44,0,55,',0,0
	.dd LM12-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM12:
LBE2:
.debug
	.dw '.stabn 0x44,0,55,',0,0
	.dd LM13-_OSSemAccept
	.dw 0x0d,0x0a
.code
LM13:
L2:

	sp+=2
	pop bp from [sp]
	retf
	.endp	// end of OSSemAccept

.debug
	.dw '.stabs "pevent:p39",160,0,0,5',0x0d,0x0a
.CODE
.debug
	.dw '.stabn 0xc0,0,0,',0,0
	.dd LBB2-_OSSemAccept
	.dw 0x0d,0x0a
.code
.debug
	.dw '.stabs "cnt:23",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabn 0xe0,0,0,',0,0
	.dd LBE2-_OSSemAccept
	.dw 0x0d,0x0a
.code
.debug
	.dw '.stabf ',0,0
	.dd LME1-_OSSemAccept
	.dw 0x0d,0x0a
.code
LME1:
.code
.debug
	.dw '.stabs "OSSemCreate:F39",36,0,0,',0,0,offset _OSSemCreate,seg _OSSemCreate,0x0d,0x0a
.CODE
.public _OSSemCreate
_OSSemCreate:	.proc
.debug
	.dw '.stabn 0x44,0,76,',0,0
	.dd LM14-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM14:
	// total=2, vars=2
	// frame_pointer_needed: 1
	push bp to [sp]
	sp-=2
	bp=sp+1

	R1=BP+5
	[bp+1]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,77,',0,0
	.dd LM15-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM15:
LBB3:
.debug
	.dw '.stabn 0x44,0,80,',0,0
	.dd LM16-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM16:
// GCC inline ASM start
	INT OFF 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,81,',0,0
	.dd LM17-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM17:
	R1=[_OSEventFreeList]	// QImode move
	[BP]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,82,',0,0
	.dd LM18-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM18:
	R1=[_OSEventFreeList]	// QImode move
	CMP R1,0	// QImode test
	NSJZ L8	//QImode EQ
.debug
	.dw '.stabn 0x44,0,83,',0,0
	.dd LM19-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM19:
	R1=[_OSEventFreeList]	// QImode move
	R3=R1	// QImode move
	R2=[R3]	// QImode move
	[_OSEventFreeList]=R2	// QImode move
L8:
.debug
	.dw '.stabn 0x44,0,85,',0,0
	.dd LM20-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM20:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,86,',0,0
	.dd LM21-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM21:
	R1=[BP]	// QImode move
	CMP R1,0	// QImode test
	NSJZ L9	//QImode EQ
.debug
	.dw '.stabn 0x44,0,87,',0,0
	.dd LM22-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM22:
	R2=[BP]	// QImode move
	R1=R2	// QImode move
	R2=R2+4
	R1=3	// QImode move
	R3=R2	// QImode move
	[R3]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,88,',0,0
	.dd LM23-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM23:
	R2=[BP]	// QImode move
	R1=R2	// QImode move
	R2=R2+3
	R3=[bp+1]	// QImode move
	R1=[R3]	// QImode move
	R3=R2	// QImode move
	[R3]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,89,',0,0
	.dd LM24-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM24:
	R1=[BP]	// QImode move
	[SP--]=R1	// QImode move
	call _OSEventWaitListInit	// call without return value
	SP = SP + 1	//SP
L9:
.debug
	.dw '.stabn 0x44,0,91,',0,0
	.dd LM25-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM25:
	R2=[BP]	// QImode move
	R1=R2	// QImode move
	pc=L7	// Indirect jump
.debug
	.dw '.stabn 0x44,0,92,',0,0
	.dd LM26-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM26:
LBE3:
.debug
	.dw '.stabn 0x44,0,92,',0,0
	.dd LM27-_OSSemCreate
	.dw 0x0d,0x0a
.code
LM27:
L7:

	sp+=2
	pop bp from [sp]
	retf
	.endp	// end of OSSemCreate

.debug
	.dw '.stabs "cnt:p23",160,0,0,5',0x0d,0x0a
.CODE
.debug
	.dw '.stabn 0xc0,0,0,',0,0
	.dd LBB3-_OSSemCreate
	.dw 0x0d,0x0a
.code
.debug
	.dw '.stabs "pevent:39",128,0,0,0',0x0d,0x0a
.CODE
.debug
	.dw '.stabn 0xe0,0,0,',0,0
	.dd LBE3-_OSSemCreate
	.dw 0x0d,0x0a
.code
.debug
	.dw '.stabf ',0,0
	.dd LME2-_OSSemCreate
	.dw 0x0d,0x0a
.code
LME2:
.code
.debug
	.dw '.stabs "OSSemPend:F19",36,0,0,',0,0,offset _OSSemPend,seg _OSSemPend,0x0d,0x0a
.CODE
.public _OSSemPend
_OSSemPend:	.proc
.debug
	.dw '.stabn 0x44,0,125,',0,0
	.dd LM28-_OSSemPend
	.dw 0x0d,0x0a
.code
LM28:
	// total=1, vars=1
	// frame_pointer_needed: 1
	push bp to [sp]
	sp-=1
	bp=sp+1

	R1=BP+4
	[BP]=R1	// QImode move
.debug
	.dw '.stabn 0x44,0,126,',0,0
	.dd LM29-_OSSemPend
	.dw 0x0d,0x0a
.code
LM29:
// GCC inline ASM start
	INT OFF 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,127,',0,0
	.dd LM30-_OSSemPend
	.dw 0x0d,0x0a
.code
LM30:
	R3=[BP]	// QImode move
	R2=[R3]	// QImode move
	R1=R2	// QImode move
	R2=R2+4
	R4=R2	// QImode move
	R1=[R4]	// QImode move
	CMP R1,3	// QImode compare
	NSJZ L13	//QImode EQ
.debug
	.dw '.stabn 0x44,0,128,',0,0
	.dd LM31-_OSSemPend
	.dw 0x0d,0x0a
.code
LM31:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,129,',0,0
	.dd LM32-_OSSemPend
	.dw 0x0d,0x0a
.code
LM32:
	R1=[BP]	// QImode move
	R1=[BP]	// QImode move
	R2=R1+2
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	R2=1	// QImode move
	R4=R1	// QImode move
	[R4]=R2	// QImode move
L13:
.debug
	.dw '.stabn 0x44,0,131,',0,0
	.dd LM33-_OSSemPend
	.dw 0x0d,0x0a
.code
LM33:
	R1=[BP]	// QImode move
	R2=[R1]	// QImode move
	R1=R2	// QImode move
	R2=R2+3
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	CMP R1,0	// QImode test
	NSJZ L14	//QImode EQ
.debug
	.dw '.stabn 0x44,0,132,',0,0
	.dd LM34-_OSSemPend
	.dw 0x0d,0x0a
.code
LM34:
	R4=[BP]	// QImode move
	R2=[R4]	// QImode move
	R1=R2	// QImode move
	R2=R2+3
	R2=[BP]	// QImode move
	R1=[R2]	// QImode move
	R2=R1	// QImode move
	R1=R1+3
	R4=[BP]	// QImode move
	R3=[R4]	// QImode move
	R2=R3	// QImode move
	R3=R3+3
	R4=R3	// QImode move
	R2=[R4]	// QImode move
	R3=R2+(-1)
	R2=R1	// QImode move
	[R2]=R3	// QImode move
.debug
	.dw '.stabn 0x44,0,133,',0,0
	.dd LM35-_OSSemPend
	.dw 0x0d,0x0a
.code
LM35:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,134,',0,0
	.dd LM36-_OSSemPend
	.dw 0x0d,0x0a
.code
LM36:
	R1=[BP]	// QImode move
	R3=[BP]	// QImode move
	R2=R3+2
	R4=R2	// QImode move
	R1=[R4]	// QImode move
	R2=0	// QImode move
	R3=R1	// QImode move
	[R3]=R2	// QImode move
.debug
	.dw '.stabn 0x44,0,135,',0,0
	.dd LM37-_OSSemPend
	.dw 0x0d,0x0a
.code
LM37:
	pc=L15	// Indirect jump
L14:
	R1=[_OSIntNesting]	// QImode move
	CMP R1,0	// QImode test
	NSJZ L16	//QImode EQ
.debug
	.dw '.stabn 0x44,0,136,',0,0
	.dd LM38-_OSSemPend
	.dw 0x0d,0x0a
.code
LM38:
// GCC inline ASM start
	INT IRQ 
	INT FIQ 
	
// GCC inline ASM end
.debug
	.dw '.stabn 0x44,0,137,',0,0
	.dd LM39-_OSSemPend
	.dw 0x0d,0x0a
.code
LM39:
	R1=[BP]	// QImode move
	R4=[BP]	// QImode move
	R2=R4+2
	R3=R2	// QImode move
	R1=[R3]	// QImode move
	R2=2	// QImode move
	R4=R1	// QImode move
	[R4]=R2	// QImode move
.debug
	.dw '.stabn 0x44,0,138,',0,0
	.dd LM40-_OSSemPend
	.dw 0x0d,0x0a
.code
LM40:
	pc=L15	// Indirect jump
L16:
.debug
	.dw '.stabn 0x44,0,139,',0,0
	.dd LM41-_OSSemPend
	.dw 0x0d,0x0a
.code
LM41:
	R1=[_OSTCBCur]	// QImode move
	R2=R1	// QImode move
	R1=R1+5
	R3=[_OSTCBCur]	// QImode move
	R2=R3	// QImode move
	R3=R3+5
	R2=R3	// QImode move
	R2=[R2]	// QImode move
	R4=R2|1
	R2=R1	// QImode move
	[R2]=R4	// QImode move
.debug
	.dw '.stabn 0x44,0,140,',0,0
	.dd LM42-_OSSemPend
	.dw 0x0d,0x0a
.code
LM42:
	R1=[_OSTCBCur]	// QImode move
	R2=R1	// QImode move
	R1=R1+4
	R2=[BP]	// QImode move
	R4=[BP]	// QImode move
	R3=R4+1
	R4=R3	// QImode move
	R2=[R4]	// QImode move
	R3=R1	// QImode move
	[R3]=R2	// QImode move
.debug
	.dw '.stabn 0x44,0,141,',0,0
	.dd LM43-_OSSemPend
	.dw 0x0d,0x0a
.code

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