/**************************************************************************************
* 
*	Project Name : S3C6400 Validation
*
*	Copyright 2006 by Samsung Electronics, Inc.
*	All rights reserved.
*
*	Project Description :
*		This software is only for validating functions of the S3C6400.
*		Anybody can use this software without our permission.
*  
*--------------------------------------------------------------------------------------
* 
*	File Name : pccard.c
*  
*	File Description : This file implements the driver functions for CF Controller and PCCARD mode on it.
*
*	Author : Sunil,Roe
*	Dept. : AP Development Team
*	Created Date : 2007/1/17
*	Version : 0.1 
* 
*	History
*	- Created(Sunil,Roe 2007/1/17)
*   
**************************************************************************************/

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "def.h"
#include "option.h"
#include "library.h"
#include "sfr6400.h"
#include "system.h"
#include "intc.h"
#include "gpio.h"
#include "sysc.h"

#include "timer.h"
#include "cf.h"
#include "pccard.h"


#define DBG_PCCARD 0

#ifdef DBG_PCCARD
#define DbgPccard(x) printf x
#else
#define DbgPccard(x) 0;
#endif


// PC card SFR base
#define PCCARD_SFR_BASE	CFCON_BASE+0x1820

// PC Card Memory map
#define PCCARD_ATT_BASE	CFCON_BASE					// refer to attribute memory region
#define PCCARD_IO_BASE		CFCON_BASE+0x800  			// refer to IO region
#define PCCARD_MEM_BASE	CFCON_BASE+0x1000 			// refer to common memory region

#define PCCARD_MEM_MODE		0
#define PCCARD_IO_MODE1		1
#define PCCARD_IO_MODE2		2
#define PCCARD_IO_MODE3		3




/*=========================================================================
 *        	             I/O configuration address
 *=========================================================================
 */

#define PCCARD_ATT_CONFIG_BASE		(PCCARD_ATT_BASE + 0x200)
#define PCCARD_ATT_CONFIG_OPTION		(PCCARD_ATT_CONFIG_BASE)
#define PCCARD_ATT_CONFIG_STATUS		(PCCARD_ATT_CONFIG_BASE + 0x2)
#define PCCARD_ATT_CONFIG_REPLACE	(PCCARD_ATT_CONFIG_BASE + 0x4)
#define PCCARD_ATT_CONFIG_SOCKET		(PCCARD_ATT_CONFIG_BASE + 0x6)

#define PCCARD(__n) 				( ( volatile oPCCARD_REGS * ) ( g_paPCCARDSFRBase[__n] ) )
#define PCCARD_ATTR(__n) 		( ( volatile oPCCARDATT_REGS * ) ( g_paPCCARDATTBase[__n] ) )
#define PCCARD_TASKFILE(__n) 	( ( volatile oPCCARDTAKSFILE_REGS * ) ( g_paPCCARDTaskFileBase[__n] ) )

typedef struct tag_PCCARD_REGS
{
	u32 rrPCCARD_CFG;		// PCCARD configuration & status register
	u32 rrPCCARD_INT;		// PCCARD interrupt mask & source register
	u32 rrPCCARD_ATTR;		// PCCARD attribute memory area operation timing config register
	u32 rrPCCARD_IO;		// PCCARD attribute memory area operation timing config register
	u32 rrPCCARD_COMM;		// PCCARD attribute memory area operation timing config register
} 
oPCCARD_REGS;

typedef struct tag_PCCARDATT_REGS
{
	u16 rPCCARD_CONFIG_OPTION;		// PCCARD configuration option register (offset : 0x0)
	u16 rPCCARD_CONFIG_STATUS;		// PCCARD configuration status register (offset : 0x2)
	u16 rPCCARD_CONFIG_REPLACE;		// PCCARD pin replacement register (offset : 0x4)
	u16 rPCCARD_CONFIG_SOCKET;		// PCCARD socket copy register (offset : 0x6)
} 
oPCCARDATT_REGS;

typedef struct tag_PCCARDTAKSFILE_REGS
{
	u8 rPCCARD_DATA;		// TaskFile Register : Data register
	u8 rPCCARD_FEATURE;	// TaskFile Register : Feature register
	u8 rPCCARD_SECTOR;		// TaskFile Register : Sector count register
	u8 rPCCARD_LOWLBA;		// TaskFile Register : Sector Number register
	u8 rPCCARD_MIDLBA;		// TaskFile Register : Cylinder low register
	u8 rPCCARD_HIGHLBA;	// TaskFile Register : Cylinder high register
	u8 rPCCARD_DEVICE;		// TaskFile Register : Drive head register
	u8 rPCCARD_STATUS;		// TaskFile Register : Status register
	u8 rPCCARD_COMMAND;	// TaskFile Register : Command register
} 
oPCCARDTAKSFILE_REGS;
 
// define global variables
static void *				g_paPCCARDSFRBase[PCCARD_CONNUM];
static void *				g_paPCCARDATTBase[PCCARD_CONNUM];
static void *				g_paPCCARDTaskFileBase[PCCARD_CONNUM];
extern volatile PCCARD_oInform	g_oaPCCARDInform[];
extern u8 				g_ucPCCardConNum;

//=========================================================================
//					          	          PCCARD Controller AREA
//=========================================================================
/*---------------------------------- Init Functions  ---------------------------------*/
//////////
// Function Name : PCCARD_Init
// Function Description : This function initializes a certain PCCARD Controller.
// Input : 	ucCon - PCCARD Controller Number 
// Output : 	TRUE 	- Memory Device is reset
//			FALSE	- Memory Device is not reset because of ERROR
// Version : v0.1
bool	PCCARD_Init(u8 ucCon)
{
	u32 uSFRBaseAddress;			// for PCCARD Controller Base Register
//	u32 uTaskFileBaseAddress;		// for Task File Base Register
	u32 uATTConfigBaseAddress;		// for Attribute memory Base register

	Assert( (ucCon == PCCARD_CON0) );

	if(ucCon == PCCARD_CON0)
	{
		uSFRBaseAddress			= PCCARD_SFR_BASE;
		uATTConfigBaseAddress	= PCCARD_ATT_CONFIG_BASE;
//		g_oaPCMInform[ucCon].ucDMANum		= NUM_DMA0;
//		g_oaPCMInform[ucCon].ucDMACon 		= DMA0;
//		g_oaPCMInform[ucCon].ucDMATxSrc		= DMA0_PCM0_TX;
//		g_oaPCMInform[ucCon].ucDMARxSrc		= DMA0_PCM0_RX;
	}
	else
	{
		return FALSE;
	}

	// EBI Setup for CF controller	
	CF_SetEBI(INDIRECT_MODE);

	PCCARD_SetSFRBaseAddr(ucCon, uSFRBaseAddress);
//	PCCARD_SetTaskFileBaseAddr(ucCon, uTaskFileBaseAddress);
	PCCARD_SetAttConfigBaseAddr(ucCon, uATTConfigBaseAddress);
	// Initialize PCM Buffer
	PCCARD_InitBuffer(ucCon);
	PCCARD_InitPort(ucCon);
	
	return TRUE;	
}

//////////
// Function Name : PCCARD_InitBuffer
// Function Description : This function initializes buffers used by PCM Controller.
// Input : 	ucCon - PCCARD Controller Number 
// Output : 	NONE
// Version : v0.1
void PCCARD_InitBuffer(u8 ucCon)
{
	g_oaPCCARDInform[ucCon].puPCCARDWriteBuf = (u32*) CF_WRITE_BUF;
	g_oaPCCARDInform[ucCon].puPCCARDReadBuf = (u32*) (CF_WRITE_BUF + 0x400000); 
}

//////////
// Function Name : PCCARD_InitPort
// Function Description : 
//   This function Initialize ports as PCCARD.
// Input : ucCon - PCCARD Controller Number 
// Output : NONE
// Version : v0.1 
void PCCARD_InitPort(u8 ucCon)
{
	// GPIO_M[5] (XhiINTR) should be output low in order to connect Xm0OEata to nOE_CF signal.
	// (refer to the unit TS5A3159_SPDT(U613) in SMDK6400 Rev0.1's schematic page 7)
	GPIO_SetFunctionEach(eGPIO_M, eGPIO_5, 1);	// set XhiINTR/GPM5 as output
	GPIO_SetDataEach(eGPIO_M, eGPIO_5 , 0); 		//GPM[5] -> Low	
	
	switch(ucCon)
	{
		case PCCARD_CON0 :
			//--- CF controller - PC card mode setting ---//
			// Output pad disable, Card power off, PC card mode
			CF_SetMUXReg(eCF_MUX_OUTPUT_DISABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);
			DelayfrTimer(micro, 100);	// 100us delay
			// Output pad enable, Card power off, PC card mode
			CF_SetMUXReg(eCF_MUX_OUTPUT_ENABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);
			DelayfrTimer(micro, 100);	// 100us delay
			// Card Power on (PC Card mode)
			CF_SetMUXReg(eCF_MUX_OUTPUT_ENABLE, eCF_MUX_CARDPWR_ON, eCF_MUX_MODE_PCCARD);

			// wait for at least 20ms (SanDisk: 25ms, MicroDrive: 125ms, Hagiwara: )
			// No other method available.
			DelayfrTimer(milli, 125);	// 125ms delay
			break;
		default :
			break;
	}

}

//////////
// Function Name : PCCARD_ReturnPort
// Function Description : 
//   This function Initialize ports as default GPIO(input).
// Input : ucCon - PCCARD Controller Number 
// Output : NONE
// Version : v0.1 
void PCCARD_ReturnPort(u8 ucCon)
{
	switch(ucCon)
	{
		case PCCARD_CON0 :
//			GPIO_SetFunctionAll(eGPIO_D, 0x0, 0x0);
			break;
		default :
			break;
	}
	CF_SetMUXReg(eCF_MUX_OUTPUT_DISABLE, eCF_MUX_CARDPWR_OFF, eCF_MUX_MODE_PCCARD);

	// GPIO_M[5] (XhiINTR) should be output high in order to connect VDD_SMEM to nOE_CF signal, 
	// because Xm0OEata would be zero if the state of CF card is a TrueIDE mode.
	// So, in order to avoid making low state input of glue logic, nOE_CF should be connected to VDD_SMEM.	
	// (refer to the unit SN74AUC2G08(U607) in SMDK6400 Rev0.1's schematic page 7)
	GPIO_SetFunctionEach(eGPIO_M, eGPIO_5, 1);	// set XhiINTR/GPM5 as output
	GPIO_SetDataEach(eGPIO_M, eGPIO_5 , 1); 		//GPM[5] -> High	
	
}

/*---------------------------------- APIs of PCCARD_CNFG&STATUS Registers ---------------------------------*/
//////////
// Function Name : PCCARD_SetConfig
// Function Description : This function sets up PCCARD Control Register.
// Input : 	ucCon - PCCARD Controller Number
//			ePccardWidth - 8bit/16bit selection
// Output : 	NONE
// Version : v0.1
void PCCARD_SetConfig(u8 ucCon, ePCCARD_WIDTH ePccardWidth)
{
	u32		uRegValue = 0;

	uRegValue = PCCARD_GetRegValue(ucCon, ePCCARD_CNFG_STATUS);
	uRegValue = uRegValue & ~(0x1f<< 8 ) | (0<< 12) | (1<<11) | (ePccardWidth<<10) | (ePccardWidth<<9) | (ePccardWidth<<8);		

	PCCARD_SetRegValue(ucCon, ePCCARD_CNFG_STATUS, uRegValue);		

}

/*---------------------------------- APIs of PCCARD_INTMSK&SRC Registers ---------------------------------*/
//////////
// Function Name : PCCARD_ResetCard
// Function Description : This function resets CF Card in PCCARD mode.
// Input : 	ucCon 		- PCCARD Controller Number
//			ucResetFlag	- RESET/NORESET
// Output : 	NONE
// Version : v0.1
void PCCARD_ResetCard(u8 ucCon, u8 ucResetFlag)
{
	u32		uRegValue = 0;

	uRegValue = PCCARD_GetRegValue(ucCon, ePCCARD_CNFG_STATUS);
	uRegValue = uRegValue & ~(0x1<< 13 ) | (ucResetFlag<<13);