?? sysc.h
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eAHBM0_ROT = 0x620, // rAHB_CON1(2), Rotation
eAHBM1_FIX0 = 0x700, // rAHB_CON1(3), Fixed Order, Fixed Order type 0
eAHBM1_FIX1 = 0x701, // rAHB_CON1(3), Fixed Order, Fixed Order type 1
eAHBM1_FIX2 = 0x702, // rAHB_CON1(3), Fixed Order, Fixed Order type 2
eAHBM1_FIX3 = 0x703, // rAHB_CON1(3), Fixed Order, Fixed Order type 3
eAHBM1_FIX4 = 0x704, // rAHB_CON1(3), Fixed Order, Fixed Order type 4
eAHBM1_FIX5 = 0x705, // rAHB_CON1(3), Fixed Order, Fixed Order type 5
eAHBM1_FIX6 = 0x706, // rAHB_CON1(3), Fixed Order, Fixed Order type 6
eAHBM1_LGL = 0x710, // rAHB_CON1(3), Last grant order.
eAHBM1_ROT = 0x720, // rAHB_CON1(3), Rotation
eAHBS0_FIX0 = 0x800, // rAHB_CON2(0), Fixed Order, Fixed Order type 0
eAHBS0_FIX1 = 0x801, // rAHB_CON2(0), Fixed Order, Fixed Order type 1
eAHBS0_FIX2 = 0x802, // rAHB_CON2(0), Fixed Order, Fixed Order type 2
eAHBS0_FIX3 = 0x803, // rAHB_CON2(0), Fixed Order, Fixed Order type 3
eAHBS0_FIX4 = 0x804, // rAHB_CON2(0), Fixed Order, Fixed Order type 4
eAHBS0_FIX5 = 0x805, // rAHB_CON2(0), Fixed Order, Fixed Order type 5
eAHBS0_FIX6 = 0x806, // rAHB_CON2(0), Fixed Order, Fixed Order type 6
eAHBS0_LGL = 0x810, // rAHB_CON2(0), Last grant order.
eAHBS0_ROT = 0x820, // rAHB_CON2(0), Rotation
eAHBS1_FIX0 = 0x900, // rAHB_CON2(1), Fixed Order, Fixed Order type 0
eAHBS1_FIX1 = 0x901, // rAHB_CON2(1), Fixed Order, Fixed Order type 1
eAHBS1_FIX2 = 0x902, // rAHB_CON2(1), Fixed Order, Fixed Order type 2
eAHBS1_FIX3 = 0x903, // rAHB_CON2(1), Fixed Order, Fixed Order type 3
eAHBS1_FIX4 = 0x904, // rAHB_CON2(1), Fixed Order, Fixed Order type 4
eAHBS1_FIX5 = 0x905, // rAHB_CON2(1), Fixed Order, Fixed Order type 5
eAHBS1_FIX6 = 0x906, // rAHB_CON2(1), Fixed Order, Fixed Order type 6
eAHBS1_LGL = 0x910, // rAHB_CON2(1), Last grant order.
eAHBS1_ROT = 0x920 // rAHB_CON2(1), Rotation
}BUSCTRL_eId;
typedef enum DMASELECT_ID
{
eSEL_UART0_0 = 0,
eSEL_UART0_1 = 1,
eSEL_UART1_0 = 2,
eSEL_UART1_1 = 3,
eSEL_UART2_0 = 4,
eSEL_UART2_1 = 5,
eSEL_UART3_0 = 6,
eSEL_UART3_1 = 7,
eSEL_PCM0_TX = 8,
eSEL_PCM0_RX = 9,
eSEL_I2S0_TX = 10,
eSEL_I2S0_RX = 11,
eSEL_SPI0_TX = 12,
eSEL_SPI0_RX = 13,
eSEL_HSI_TX = 14,
eSEL_HSI_RX = 15,
eSEL_PCM1_TX = 16,
eSEL_PCM1_RX = 17,
eSEL_I2S1_TX = 18,
eSEL_I2S1_RX = 19,
eSEL_SPI1_TX = 20,
eSEL_SPI1_RX = 21,
eSEL_AC_PCMOUT = 22,
eSEL_AC_PCMIN = 23,
eSEL_AC_MICIN = 24,
eSEL_PWM = 25,
eSEL_IRDA = 26,
eSEL_EXTERNAL = 27,
eSEL_SECU_RX = 30,
eSEL_SECU_TX = 31
}DMASELECT_eID;
typedef enum EBIPrio_ID
{
// Value & 0xF0 : Priority Type, 0: Fixed, 1: Circular
// Value & 0x0F : The Fixed Priority Order
eEBI_CIRCULAR = 0x10, // Circular Priority
eEBI_FIX0 = 0x00, // Fixed Type0 : DMC0-SROMC-OND0-OND1-NFC-CFC
eEBI_FIX1 = 0x01, // Fixed Type1 : DMC0-OND0-OND1-SROMC-NFC-CFC
eEBI_FIX2 = 0x02, // Fixed Type2 : DMC0-OND1-NFC-SROMC-OND0-CFC
eEBI_FIX3 = 0x03, // Fixed Type3 : DMC0-NFC-SROMC-OND0-OND1-CFC
eEBI_FIX4 = 0x04, // Fixed Type4 : DMC0-CFC-SROMC-OND0-OND1-NFC
eEBI_FIX5 = 0x05 // Fixed Type5 : SROMC-DMC0-OND0-OND1-NFC-CFC
}EBIPrio_eID;
typedef enum SelCS_MEM0
{
eCS_SROMC = 0,
eCS_CFC = 1,
eCS_ONDC = 2,
eCS_NFC = 3
}SelCS_eMEM0;
typedef enum CFG_WFI
{
eIGNORE = 0,
eIDLE = 1,
eSTOP = 2,
eSLEEP = 3
}CFG_eWFI;
typedef enum BATFLT_MODE
{
eFLT_IGNORE = 0,
eFLT_INT = 1,
eFLT_SLEEP = 3 // Manual Changed
}BATFLT_eMODE;
typedef enum WKUPMSK_ID
{
// Value & 0xF00 : Register Offset : 0 (rPWR_CFG), 1(rEINT_MASK)
// Value & 0x0FF : Bit Offset
eMASK_BATF = 0x000,
eMASK_KEY = 0x001,
eMASK_MSM = 0x002,
eMASK_ALARM = 0x003,
eMASK_TICK = 0x004,
eMASK_TS = 0x005,
eMASK_HSI = 0x006,
eMASK_MMC0 = 0x007,
eMASK_MMC1 = 0x008,
eMASK_MMC2 = 0x009,
eMASK_EINT0 = 0x100,
eMASK_EINT1 = 0x101,
eMASK_EINT2 = 0x102,
eMASK_EINT3 = 0x103,
eMASK_EINT4 = 0x104,
eMASK_EINT5 = 0x105,
eMASK_EINT6 = 0x106,
eMASK_EINT7 = 0x107,
eMASK_EINT8 = 0x108,
eMASK_EINT9 = 0x109,
eMASK_EINT10 = 0x10A,
eMASK_EINT11 = 0x10B,
eMASK_EINT12 = 0x10C,
eMASK_EINT13 = 0x10D,
eMASK_EINT14 = 0x10E,
eMASK_EINT15 = 0x10F,
eMASK_EINT16 = 0x110,
eMASK_EINT17 = 0x111,
eMASK_EINT18 = 0x112,
eMASK_EINT19 = 0x113,
eMASK_EINT20 = 0x114,
eMASK_EINT21 = 0x115,
eMASK_EINT26 = 0x116,
eMASK_EINT27 = 0x117,
}WKUPMSK_eID;
typedef enum NORGFC_ID
{
eNOR_DOMAINV = 9,
eNOR_DOMAINI = 12,
eNOR_DOMAINP = 13,
eNOR_DOMAINF = 14,
eNOR_DOMAINS = 15,
eNOR_DOMAINETM = 16,
eNOR_IROM = 30,
}NORGFC_eID;
typedef enum SYSC_OPMode
{
eASYNC_MODE = 0,
eSYNC_MODE = 1
}SYSC_eOPMode;
#if 0 //EVT0
typedef enum APLL_OUT
{
eAPLL800M = 0x1900301,
eAPLL667M = 0x29b0601,
eAPLL600M = 0x2580601,
eAPLL560M = 0x2300601,
eAPLL550M = 0x2260601,
eAPLL540M = 0x21C0601,
eAPLL532M = 0x2140601,
eAPLL520M = 0x2080601,
eAPLL510M = 0x1FE0601,
eAPLL500M = 0x1F40601,
eAPLL490M = 0x1EA0302,
eAPLL480M = 0x1E00302,
eAPLL470M = 0x1D60302,
eAPLL460M = 0x1CC0302,
eAPLL450M = 0x1C20302,
eAPLL440M = 0x1B80302,
eAPLL430M = 0x1AE0302,
eAPLL420M = 0x1A40302, // 420, 3, 2
eAPLL410M = 0x19A0302, // 410, 3, 2
eAPLL400M = 0x1900302, // 400, 3, 2
eAPLL380M = 0x17C0302,
eAPLL340M = 0x1540302,
eAPLL300M = 0x12C0302,
eAPLL266M = 0x2140602,
eAPLL200M = 0x1900303,
eAPLL133M = 0x2140603,
eAPLL100M = 0x1900304,
eAPLL66_5M = 0x2140604,
eAPLL50M = 0x1900305,
}APLL_eOUT;
#else //EVT1
typedef enum APLL_OUT
{
eAPLL667M = 0x29b0302, // 667, 3, 2
eAPLL532M = 0x2140302, // 532, 3, 2
eAPLL500M = 0x1F40302, // 500, 3, 2
eAPLL400M = 0x1900302, // 400, 3, 2
eAPLL380M = 0x17C0302, // 380, 3, 2
eAPLL266M = 0x2140303, // 532, 3, 3
eAPLL200M = 0x1900303 // 400, 3, 3
}APLL_eOUT;
#endif
/******************************************/
/* Function Define */
/******************************************/
#define Outp32Inform(No_Reg, data) (*(volatile u32 *)(0x7E00FA00+ 4*No_Reg) = (data))
#define Inp32Inform(No_Reg) (*(volatile u32 *)(0x7E00FA00+ 4*No_Reg))
#define Outp32SYSC(Offset, data) (*(volatile u32 *)(0x7E00F000+ Offset) = (data))
#define Inp32SYSC(Offset) (*(volatile u32 *)(0x7E00F000+Offset))
#define SYSC_SWRST() {Outp32SYSC(0x114, 0x6400);}
#define SYSC_EBICF() {Outp32SYSC(0x120, Inp32SYSC(0x120)&~(1<<14));}
#define SYSC_IndepCF() {Outp32SYSC(0x120, Inp32SYSC(0x120)|(1<<14));}
#define SYSC_8bitBUS() {Outp32SYSC(0x120, Inp32SYSC(0x120)&~(1<<12));}
#define SYSC_16bitBUS() {Outp32SYSC(0x120, Inp32SYSC(0x120)|(1<<12));}
#define SYSC_ExpandMEM1() {Outp32SYSC(0x120, Inp32SYSC(0x120)&~(1<<7));}
#define SYSC_ExpandMEM0() {Outp32SYSC(0x120, Inp32SYSC(0x120)|(1<<7));}
#define SYSC_DisOSC27() {Outp32SYSC(0x804, Inp32SYSC(0x804)&~(1<<0));}
#define SYSC_EnOSC27() {Outp32SYSC(0x804, Inp32SYSC(0x804)|(1<<0));}
#define SYSC_DisOSCSLEEP() {Outp32SYSC(0x818, Inp32SYSC(0x818)&~(1<<0));}
#define SYSC_EnOSCSLEEP() {Outp32SYSC(0x818, Inp32SYSC(0x818)|(1<<0));}
#define SYSC_BLKPwrONAll() {Outp32SYSC(0x810, 0xFFFFFFFF);}
#define SYSC_BLKPwrOffAll() {Outp32SYSC(0x810, 0xBFFE0D00);}
#define SYSC_OSCFREQ(data) {Outp32SYSC(0x820,data);}
#define SYSC_OSCSTAB(data) {Outp32SYSC(0x824,data);}
#define SYSC_PWRSTAB(data) {Outp32SYSC(0x828,data);}
#define SYSC_FPCSTAB(data) {Outp32SYSC(0x82c,data);}
#define SYSC_MTCSTAB(data) {Outp32SYSC(0x830,data);}
#define SYSC_OTGSIGDisMSK() {Outp32SYSC(0x900, Inp32SYSC(0x900)&~(1<<16));}
#define SYSC_OTGSIGEnMSK() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<16));}
#define SYSC_OTGDisPwr() {Outp32SYSC(0x900, Inp32SYSC(0x900)&~(1<<14));}
#define SYSC_OTGEnPwr() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<14));}
#define SYSC_ClrDBGACK() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<13));}
#define SYSC_DisDBG() {Outp32SYSC(0x900, Inp32SYSC(0x900)&~(1<<3));}
#define SYSC_EnDBG() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<3));}
#define SYSC_DisNonInvDBG() {Outp32SYSC(0x900, Inp32SYSC(0x900)&~(1<<2));}
#define SYSC_EnNonInvDBG() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<2));}
#define SYSC_DisInvDBG() {Outp32SYSC(0x900, Inp32SYSC(0x900)&~(1<<1));}
#define SYSC_EnInvDBG() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<1));}
#define SYSC_EnCP15() {Outp32SYSC(0x900, Inp32SYSC(0x900)&~(1<<0));}
#define SYSC_DisCP15() {Outp32SYSC(0x900, Inp32SYSC(0x900)|(1<<0));}
void SYSC_ReadSystemID( void);
void SYSC_GetClkInform( void);
void SYSC_SetPLL(PLL_eTYPE ePLL, u32 uMdiv, u32 uPdiv, u32 uSdiv, u32 uKdiv);
void SYSC_StopPLL(PLL_eTYPE ePLL);
void SYSC_ChangeSYSCLK(APLL_eOUT eAPLLMPS, APLL_eOUT eMPLLMPS, u32 uARM_Ratio, u32 uHCLKx2_Ratio, u32 uPCLK_Ratio);
void SYSC_ChangeSYSCLK_1(APLL_eOUT eAPLLMPS, APLL_eOUT eMPLLMPS, u32 uARM_Ratio, u32 uHCLKx2_Ratio,u32 uPCLK_Ratio);
bool SYSC_RdLockDetect(PLL_eTYPE ePLL);
void SYSC_SetLockTime( PLL_eTYPE ePLL, u32 uLockTime);
void SYSC_ClkSrc( CLKSRC_eId eClkSrc);
void SYSC_SetDIV0( u32 uAratio, u32 uMratio, u32 uHratio, u32 uHx2ratio, u32 uPratio,
u32 uONDratio, u32 uSECUratio, u32 uCAMratio, u32 uJPEGratio, u32 uMFCratio );
void SYSC_SetDIV1( u32 uMMC0ratio, u32 uMMC1ratio, u32 uMMC2ratio, u32 uLCDratio, u32 uSCALERratio, u32 uHOSTratio) ;
void SYSC_SetDIV0_all(u32 uSetRatio);
u32 SYSC_GetDIV0( void);
void SYSC_SetDIV2( u32 uSPI0ratio , u32 uSPI1ratio, u32 uAUDIO0ratio, u32 uAUDIO1ratio, u32 uUARTratio, u32 uIRDAratio);
void SYSC_CtrlHCLKGate( H_eGATE eHCLKGATE , u32 uCtrl);
void SYSC_CtrlPCLKGate( P_eGATE ePCLKGATE , u32 uCtrl);
void SYSC_CtrlSCLKGate( S_eGATE eSCLKGATE , u32 uCtrl);
void SYSC_CtrlCLKOUT( CLKOUT_eTYPE eCLKOUT_TYPE, u32 uDivVAL);
void SYSC_CtrlDCLK( u32 uDCLKCMP, u32 uDCLKDIV, u32 uDCLKSEL, u32 uDCLKEN);
void SYSC_CtrlBUSPrio( BUSCTRL_eId eBusId);
void SYSC_SelectDMA( DMASELECT_eID eSEL_DMA, u32 uSEL);
void SYSC_CtrlEBIPrio( EBIPrio_eID eEBIId);
void SYSC_CtrlCSMEM0( SelCS_eMEM0 eM0CSn2, SelCS_eMEM0 eM0CSn3, SelCS_eMEM0 eM0CSn4, SelCS_eMEM0 eM0CSn5 );
void SYSC_RdMEMCFGSTAT( void );
void SYSC_SetCFGWFI( CFG_eWFI eWFIMode, u32 uOSCCLK);
void SYSC_SetBATF( BATFLT_eMODE eBATFLT, u32 uINTSRC);
void SYSC_SetSTOPCFG( u32 uMEM_ARM, u32 uMEM_Top, u32 uLogic_ARM, u32 uLogic_Top);
void SYSC_SetWakeMASK( WKUPMSK_eID eWKUPSRC, u32 uMaskCtrl);
void SYSC_CtrlNORCFG( NORGFC_eID eCFGId, u32 uPwrCtrl);
void SYSC_ChangeMode(SYSC_eOPMode eOPMode);
void SYSC_ClrBATFINT(void);
u32 SYSC_RdRSTSTAT(u32 uPRINT);
void SYSC_RdBLKPWR(void);
void SYSC_ClrWKUPSTAT(void);
void LTC3714_VoltageSet(u32 uPwr, u32 uVoltage) ;
#ifdef __cplusplus
}
#endif
#endif //__SYSC_H__
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