?? uart.c
字號:
*g_pFifoDebug++ = (Inp32(&pUartRegs->rUfStat)>>8)&0x3f;
*g_pFifoDebug = 0;
while (!(Inp32(&pUartRegs->rUfStat )& (1<<14)) && (*g_pUartTxStr[ch] != TX_END_CHAR)) //until tx fifo full or end of string
Outp32(&pUartRegs->rUtxh , *g_pUartTxStr[ch]++);
if(*g_pUartTxStr[ch] == TX_END_CHAR)
{
*(g_pUartTxStr[ch]+1) = NULL;
g_AisTxDone[ch] = 1;
uTemp = Inp32(&pUartRegs->rUintM);
uTemp |= BIT_UART_TXD;
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM |= (BIT_UART_TXD);
return;
}
else
{
uTemp = Inp32(&pUartRegs->rUintM);
uTemp &= ~( BIT_UART_TXD);
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM &= ~(BIT_UART_TXD);
}
}
else // 0 : fifo disable
{
if (*g_pUartTxStr[ch] != TX_END_CHAR)
{
Outp32(&pUartRegs->rUtxh , *g_pUartTxStr[ch]++);
uTemp = Inp32(&pUartRegs->rUintM);
uTemp &= ~( BIT_UART_TXD);
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM &= ~(BIT_UART_TXD);
}
else
{
*(g_pUartTxStr[ch]+1) = NULL;
g_AisTxDone[ch] = 1;
return;
}
}
}
// Rx ISR
if (Inp32(&pUartRegs->rUintP) & BIT_UART_RXD)
{
uTemp = Inp32(&pUartRegs->rUintM);
uTemp |= BIT_UART_RXD;
Outp32(&pUartRegs->rUintM , uTemp);
Outp32(&pUartRegs->rUintSp , BIT_UART_RXD);
Outp32(&pUartRegs->rUintP , BIT_UART_RXD);
if (pUartRegs->rUfCon & 1) // 1 : fifo enable
{
// for debugging fifo
*g_pFifoDebug++ = ++g_uFcnt;
*g_pFifoDebug++ = (Inp32(&pUartRegs->rUfCon)>>4)&3;
*g_pFifoDebug++ = (Inp32(&pUartRegs->rUfStat))&0x3f;
*g_pFifoDebug = 0;
while (Inp32(&pUartRegs->rUfStat )& 0x3f) //until rx fifo count 0
{
*g_pUartRxStr[ch] = (u8)(Inp32(&pUartRegs->rUrxh));
*g_pUartRxStr[ch]++;
// printf("%c", *g_pUartRxStr[ch]++);
}
if(*(g_pUartRxStr[ch]-1) == RX_END_CHAR)
{
*g_pUartRxStr[ch] = NULL;
g_AisRxDone[ch] = 1;
uTemp = Inp32(&pUartRegs->rUintM);
uTemp |= ( BIT_UART_RXD);
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM |= (BIT_UART_RXD);
return;
}
else
{
uTemp = Inp32(&pUartRegs->rUintM);
uTemp &= ~( BIT_UART_RXD);
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM &= ~(BIT_UART_RXD);
}
}
else // 0 : fifo disable
{
tempChar = (u8)(Inp32(&pUartRegs->rUrxh));
if (tempChar != RX_END_CHAR)
{
// printf("%c", tempChar);
*g_pUartRxStr[ch]++ = tempChar;
}
else
{
*g_pUartRxStr[ch] = NULL;
// printf("\n");
g_AisRxDone[ch] = 1;
return;
}
uTemp = Inp32(&pUartRegs->rUintM);
uTemp &= ~( BIT_UART_RXD);
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM &= ~(BIT_UART_RXD);
}
}
// Modem UART ISR
if ((Inp32(&pUartRegs->rUintP ))& BIT_UART_MODEM)
{
uTemp = Inp32(&pUartRegs->rUintM);
uTemp |= BIT_UART_MODEM;
Outp32(&pUartRegs->rUintM , uTemp);
Outp32(&pUartRegs->rUintSp , BIT_UART_MODEM);
Outp32(&pUartRegs->rUintP , BIT_UART_MODEM);
// Implementation for modem uart
printf("Modem Int Occured!\n");
uTemp = Inp32(&pUartRegs->rUintM);
uTemp &= ~( BIT_UART_MODEM);
Outp32(&pUartRegs->rUintM , uTemp);
// pUartRegs->rUintM &= ~(BIT_UART_MODEM);
}
// unknown UART interrupt
if (Inp32(&pUartRegs->rUintP )& ~(BIT_UART_MODEM|BIT_UART_TXD|BIT_UART_ERROR|BIT_UART_RXD))
printf("UARTx sub INT - unknown sub interrupt!!\n");
}
//////////
// Function Name : Isr_Dma
// Function Description : This is Uart DMA request ISR which operates DMA request
// Input : NONE
// Output : NONE
// Version : v0.1
void __irq Isr_Dma(void) // only one for test
{
u32 uStatus;
u32 uConfig;
u32 uRegTmp;
u32 uRegTmp2;
u8 ch;
u32 uCnt;
INTC_Disable(NUM_DMA0);
uStatus = DMAC_IntStatus(&oUARTDma);
if (uStatus&0x1) // Tx
{
DMACH_Stop(&oUARTDma);
DMACH_ClearIntPending(&oUARTDma);
DMACH_ClearErrIntPending(&oUARTDma);
uConfig = DMACH_Configuration(&oUARTDma);
ch = ((uConfig & 0x3c0)>>6)>>1; //find UART ch fr request src
g_AisTxDone[ch] = 1;
}
else if (uStatus&0x2) // Rx
{
DMACH_Stop(&oUARTDma);
DMACH_ClearIntPending(&oUARTDma);
DMACH_ClearErrIntPending(&oUARTDma);
uConfig = DMACH_Configuration(&oUARTDma);
ch = (((uConfig & 0x1e)>>1)-1)>>1; //find UART ch fr request src
for (uCnt=0; uCnt<DMA_BUF_LEN; uCnt++)
*g_pUartRxStr[ch]++ = *g_pUartBuf++;
if ( *(g_pUartRxStr[ch]-1) == RX_END_CHAR )
{
g_AisRxDone[ch] = 1;
*g_pUartRxStr[ch] = NULL; // added null after rx string
}
else
{
DMACH_ClearIntPending(&oUARTDma);
DMACH_ClearErrIntPending(&oUARTDma);
uRegTmp = DMACH_ReadDstAddr(&oUARTDma);
uRegTmp+=1;
uRegTmp2 = DMACH_ReadSrcAddr(&oUARTDma); // next SrcAddress
DMACH_AddrSetup(DMA_B,uRegTmp2,uRegTmp,&oUARTDma);
DMACH_SetTransferSize(8,&oUARTDma); // set TransferSize
DMACH_Start(&oUARTDma);
}
}
INTC_Enable(NUM_DMA0);
INTC_ClearVectAddr();
}
//////////
// Function Name : UART_SetConfig
// Function Description : This function set up UART by pre-defined value (input)
// Input :
// Channel(0~3)
// Other Options 0. Nothing[D] 1.Send Break Signal 2. Loop Back Mode
// Parity Mode 1. No parity[D] 2. Odd 3. Even 4. Forced as '1' 5. Forced as '0'
// Number of Stop Bit 1. One stop bit per frame[D] 2. Two stop bit per frame
// Word Length 1. 5bits 2. 6bits 3. 7bits 4. 8bits
// Operating Clock 1. PCLK[D] 2. UEXTCLK 3. PLL
// PLL selection 1.EPLL 2.MPLL
// External Interface Type 1. UART[D] 2. IrDA mode
// Baudrate (ex 9600, 115200[D], 921600)
// Operating Mode 1. Interrupt[D] 2. DMA
// FIFO Mode (Tx/Rx[byte]) 1. no FIFO[D] 2. Empty/1 3. 16/8 4. 32/16 5. 48/32
// AFC Mode 1. Disable[D] 2. Enable
// nRTS trigger level(byte) 1. 63[D] 2. 56 3. 48 4. 40 5. 32 6. 24 7. 16 8. 8
// Output : NONE
// Version : v0.1
// default UART channel setting is UART_SetConfig(0,0,1,1,4,1,2,1,115200,1,1,1,1)
u8 UART_SetConfig(u8 cCh, u32 uBreakorLoop,u32 uParity,u32 uNumStop,u32 uWordLength,u32 uOpCLK,u32 uSelPLL,
u32 uExtIFtype,u32 uBaudrate,u32 uSelOpmode,u32 uSelFIFO,u32 uSelAFC,u32 uRTSLvL)
{
volatile UART_CON *pUartCon;
pUartCon = &g_AUartCon[cCh];
//Set Other Options
// printf("\nSelect Other Options\n 0. Nothing[D] 1.Send Break Signal 2. Loop Back Mode \n Choose : ");
switch(uBreakorLoop)
{
default :
pUartCon->cSendBreakSignal = 0x0;
pUartCon->cLoopTest = 0x0;
break;
case 1 :
pUartCon->cSendBreakSignal = 1;
return cCh;
case 2 :
pUartCon->cLoopTest = 1;
break;
}
//Set Parity mode
// printf("\nSelect Parity Mode\n 1. No parity[D] 2. Odd 3. Even 4. Forced as '1' 5. Forced as '0' \n Choose : ");
switch(uParity)
{
default :
pUartCon->cParityBit = 0;
break;
case 2 :
pUartCon->cParityBit = 4;
break;
case 3 :
pUartCon->cParityBit = 5;
break;
case 4 :
pUartCon->cParityBit = 6;
break;
case 5 :
pUartCon->cParityBit = 7;
break;
}
//Set the number of stop bit
// printf("\n\nSelect Number of Stop Bit\n 1. One stop bit per frame[D] 2. Two stop bit per frame");
switch(uNumStop)
{
default :
pUartCon->cStopBit = 0;
break;
case 2 :
pUartCon->cStopBit = 1;
break;
}
//Set Word Length
// printf("\n\nSelect Word Length\n 1. 5bits 2. 6bits 3. 7bits 4. 8bits[D] \n Choose : ");
switch(uWordLength)
{
case 1 :
pUartCon->cDataBit = 0;
break;
case 2 :
pUartCon->cDataBit = 1;
break;
case 3 :
pUartCon->cDataBit = 2;
break;
default :
pUartCon->cDataBit = 3;
break;
}
// Set Operation clock
// printf("\n\nSelect Operating Clock\n 1. PCLK[D] 2. UEXTCLK 3. EPLL \n Choose : ");
switch (uOpCLK)
{
case 2 :
pUartCon->cOpClock = 1;
// g_uOpClock=12000000;
GPIO_SetFunctionEach(eGPIO_F,eGPIO_13,2);
// connect CLKOUT and UEXTCLK
// printf("\nInput PWM EXT_CLK by Pulse Generater\n");
break;
case 3 :
pUartCon->cOpClock = 3;
// printf("\nSelect Clock SRC\n 1.EPLL 2.MPLL \n Choose: ");
switch(uSelPLL)
{
case 1:
// SYSC_SetPLL(eEPLL,64,3,1,0); //EPLL=128Mhz
SYSC_SetPLL(eEPLL,32,1,1,0); //EPLL=192Mhz
SYSC_ClkSrc(eEPLL_FOUT);
SYSC_ClkSrc(eUART_MOUTEPLL);
// SYSC_CtrlCLKOUT(eCLKOUT_EPLLOUT,9);
g_uOpClock = CalcEPLL(32,1,1,0);
// printf("EPLL = %dMhz\n",(g_uOpClock/1000000));
// use EPLL output clock
//SetEPLL(42, 1, 2); // Epll output - 96MHz, pll input - 12MHz
//CLK_SRC UART_SEL[13] 0:EPLL
//CLK_DIV2 UART_RATIO[19:16]
break;
case 2: //MPLL
SYSC_ClkSrc(eMPLL_FOUT);
SYSC_ClkSrc(eUART_DOUTMPLL);
Delay(100);
g_uOpClock = (u32)g_MPLL/2;
// printf("MPLL = %dMhz\n",(g_uOpClock/1000000));
// use MPLL output clock
//CLK_SRC UART_SEL[13] 1:MPLL
//CLK_DIV2 UART_RATIO[19:16]
break;
default: //MPLL
SYSC_ClkSrc(eMPLL_FOUT);
SYSC_ClkSrc(eUART_DOUTMPLL);
Delay(100);
g_uOpClock =(u32) g_MPLL/2;
//SetEPLL(42, 1, 2); // Epll output - 96MHz, pll input - 12MHz
//CLK_SRC UART_SEL[13] 0:EPLL
//CLK_DIV2 UART_RATIO[19:16]
break;
}
break;
default :
pUartCon->cOpClock = 0; // PCLK
break;
}
// Select UART or IrDA 1.0
// printf("\n\nSelect External Interface Type\n 1. UART[D] 2. IrDA mode\n Choose : ");
if (uExtIFtype==2)
pUartCon->cSelUartIrda = 1; // IrDA mode
else
pUartCon->cSelUartIrda = 0; // IrDA mode
// Set Baudrate
// printf("\n\nType the baudrate and then change the same baudrate of host, too.\n");
// printf(" Baudrate (ex 9600, 115200[D], 921600) : ");
pUartCon->uBaudrate = uBaudrate;
// if ((s32)pUartCon->uBaudrate == -1)
// pUartCon->uBaudrate = 115200;
// Select UART operating mode
// printf("\n\nSelect Operating Mode\n 1. Interrupt[D] 2. DMA\n Choose : ");
if (uSelOpmode==2)
{
pUartCon->cTxMode = 2; // DMA0 mode
pUartCon->cRxMode = 3; // DMA1 mode
}
else
{
pUartCon->cTxMode = 1; // Int mode
pUartCon->cRxMode = 1; // Int mode
}
// Select UART FIFO mode
// printf("\n\nSelect FIFO Mode (Tx/Rx[byte])\n 1. no FIFO[D] 2. Empty/1 3. 16/8 4. 32/16 5. 48/32 \n Choose : ");
if ( (uSelFIFO>1)&&(uSelFIFO<6) )
{
pUartCon->cEnableFifo = 1;
pUartCon->cTxTrig = uSelFIFO -2;
pUartCon->cRxTrig = uSelFIFO -2;
}
else
{
pUartCon->cEnableFifo = 0;
}
// Select AFC mode enable/disable
// printf("\n\nSelect AFC Mode\n 1. Disable[D] 2. Enable\n Choose : ");
if (uSelAFC == 2)
{
pUartCon->cAfc = 1; // AFC mode enable
// printf("Select nRTS trigger level(byte)\n 1. 63[D] 2. 56 3. 48 4. 40 5. 32 6. 24 7. 16 8. 8\n Choose : ");
if ( (uRTSLvL>1)&&(uRTSLvL<9) )
pUartCon->cRtsTrig = uRTSLvL -1;
else
pUartCon->cRtsTrig = 0; // default 63 byte
}
else
{
pUartCon->cAfc = 0; // AFC mode disable
}
return cCh;
}
//////////
// Function Name : CalcEPLL
// Function Description : This is Uart DMA request ISR which operates DMA request
// Input : NONE
// Output : NONE
// Version : v0.1
u32 CalcEPLL(u32 uMdiv,u32 uPdiv,u32 uSdiv,u32 uKdiv)
{
float EPLL;
EPLL=(((uMdiv+(uKdiv/(2<<16)))*FIN)/(uPdiv*(1<<uSdiv)));
return (u32)EPLL;
}
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