#endif


// PWM TIMER
#define rTCFG0  (*(volatile unsigned *)0x51000000) //Timer 0 configuration
#define rTCFG1  (*(volatile unsigned *)0x51000004) //Timer 1 configuration
#define rTCON   (*(volatile unsigned *)0x51000008) //Timer control
#define rTCNTB0 (*(volatile unsigned *)0x5100000c) //Timer count buffer 0
#define rTCMPB0 (*(volatile unsigned *)0x51000010) //Timer compare buffer 0
#define rTCNTO0 (*(volatile unsigned *)0x51000014) //Timer count observation 0
#define rTCNTB1 (*(volatile unsigned *)0x51000018) //Timer count buffer 1
#define rTCMPB1 (*(volatile unsigned *)0x5100001c) //Timer compare buffer 1
#define rTCNTO1 (*(volatile unsigned *)0x51000020) //Timer count observation 1
#define rTCNTB2 (*(volatile unsigned *)0x51000024) //Timer count buffer 2
#define rTCMPB2 (*(volatile unsigned *)0x51000028) //Timer compare buffer 2
#define rTCNTO2 (*(volatile unsigned *)0x5100002c) //Timer count observation 2
#define rTCNTB3 (*(volatile unsigned *)0x51000030) //Timer count buffer 3
#define rTCMPB3 (*(volatile unsigned *)0x51000034) //Timer compare buffer 3
#define rTCNTO3 (*(volatile unsigned *)0x51000038) //Timer count observation 3
#define rTCNTB4 (*(volatile unsigned *)0x5100003c) //Timer count buffer 4
#define rTCNTO4 (*(volatile unsigned *)0x51000040) //Timer count observation 4


// USB DEVICE
#ifdef __BIG_ENDIAN
<ERROR IF BIG_ENDIAN>
#define rFUNC_ADDR_REG     (*(volatile unsigned char *)0x52000143) //Function address
#define rPWR_REG           (*(volatile unsigned char *)0x52000147) //Power management
#define rEP_INT_REG        (*(volatile unsigned char *)0x5200014b) //EP Interrupt pending and clear
#define rUSB_INT_REG       (*(volatile unsigned char *)0x5200015b) //USB Interrupt pending and clear
#define rEP_INT_EN_REG     (*(volatile unsigned char *)0x5200015f) //Interrupt enable
#define rUSB_INT_EN_REG    (*(volatile unsigned char *)0x5200016f)
#define rFRAME_NUM1_REG    (*(volatile unsigned char *)0x52000173) //Frame number lower byte
#define rFRAME_NUM2_REG    (*(volatile unsigned char *)0x52000177) //Frame number higher byte
#define rINDEX_REG         (*(volatile unsigned char *)0x5200017b) //Register index
#define rMAXP_REG          (*(volatile unsigned char *)0x52000183) //Endpoint max packet
#define rEP0_CSR           (*(volatile unsigned char *)0x52000187) //Endpoint 0 status
#define rIN_CSR1_REG       (*(volatile unsigned char *)0x52000187) //In endpoint control status
#define rIN_CSR2_REG       (*(volatile unsigned char *)0x5200018b)
#define rOUT_CSR1_REG      (*(volatile unsigned char *)0x52000193) //Out endpoint control status
#define rOUT_CSR2_REG      (*(volatile unsigned char *)0x52000197)
#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x5200019b) //Endpoint out write count
#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019f)
#define rEP0_FIFO          (*(volatile unsigned char *)0x520001c3) //Endpoint 0 FIFO
#define rEP1_FIFO          (*(volatile unsigned char *)0x520001c7) //Endpoint 1 FIFO
#define rEP2_FIFO          (*(volatile unsigned char *)0x520001cb) //Endpoint 2 FIFO
#define rEP3_FIFO          (*(volatile unsigned char *)0x520001cf) //Endpoint 3 FIFO
#define rEP4_FIFO          (*(volatile unsigned char *)0x520001d3) //Endpoint 4 FIFO
#define rEP1_DMA_CON       (*(volatile unsigned char *)0x52000203) //EP1 DMA interface control
#define rEP1_DMA_UNIT      (*(volatile unsigned char *)0x52000207) //EP1 DMA Tx unit counter
#define rEP1_DMA_FIFO      (*(volatile unsigned char *)0x5200020b) //EP1 DMA Tx FIFO counter
#define rEP1_DMA_TTC_L     (*(volatile unsigned char *)0x5200020f) //EP1 DMA total Tx counter
#define rEP1_DMA_TTC_M     (*(volatile unsigned char *)0x52000213)
#define rEP1_DMA_TTC_H     (*(volatile unsigned char *)0x52000217)
#define rEP2_DMA_CON       (*(volatile unsigned char *)0x5200021b) //EP2 DMA interface control
#define rEP2_DMA_UNIT      (*(volatile unsigned char *)0x5200021f) //EP2 DMA Tx unit counter
#define rEP2_DMA_FIFO      (*(volatile unsigned char *)0x52000223) //EP2 DMA Tx FIFO counter
#define rEP2_DMA_TTC_L     (*(volatile unsigned char *)0x52000227) //EP2 DMA total Tx counter
#define rEP2_DMA_TTC_M     (*(volatile unsigned char *)0x5200022b)
#define rEP2_DMA_TTC_H     (*(volatile unsigned char *)0x5200022f)
#define rEP3_DMA_CON       (*(volatile unsigned char *)0x52000243) //EP3 DMA interface control
#define rEP3_DMA_UNIT      (*(volatile unsigned char *)0x52000247) //EP3 DMA Tx unit counter
#define rEP3_DMA_FIFO      (*(volatile unsigned char *)0x5200024b) //EP3 DMA Tx FIFO counter
#define rEP3_DMA_TTC_L     (*(volatile unsigned char *)0x5200024f) //EP3 DMA total Tx counter
#define rEP3_DMA_TTC_M     (*(volatile unsigned char *)0x52000253)
#define rEP3_DMA_TTC_H     (*(volatile unsigned char *)0x52000257)
#define rEP4_DMA_CON       (*(volatile unsigned char *)0x5200025b) //EP4 DMA interface control
#define rEP4_DMA_UNIT      (*(volatile unsigned char *)0x5200025f) //EP4 DMA Tx unit counter
#define rEP4_DMA_FIFO      (*(volatile unsigned char *)0x52000263) //EP4 DMA Tx FIFO counter
#define rEP4_DMA_TTC_L     (*(volatile unsigned char *)0x52000267) //EP4 DMA total Tx counter
#define rEP4_DMA_TTC_M     (*(volatile unsigned char *)0x5200026b)
#define rEP4_DMA_TTC_H     (*(volatile unsigned char *)0x5200026f)

#else  // Little Endian
#define rFUNC_ADDR_REG     (*(volatile unsigned char *)0x52000140) //Function address
#define rPWR_REG           (*(volatile unsigned char *)0x52000144) //Power management
#define rEP_INT_REG        (*(volatile unsigned char *)0x52000148) //EP Interrupt pending and clear
#define rUSB_INT_REG       (*(volatile unsigned char *)0x52000158) //USB Interrupt pending and clear
#define rEP_INT_EN_REG     (*(volatile unsigned char *)0x5200015c) //Interrupt enable
#define rUSB_INT_EN_REG    (*(volatile unsigned char *)0x5200016c)
#define rFRAME_NUM1_REG    (*(volatile unsigned char *)0x52000170) //Frame number lower byte
#define rFRAME_NUM2_REG    (*(volatile unsigned char *)0x52000174) //Frame number higher byte
#define rINDEX_REG         (*(volatile unsigned char *)0x52000178) //Register index
#define rMAXP_REG          (*(volatile unsigned char *)0x52000180) //Endpoint max packet
#define rEP0_CSR           (*(volatile unsigned char *)0x52000184) //Endpoint 0 status
#define rIN_CSR1_REG       (*(volatile unsigned char *)0x52000184) //In endpoint control status
#define rIN_CSR2_REG       (*(volatile unsigned char *)0x52000188)
#define rOUT_CSR1_REG      (*(volatile unsigned char *)0x52000190) //Out endpoint control status
#define rOUT_CSR2_REG      (*(volatile unsigned char *)0x52000194)
#define rOUT_FIFO_CNT1_REG (*(volatile unsigned char *)0x52000198) //Endpoint out write count
#define rOUT_FIFO_CNT2_REG (*(volatile unsigned char *)0x5200019c)
#define rEP0_FIFO          (*(volatile unsigned char *)0x520001c0) //Endpoint 0 FIFO
#define rEP1_FIFO          (*(volatile unsigned char *)0x520001c4) //Endpoint 1 FIFO
#define rEP2_FIFO          (*(volatile unsigned char *)0x520001c8) //Endpoint 2 FIFO
#define rEP3_FIFO          (*(volatile unsigned char *)0x520001cc) //Endpoint 3 FIFO
#define rEP4_FIFO          (*(volatile unsigned char *)0x520001d0) //Endpoint 4 FIFO
#define rEP1_DMA_CON       (*(volatile unsigned char *)0x52000200) //EP1 DMA interface control
#define rEP1_DMA_UNIT      (*(volatile unsigned char *)0x52000204) //EP1 DMA Tx unit counter
#define rEP1_DMA_FIFO      (*(volatile unsigned char *)0x52000208) //EP1 DMA Tx FIFO counter
#define rEP1_DMA_TTC_L     (*(volatile unsigned char *)0x5200020c) //EP1 DMA total Tx counter
#define rEP1_DMA_TTC_M     (*(volatile unsigned char *)0x52000210)
#define rEP1_DMA_TTC_H     (*(volatile unsigned char *)0x52000214)
#define rEP2_DMA_CON       (*(volatile unsigned char *)0x52000218) //EP2 DMA interface control
#define rEP2_DMA_UNIT      (*(volatile unsigned char *)0x5200021c) //EP2 DMA Tx unit counter
#define rEP2_DMA_FIFO      (*(volatile unsigned char *)0x52000220) //EP2 DMA Tx FIFO counter
#define rEP2_DMA_TTC_L     (*(volatile unsigned char *)0x52000224) //EP2 DMA total Tx counter
#define rEP2_DMA_TTC_M     (*(volatile unsigned char *)0x52000228)
#define rEP2_DMA_TTC_H     (*(volatile unsigned char *)0x5200022c)
#define rEP3_DMA_CON       (*(volatile unsigned char *)0x52000240) //EP3 DMA interface control
#define rEP3_DMA_UNIT      (*(volatile unsigned char *)0x52000244) //EP3 DMA Tx unit counter
#define rEP3_DMA_FIFO      (*(volatile unsigned char *)0x52000248) //EP3 DMA Tx FIFO counter
#define rEP3_DMA_TTC_L     (*(volatile unsigned char *)0x5200024c) //EP3 DMA total Tx counter
#define rEP3_DMA_TTC_M     (*(volatile unsigned char *)0x52000250)
#define rEP3_DMA_TTC_H     (*(volatile unsigned char *)0x52000254)
#define rEP4_DMA_CON       (*(volatile unsigned char *)0x52000258) //EP4 DMA interface control
#define rEP4_DMA_UNIT      (*(volatile unsigned char *)0x5200025c) //EP4 DMA Tx unit counter
#define rEP4_DMA_FIFO      (*(volatile unsigned char *)0x52000260) //EP4 DMA Tx FIFO counter
#define rEP4_DMA_TTC_L     (*(volatile unsigned char *)0x52000264) //EP4 DMA total Tx counter
#define rEP4_DMA_TTC_M     (*(volatile unsigned char *)0x52000268)
#define rEP4_DMA_TTC_H     (*(volatile unsigned char *)0x5200026c)
#endif   // __BIG_ENDIAN


// WATCH DOG TIMER
#define rWTCON   (*(volatile unsigned *)0x53000000) //Watch-dog timer mode
#define rWTDAT   (*(volatile unsigned *)0x53000004) //Watch-dog timer data
#define rWTCNT   (*(volatile unsigned *)0x53000008) //Eatch-dog timer count


// IIC
#define rIICCON  (*(volatile unsigned *)0x54000000) //IIC control
#define rIICSTAT (*(volatile unsigned *)0x54000004) //IIC status
#define rIICADD  (*(volatile unsigned *)0x54000008) //IIC address
#define rIICDS   (*(volatile unsigned *)0x5400000c) //IIC data shift


// IIS
#define rIISCON  (*(volatile unsigned *)0x55000000) //IIS Control
#define rIISMOD  (*(volatile unsigned *)0x55000004) //IIS Mode
#define rIISPSR  (*(volatile unsigned *)0x55000008) //IIS Prescaler
#define rIISFCON (*(volatile unsigned *)0x5500000c) //IIS FIFO control

#ifdef __BIG_ENDIAN
#define IISFIFO  ((volatile unsigned short *)0x55000012) //IIS FIFO entry

#else //Little Endian
#define IISFIFO  ((volatile unsigned short *)0x55000010) //IIS FIFO entry

#endif


// I/O PORT 
#define rGPACON    (*(volatile unsigned *)0x56000000) //Port A control
#define rGPADAT    (*(volatile unsigned *)0x56000004) //Port A data
                        
#define rGPBCON    (*(volatile unsigned *)0x56000010) //Port B control
#define rGPBDAT    (*(volatile unsigned *)0x56000014) //Port B data
#define rGPBUP     (*(volatile unsigned *)0x56000018) //Pull-up control B
                        
#define rGPCCON    (*(volatile unsigned *)0x56000020) //Port C control
#define rGPCDAT    (*(volatile unsigned *)0x56000024) //Port C data
#define rGPCUP     (*(volatile unsigned *)0x56000028) //Pull-up control C
                        
#define rGPDCON    (*(volatile unsigned *)0x56000030) //Port D control
#define rGPDDAT    (*(volatile unsigned *)0x56000034) //Port D data
#define rGPDUP     (*(volatile unsigned *)0x56000038) //Pull-up control D
                        
#define rGPECON    (*(volatile unsigned *)0x56000040) //Port E control
#define rGPEDAT    (*(volatile unsigned *)0x56000044) //Port E data
#define rGPEUP     (*(volatile unsigned *)0x56000048) //Pull-up control E
                        
#define rGPFCON    (*(volatile unsigned *)0x56000050) //Port F control
#define rGPFDAT    (*(volatile unsigned *)0x56000054) //Port F data
#define rGPFUP     (*(volatile unsigned *)0x56000058) //Pull-up control F
                        
#define rGPGCON    (*(volatile unsigned *)0x56000060) //Port G control
#define rGPGDAT    (*(volatile unsigned *)0x56000064) //Port G data
#define rGPGUP     (*(volatile unsigned *)0x56000068) //Pull-up control G
                        
#define rGPHCON    (*(volatile unsigned *)0x56000070) //Port H control
#define rGPHDAT    (*(volatile unsigned *)0x56000074) //Port H data
#define rGPHUP     (*(volatile unsigned *)0x56000078) //Pull-up control H
                        
#define rMISCCR    (*(volatile unsigned *)0x56000080) //Miscellaneous control
#define rDCLKCON   (*(volatile unsigned *)0x56000084) //DCLK0/1 control
#define rEXTINT0   (*(volatile unsigned *)0x56000088) //External interrupt control register 0
#define rEXTINT1   (*(volatile unsigned *)0x5600008c) //External interrupt control register 1
#define rEXTINT2   (*(volatile unsigned *)0x56000090) //External interrupt control register 2
#define rEINTFLT0  (*(volatile unsigned *)0x56000094) //Reserved
#define rEINTFLT1  (*(volatile unsigned *)0x56000098) //Reserved
#define rEINTFLT2  (*(volatile unsigned *)0x5600009c) //External interrupt filter control register 2
#define rEINTFLT3  (*(volatile unsigned *)0x560000a0) //External interrupt filter control register 3
#define rEINTMASK  (*(volatile unsigned *)0x560000a4) //External interrupt mask
#define rEINTPEND  (*(volatile unsigned *)0x560000a8) //External interrupt pending
#define rGSTATUS0  (*(volatile unsigned *)0x560000ac) //External pin status
#define rGSTATUS1  (*(volatile unsigned *)0x560000b0) //Chip ID(0x32410000)
#define rGSTATUS2  (*(volatile unsigned *)0x560000b4) //Reset type
#define rGSTATUS3  (*(volatile unsigned *)0x560000b8) //Saved data0(32-bit) before entering POWER_OFF mode