?? c5mstop.mdl
字號:
Model {
Name "c5mstop"
Version 4.00
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowStorageClass off
ExecutionOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
Created "Mon May 07 21:03:23 2001"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Mon Sep 24 07:51:33 2001"
ModelVersionFormat "1.%<AutoIncrement:36>"
ConfigurationManager "none"
SimParamPage "Solver"
StartTime "0.0"
StopTime "1000.0"
SolverMode "Auto"
Solver "ode45"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "auto"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime on
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput on
OutputSaveName "yout"
LoadInitialState off
InitialState "xInitial"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
LimitDataPoints on
MaxDataPoints "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
SingleTaskRateTransMsg "none"
MultiTaskRateTransMsg "error"
IntegerOverflowMsg "warning"
CheckForMatrixSingularity "none"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
LinearizationMsg "none"
VectorMatrixConversionMsg "none"
SfunCompatibilityCheckMsg "none"
BlockPriorityViolationMsg "warning"
ArrayBoundsChecking "none"
ConsistencyChecking "none"
ZeroCross on
Profile off
SimulationMode "normal"
RTWSystemTargetFile "grt.tlc"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
TLCProfiler off
TLCDebug off
TLCCoverage off
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
OptimizeBlockIOStorage on
BufferReuse on
ParameterPooling on
BlockReductionOpt off
RTWExpressionDepthLimit 5
BooleanDataType off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "c5mstop"
Location [398, 245, 990, 471]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "portrait"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType RelationalOperator
Name "-10>signal"
Position [465, 52, 495, 83]
Operator ">"
}
Block {
BlockType Abs
Name "Abs"
Position [150, 80, 180, 110]
SaturateOnIntegerOverflow on
}
Block {
BlockType Constant
Name "Constant"
Position [390, 15, 420, 45]
Value "-10"
VectorParams1D on
}
Block {
BlockType Integrator
Name "Integrator"
Ports [2, 1]
Position [335, 57, 365, 88]
ExternalReset "rising"
InitialConditionSource "internal"
InitialCondition "0"
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
AbsoluteTolerance "auto"
}
Block {
BlockType Step
Name "Step"
Position [15, 130, 45, 160]
Time "0"
Before "0"
After "1"
SampleTime "0"
VectorParams1D on
}
Block {
BlockType Stop
Name "Stop Simulation"
Position [530, 52, 565, 88]
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [95, 135, 115, 155]
ShowName off
IconShape "round"
Inputs "|+-"
SaturateOnIntegerOverflow on
}
Block {
BlockType TransportDelay
Name "Transport\nDelay"
Position [365, 130, 395, 160]
DelayTime "1"
InitialInput "0"
BufferSize "1024"
PadeOrder "0"
}
Block {
BlockType TransferFcn
Name "controller"
Position [155, 127, 215, 163]
Numerator "[0.5,0.6]"
Denominator "[1 0]"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType Gain
Name "inverter"
Position [245, 55, 275, 85]
Gain "-1"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType TransferFcn
Name "plant model"
Position [250, 124, 335, 166]
Numerator "[1]"
Denominator "[1 3 3 1]"
AbsoluteTolerance "auto"
Realization "auto"
}
Block {
BlockType Gain
Name "threshold 0.02"
Position [75, 45, 125, 75]
Gain "0.02"
Multiplication "Element-wise(K.*u)"
SaturateOnIntegerOverflow on
}
Block {
BlockType RelationalOperator
Name "|e|<0.02"
Position [200, 52, 230, 83]
Operator ">="
}
Block {
BlockType Outport
Name "output"
Position [440, 138, 470, 152]
Port "1"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "output1"
Position [435, 103, 465, 117]
Port "2"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Outport
Name "output2"
Position [275, 13, 305, 27]
Port "3"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Line {
SrcBlock "plant model"
SrcPort 1
DstBlock "Transport\nDelay"
DstPort 1
}
Line {
SrcBlock "controller"
SrcPort 1
DstBlock "plant model"
DstPort 1
}
Line {
SrcBlock "Sum"
SrcPort 1
Points [0, 0; 5, 0]
Branch {
DstBlock "controller"
DstPort 1
}
Branch {
Points [0, -50]
DstBlock "Abs"
DstPort 1
}
}
Line {
SrcBlock "Transport\nDelay"
SrcPort 1
Points [0, 0; 10, 0]
Branch {
Points [0, 70; -305, 0]
DstBlock "Sum"
DstPort 2
}
Branch {
DstBlock "output"
DstPort 1
}
}
Line {
SrcBlock "Step"
SrcPort 1
Points [10, 0]
Branch {
DstBlock "Sum"
DstPort 1
}
Branch {
DstBlock "threshold 0.02"
DstPort 1
}
}
Line {
SrcBlock "Abs"
SrcPort 1
DstBlock "|e|<0.02"
DstPort 2
}
Line {
SrcBlock "threshold 0.02"
SrcPort 1
DstBlock "|e|<0.02"
DstPort 1
}
Line {
SrcBlock "|e|<0.02"
SrcPort 1
DstBlock "inverter"
DstPort 1
}
Line {
SrcBlock "inverter"
SrcPort 1
Points [0, 0; 15, 0]
Branch {
Points [0, 0]
Branch {
Points [20, 0; 0, -5]
DstBlock "Integrator"
DstPort 1
}
Branch {
Points [20, 0; 0, 10]
DstBlock "Integrator"
DstPort 2
}
}
Branch {
Points [0, 0; 0, -20; -40, 0; 0, -30]
DstBlock "output2"
DstPort 1
}
}
Line {
SrcBlock "Integrator"
SrcPort 1
Points [0, 0; 20, 0]
Branch {
DstBlock "-10>signal"
DstPort 2
}
Branch {
Points [0, 35]
DstBlock "output1"
DstPort 1
}
}
Line {
SrcBlock "Constant"
SrcPort 1
Points [20, 0; 0, 30]
DstBlock "-10>signal"
DstPort 1
}
Line {
SrcBlock "-10>signal"
SrcPort 1
DstBlock "Stop Simulation"
DstPort 1
}
Annotation {
Position [296, 81]
Text "x1"
}
Annotation {
Position [394, 67]
Text "x2"
}
Annotation {
Position [150, 17]
Text "c5mstop.mdl"
FontName "Arial"
FontSize 12
FontWeight "bold"
}
}
}
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