?? maui_cal.h
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/* maui_cal.h - Maui calibration header definitions */
/* Copyright (c) 2000 Atheros Communications, Inc., All Rights Reserved */
#ifndef __INCmauicalh
#define __INCmauicalh
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* === Macro Definitions === */
#define WARNINGS_ON 0
// defines
#define MAX_RATES 8
#define INVALID_INDEX 9999
// unique EEPROM header maps defines
#define EEPROM_SIZE_16K 1
#define EEPROM_MAJOR_VERSION ART_VERSION_MAJOR
#define EEPROM_MINOR_VERSION ART_VERSION_MINOR
#define SENS11A_48 (-69)
#define SENS11A_54 (-68)
#define EEPBLK0 0
#define EEPBLK1 1
#define NUMEEPBLK 2
// Cardtypes as denoted by subsystem id value
#define ATHEROS_CB10 0x1010 // NOT SUPPORTED
#define ATHEROS_CB11 0x1011 // NOT SUPPORTED
#define ATHEROS_MB10 0x2010 // NOT SUPPORTED
#define ATHEROS_CB20 0x1020
#define ATHEROS_CB21 0x1021
#define ATHEROS_CB22 0x1022
#define ATHEROS_MB20 0x2020 // NOT SUPPORTED
#define ATHEROS_MB21 0x2021 // NOT SUPPORTED
#define ATHEROS_MB22 0x2022
#define ATHEROS_MB23 0x2023
#define ATHEROS_CB21G 0x1025
#define ATHEROS_CB22G 0x1026
#define ATHEROS_MB21G 0x2025
#define ATHEROS_MB22G 0x2026
#define ATHEROS_MB31G_DESTUFF 0x2030
#define ATHEROS_MB32AG 0x2031
#define ATHEROS_MB22G_DESTUFF 0x2027
#define ATHEROS_MB22AG_SINGLE 0x2029
#define ATHEROS_MB23_JAPAN 0x2024
#define ATHEROS_CB31G_DESTUFF 0x1030
#define ATHEROS_CB32AG 0x1031
#define ATHEROS_CB22G_DESTUFF 0x1027
#define ATHEROS_CB22AG_SINGLE 0x1029
#define ATHEROS_AP30 0xa032
#define ATHEROS_AP30_040 0xa034
#define ATHEROS_AP48 0xa048
#define ATHEROS_AP41 0xa041
#define ATHEROS_AP43 0xa043
#define ATHEROS_MB42 0x2042
#define ATHEROS_MB41 0x2041
#define ATHEROS_MB43 0x2043
#define ATHEROS_MB44 0x2044
#define ATHEROS_CB41 0x1041
#define ATHEROS_CB42 0x1042
#define ATHEROS_CB43 0x1043
#define ATHEROS_CB51 0x1051
#define ATHEROS_CB51_LITE 0x1052
#define ATHEROS_MB51 0x2051
#define ATHEROS_MB51_LITE 0x2052
#define ATHEROS_USB_UB51 0xb051
#define ATHEROS_USB_UB52 0xb052
#define ATHEROS_MB62 0x2062
#define ATHEROS_MB62_LITE 0x2063
#define ATHEROS_CB62 0x1062
#define ATHEROS_CB62_LITE 0x1063
#define ATHEROS_AP51_FULL 0xa051
#define ATHEROS_AP51_LITE 0xa052
#define ATHEROS_AP21 0xa021
#define devID_CB20 0x0011
#define devID_CB21 0x0012
#define devID_CB22 0x0012
#define devID_AP21 0x0011
#define devID_MB22 0x0012
#define devID_MB23 0x0012
#define SPEC_MASK_20MHZ 0x0001
#define SPEC_MASK_DSRC_20MHZ 0x0002
#define SPEC_MASK_DSRC_10MHZ 0x0004
#define SPEC_MASK_DSRC_5MHZ 0x0008
#define MODE_11g 0
#define MODE_11b 1
#define MODE_11a 2
#define BASE 0
#define TURBO 1
#define TEST_NORMAL_MODE 0x0001
#define TEST_TURBO_MODE 0x0002
#define TEST_HALF_MODE 0x0004
#define TEST_QUARTER_MODE 0x0008
#define CHANNEL_TEST_HALF_RATE 0x01
#define CHANNEL_TEST_QUART_RATE 0x02
// Setup files
//#define CALSETUP_FILE "calsetup.txt"
#define MACID_FILE "macid.txt"
//#ifdef PREDATOR_BUILD
//#define EEP_FILE "atheros-usb-eep.txt"
//#else
//#define EEP_FILE "atheros-eep.txt"
//#define EEP_FILE "atheros-usb-eep.txt"
//#endif
#define UART_PCI_CFG_FILE "atheros-uart-pcicfg-eep.txt"
//EEPROM related parameters
#define NUM_BAND_EDGES 8
#define NUM_TARGET_POWER_CHANNELS 8
#define NUM_TARGET_POWER_CHANNELS_11b 2
#define NUM_TARGET_POWER_CHANNELS_11g 3
#define NUM_PIERS 10
#define NUM_PIERS_2p4 3
#define NUM_TEST_CHANNELS 32 // max # of test channels
#define NUM_CORNER_FIX_CHANNELS 4
#define CAL_FORMAT_GEN2 0
#define CAL_FORMAT_GEN3 1
#define CAL_FORMAT_GEN5 2 //++JC++
#define SWAP_BYTES16(x) ((((x) >> 8) & 0xFF) | (((x) << 8) & 0xFF00))
#define INVALID_FG 10
#define NUM_VERIFY_DATA_PATTERNS 8
#define LEN_VERIFY_DATA_PATTERNS 8
//#define VERIFY_DATA_PACKET_LEN 3000
#define NO_CHIP_IDENTIFIER 0xffffffff
#define PCI_EXPRESS_CONFIG_PTR 0x80
#define READ_CONFIG 0xffffffff
typedef struct {
A_UINT32 pciConfigLocation;
A_UINT32 eepromLocation_MSB;
A_UINT32 eepromLocation_LSB;
} EEPROM_PCICONFIG_MAP;
typedef struct golenParams_t {
A_UINT16 channelStart;
A_UINT16 channelStop;
A_UINT16 channelStep;
A_UINT16 measurementStep;
A_UINT16 pcdacStart;
A_UINT16 pcdacStop;
A_UINT16 pcdacStep;
A_UINT16 numIntercepts;
#ifdef LINUX
A_UINT16 pInterceptPercentages[11];
#else
A_UINT16 pInterceptPercentages[11];
#endif
} GOLDEN_PARAMS ;
typedef struct ftpDownloadInfo {
A_BOOL downloadRequired;
A_CHAR hostname[256];
A_CHAR username[256];
A_CHAR password[256];
A_CHAR remotefile[256];
A_CHAR localfile[256];
} FTP_DOWNLOAD_INFO;
typedef struct calSetup_t {
// keep all values 32-bit as needed by sscanf
A_UINT32 benchId;
A_BOOL useInstruments;
A_UINT32 subsystemID;
A_UINT32 productID;
A_UINT32 dutPromSize;
A_UINT32 subVendorID;
A_UINT32 countryOrDomain;
A_UINT32 worldWideRoaming;
A_UINT32 countryOrDomainCode;
A_BOOL calPower;
A_BOOL useFastCal; // power meter or golden unit
A_BOOL reprogramTargetPwr;
A_BOOL testOBW;
A_BOOL testSpecMask;
A_BOOL testTXPER;
A_BOOL testRXSEN;
A_BOOL testTURBO;
A_BOOL testHALFRATE; // 10 MHz bandwidth
A_BOOL testQUARTERRATE; // 5 MHz bandwidth
A_BOOL testTargetPowerControl[3]; // a/b/g mode
double targetPowerToleranceUpper;
double targetPowerToleranceLower;
A_INT32 goldenPPM;
A_UINT32 goldenPCDAC;
double goldenTXPower;
A_UINT32 goldenPCDAC_2p4[2];
double goldenTXPower_2p4[2];
//** the following remarked by ccshiang
/***
A_UINT32 pmModel;
A_UINT32 pmGPIBaddr;
A_UINT32 saModel;
A_UINT32 saGPIBaddr;
A_UINT32 attModel;
A_UINT32 attGPIBaddr;
***/
//** the above remarked by ccshiang
//** the following added by ccshiang
A_UINT32 pmModel;
A_UINT32 saModel;
A_UINT32 attModel;
//** the above added by ccshiang
double attenDutPM;
double attenDutSA;
double attenDutGolden;
double attenDutPM_2p4[2];
double attenDutSA_2p4[2];
double attenDutGolden_2p4[2];
A_UINT32 numEthernetPorts; // Number of Ethernet ports. Valid Only for APs
A_UINT32 startEthernetPort; // Begining ethernet port: AP38 has enet1 enabled but enet0 disabled
// Common parameters
A_UINT32 turboDisable;
A_UINT32 turboDisable_11g;
A_UINT32 RFSilent;
A_UINT32 deviceType;
double TurboMaxPower_5G;
double TurboMaxPower_11g;
A_UINT32 Amode;
A_UINT32 Bmode;
A_UINT32 Gmode;
A_INT32 antennaGain5G; // 8-bit signed value. 0.5 dB steps
A_INT32 antennaGain2p5G; // 8-bit signed value. 0.5 dB steps
// 11a parameters (5GHz)
A_UINT32 switchSettling;
A_UINT32 txrxAtten;
A_UINT32 ob_1;
A_UINT32 db_1;
A_UINT32 ob_2;
A_UINT32 db_2;
A_UINT32 ob_3;
A_UINT32 db_3;
A_UINT32 ob_4;
A_UINT32 db_4;
A_UINT32 txEndToXLNAOn;
A_UINT32 thresh62;
A_UINT32 txEndToXPAOff;
A_UINT32 txFrameToXPAOn;
A_UINT32 xpd;
A_UINT32 xgain;
A_UINT32 xlnaGain;
A_INT32 noisefloor_thresh;
A_INT32 adcDesiredSize; // 8-bit signed value. 0.5 dB steps
A_INT32 pgaDesiredSize; // 8-bit signed value. 0.5 dB steps
A_UINT32 antennaControl[11];
A_UINT32 fixed_bias[3];
A_BOOL do_iq_cal;
A_UINT32 iqcal_i_corr[3];
A_UINT32 iqcal_q_corr[3];
// 2.4 GHz parameters
A_UINT32 switchSettling_2p4[2];
A_UINT32 txrxAtten_2p4[2];
A_UINT32 ob_2p4[2];
A_UINT32 db_2p4[2];
A_UINT32 b_ob_2p4[2];
A_UINT32 b_db_2p4[2];
A_UINT32 txEndToXLNAOn_2p4[2];
A_UINT32 thresh62_2p4[2];
A_UINT32 txEndToXPAOff_2p4[2];
A_UINT32 txFrameToXPAOn_2p4[2];
A_UINT32 xpd_2p4[2];
A_UINT32 xgain_2p4[2];
A_UINT32 xlnaGain_2p4[2];
A_INT32 noisefloor_thresh_2p4[2];
A_INT32 adcDesiredSize_2p4[2]; // 8-bit signed value
A_INT32 pgaDesiredSize_2p4[2]; // 8-bit signed value
A_UINT32 antennaControl_2p4[2][11];
A_BOOL readFromFile; //flag to decide whether to read from file or make fresh measurements
char rawDataFilename[122]; // filename to read data from
A_BOOL customerDebug;
A_BOOL showTimingReport;
A_BOOL endTestOnFail;
char macidFile[122]; // filename to read the macIDs from
char logFilePath[122]; // path to logging directory
A_BOOL forcePiers ;
A_UINT16 piersList[15];
A_UINT32 numForcedPiers;
A_BOOL forcePiers_2p4[2] ;
A_UINT16 piersList_2p4[2][15];
A_UINT32 numForcedPiers_2p4[2];
A_BOOL useOneCal; // use 11g cal for 11b as well
char tgtPwrFilename[122];
A_BOOL readFromFile_2p4[2]; // 0 -> OFDM @ 2.4, 1 -> 11b
char rawDataFilename_2p4[2][122];
A_BOOL testSpecMask_2p4[2];
A_BOOL testTXPER_2p4[2];
A_BOOL testRXSEN_2p4[2];
A_BOOL testTURBO_2p4[2];
A_BOOL testTempMargin[3];
A_BOOL test32KHzSleepCrystal;
A_BOOL testDataIntegrity[3];
A_BOOL testThroughput[3];
A_BOOL testTXPER_margin;
A_INT32 targetSensitivity[3][NUM_TEST_CHANNELS];
char goldenIPAddr[132];
A_UINT32 caseTemperature;
A_UINT32 falseDetectBackoff[3];
A_UINT32 perPassLimit;
A_UINT32 senPassLimit;
A_INT32 ppmMaxLimit;
A_INT32 ppmMinLimit;
A_INT32 ppmMaxQuarterLimit;
A_INT32 ppmMinQuarterLimit;
A_UINT32 maskFailLimit;
double maxPowerCap[3];
double cck_ofdm_delta;
double ch14_filter_cck_delta;
A_UINT32 maxRetestIters;
A_UINT32 cal_fixed_gain[3];
A_UINT32 eeprom_map; // 0 for legacy 2nd gen cal format, 1 for 3rd gen cal format
// A_UINT32 cal_single_xpd[3];
A_UINT32 cal_mult_xpd_gain_mask[3];
A_UINT32 EARStartAddr;
A_UINT32 EARLen;
A_UINT32 UartPciCfgLen;
A_UINT32 TrgtPwrStartAddr;
A_UINT32 calStartAddr;
A_UINT32 numSensPackets[3];
A_UINT32 txperBackoff;
A_UINT32 Enable_32khz; // indicates 32khz sleep crystal stuffed.
A_UINT32 Enable_WOW; // indicates Wake_On_WLAN support on the board.
A_UINT32 rxtx_margin[3];
double ofdm_cck_gain_delta;
A_UINT32 instanceForMode[3]; // ART cmd line parameter. 1 based
A_UINT32 modeMaskForRadio[2]; // mask for supported modes for all radios
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